NPS4001 NEXPERIA | Alldatasheet

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  • 5.5 V, 55 mΩ load switch with current limitation

5.5 V, 55 mΩ load switch with current limitation

Rev. 1 — 25 April 2024 Product data sheet 1. General description The NPS4001 is a 5.5 V, 55 mΩ load switch suitable for applications up to 2 A. The NPS4001 switch limits the output current to a constant current by using a constant-current mode when the output load exceeds the current limit threshold or shorted. An internal voltage comparator disables the load switch when the output voltage is higher than the input to protect devices on the input side of the switch. The FLG pin is an active low output to indicate overcurrent, over temperature and reverse voltage conditions. 2. Features and benefits

  • Input operating voltage range (VIN): 2.5 V to 5.5 V
  • Rated current (IMAX): 2 A
  • ON resistance (RDS(on)):
  • VIN = 5.5 V: 55 mΩ (typical)
  • VIN = 3.6 V: 65 mΩ (typical)
  • VIN = 2.5 V: 80 mΩ (typical)
  • Constant current during current limit
  • No body diode when disabled (no current path from pin OUT to pin IN)
  • Active reverse voltage protection
  • Built in soft start
  • UL 62368 recognition
  • SOT753 (TSOP5) package
  • ESD protection:
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C2a exceeds 500 V
  • IEC 61000-4-2 contact discharge 8000 V
  • IEC 61000-4-2 air-gap discharge 15000 V
  • Specified from -40 °C to +125 °C 3. Applications
  • USB ports/hubs, laptops, docking station and desktops
  • Set top box
  • HDTV
  • Optical socket protection
  • Current limiting circuits IN /FLT ON OUT GND 2.5 V to 5.5 V 100 kΩ

0.1 F 120 F

Fault indicator, connect to controller Control signal to turn device on/off aaa-039302 Note: For USB port applications, connect a capacitor of at least 120 μF at the output. For other applications, choose output capacitor according to actual transit requirements. Fig. 1. Typical application circuit

Table 1. Ordering information Table 2. Marking

Table 3. Pin description as close to the IC as possible. GND 2 Supply Ground connection; connect externally to PCB ground. ON 3 I ON/OFF (enable) input. LogicHIGH turns on power switch. FLG 4 O Active-low open-drain output, pulled up to VIN or other power rails via external resistor. shorted to GND or floating if not used. applications other than USB. Table 4. Limiting values

  1. Recommended operating conditions

Table 5. Recommended operating conditions Table 6. Thermal information Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). VIN = 5 V, RFLG = 100 kΩ, all typical values are measured at Tamb = 25 °C, unless otherwise specified.

Tamb = -40 °C to +125 °CSymbol Parameter Conditions Min Typ Max Unit REVERSE VOLTAGE PROTECTION Vreverse reverse-voltage comparator trip point - 75 110 mV treverse time from reverse-voltage condition to MOSFET turn off VIN = 4 V; VOUT = 5 V - 0.5 5 µs SUPPLY CURRENT Iq quiescent current VIN = VON= 5.5 V; no load on pin OUT - - 285 µA ISD shut down current VIN = 5.5 V; no load on pin OUT, VON = 0 V - - 1 µA IREV reverse current leakage VIN = 0 V; VOUT = 5.5 V - 150 - nA UNDERVOLTAGE LOCKOUT VUVLO under voltage lockout low-level input voltage VIN rising - 2.35 2.45 V Vhys(UVLO)undervoltage lockout hysteresis voltage Tj = 25 °C - 25 - mV FLG INDICATOR VOL LOW-level output voltage IFLG = 1 mA - - 180 mV IS(OFF) OFF-state leakage current VFLG = 5.5 V - - 1 µA FLG assertion or de-assertion due to overcurrent condition - 8.5 12 mstdegl deglitch time FLG assertion or de-assertion due to reverse-voltage condition - 0.2 1 ms THERMAL SHUTDOWN Tth(sd) shutdown threshold temperature 155 - - ºC Tsd(hys) shutdown temperature hysteresis - 10 - ºC NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 5 / 17

11.1. Typical characteristics aaa-036933 VIN=5 V, COUT = 1 µF, Iload = 1 A Fig. 3. Turn ON aaa-036934 VIN=5 V, COUT = 1 µF, Iload = 1 A Fig. 4. Turn OFF aaa-036935 VIN=5 V, VON=5 V, COUT = 1 µF, Iload = 1 A Fig. 5. Enable aaa-036936 VIN=5 V, VON=5 V, COUT = 1 µF, Iload = 1 A Fig. 6. Disable aaa-036938 Fig. 7. VIN transient 1 A to 2 A aaa-036939 Fig. 8. Enable to short NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 6 / 17

Fig. 9. Hard short aaa-036941 Fig. 10. Reverse voltage blocking aaa-036942 Fig. 11. Reverse voltage blocking aaa-036943 2.5 3 3.5 4 4.5 5 5.5 VIN (V) RDS(on)RDS(on) (mΩ)(mΩ) (4)(4) (3)(3) (2)(2) (1)(1) (1) Tamb = 125 °C (2) Tamb = 85 °C (3) Tamb = 25 °C (4) Tamb = -40 °C Fig. 12. RDS(on) vs VIN aaa-036945 -50 -25 0 25 50 75 100 125 150 100 125 150 175 200 225 250 Tj (°C) IqIq (µA)(µA) (3)(3) (2)(2) (1)(1) (1) VIN = 5.0 V (2) VIN = 3.3 V (3) VIN = 2.5 V Fig. 13. Supply current (output enabled) NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 7 / 17

-50 -25 0 25 50 75 100 125 150 100 Tj (°C) IqIq (nA)(nA) (3)(3) (2)(2) (1)(1) (1) VIN = 5.0 V (2) VIN = 3.3 V (3) VIN = 2.5 V Fig. 14. Supply current (output disabled) 12. Functional description 12.1. Overview The NPS4001 is a 5.5 V, 55 mΩ P-channel load switch with overcurrent, overtemperature and active reverse voltage protections. The NPS4001 offers fixed current-limit thresholds for applications that require 2 A loading. The NPS4001 has built in soft-start functionality and controls the rising and falling times of the output voltage to limit large current and voltage surges. Additional features include overtemperature protection and active reverse-voltage protection. NPS4001 enters constant-current limit when the load exceeds the current limit threshold. 12.1.1. Functional block diagram Power switch Driver TRCB Current limit Switch control OTP FLT control IN OUT GND ON Supply Current sense FLG aaa-039303 Fig. 15. Functional block diagram NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 8 / 17

12.2. Feature description 12.2.1. Overcurrent protection When the load current exceeds the current limit threshold set by the external resistor, the NPS4001 enters constant current mode by limiting the output current to the current limit threshold until the overcurrent condition is removed. FLG pin asserts if the overcurrent condition persists for 8.5 ms. 12.2.2. Output short circuit protection (ILIMIT) When the switch is turned on while the output pin is shorted to ground, the NPS4001 enters constant current mode immediately and limits the output current to ILIMIT (see Fig. 16) until the short circuit condition is removed. When the output pin is shorted to ground while the switch is fully turned on, a large current will flow through the switch. The switch responds to short-circuit condition within the time tSC (see Fig. 17). As in previous cases, NPS4001 limits the output current to ILIMIT until the short circuit condition is removed. V shorted to GNDOUT IOUT FLG Current limit Current limit removed FLG deglitch time FLG deglitch time V and ONIN Short circuit released ILIMIT aaa-036947 Fig. 16. Power on to short circuit NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 9 / 17

Fig. 17. Hot short 12.2.3. Output discharge The NPS4001 integrates a 300 Ω pull-down resistor for quick output discharge when disabled. 12.2.4. Overtemperature protection The NPS4001 thermal cycles if an over current condition is present long enough to activate thermal Limit in any of the above cases. The switch turns off when the junction temperature exceeds 155 °C (typical). The switch remains off until the junction temperature cools 10 °C (typical) and then restarts (see Fig. 18). FLG pin asserts immediately when the junction temperature exceeds 155 °C. NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 10 / 17

FLG deglitch time FLG deglitch time V and ONIN Short circuit released ISC Thermal shutdown Thermal cycling Restarts aaa-036949 Fig. 18. Power on to short circuit until thermal shutdown 12.2.5. Reverse voltage protection The NPS4001 integrates active reverse voltage protection. The switch turns off internal MOSFET whenever the output voltage exceeds the input voltage by 75 mV for 0.5 µs. The NPS4001 switch turns on once the reverse voltage condition is removed (see Fig. 19). FLG pin will assert low 0.2 ms after reverse voltage condition and de-assert after reverse voltage condition is removed. Reverse voltage V = 0 VOUT VIN FLG FLG deglitch time FLG deglitch time Reverse voltage release V = VOUT INV = VOUT IN aaa-036950 Fig. 19. Reverse voltage protection NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 11 / 17

12.2.6. FAULT flag response Fault flag (pin FLG) output is an N-MOS open drain output. FLG pin is asserted low during overcurrent, overtemperature and reverse voltage conditions. An internal deglitch circuit is designed to eliminate false FLG reporting. Deglitch time for over current is 8.5 ms and that for reverse voltage is 0.2 ms. FLG pin voltage goes low 8.5 ms after over current and goes high 8.5 ms after over current condition is removed (see Fig. 16). FLG pin voltage goes low 0.2 ms after reverse voltage and goes high 0.2 ms after reverse voltage condition is removed (see Fig. 19). Overtemperature condition is not deglitched and asserts the FLG signal immediately when the junction temperature exceeds 155 °C. FLG pin can be shorted to ground or left floating when not used. 12.2.7. Undervoltage lockout (UVLO) The undervoltage lockout (UVLO) circuit prevents the power switch from turning on until input voltage reaches the UVLO turn on threshold. Hysteresis is also built in to present unwanted on and off cycling due to input voltage drop from large current surges. 12.2.8. Enable (ON) The logic enable (pin ON) circuit controls the power switch, a logic high enables the internal MOSFET. The enable input is compatible with both TTL and CMOS logic levels. The enable circuit also provides power to other circuits to reduce the supply current. The power supply current is reduced to less than 1 µA when a logic low is present on ON pin. 13. Application information 13.1. IN /FLT ON OUT GND 2.5 V to 5.5 V 100 kΩ Fault indicator, connect to controller Control signal to turn device on/off aaa-039302 VIN = 2.5 V to 5.5 V; VOUT = 2.5 V to 5.5 V Note: For USB port applications, connect a capacitor of at least 120 μF at the output. For other applications, choose output capacitor according to actual transit requirements. Fig. 20. One-level current limit circuit 14. Layout 14.1. Power supply recommendations The NPS4001 is designed to operate with a VIN range of 2.5 V to 5.5 V. The VIN power supply must be well regulated and placed as close to the device terminal as possible. The power supply must be able to withstand all transient load current steps. In most situations, using an input capacitance (CIN) of 1 μF is sufficient to prevent the supply voltage from dipping when the switch is turned on. In cases where the power supply is slow to respond to a large transient current or large load current step, additional bulk capacitance may be required on the input. NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 12 / 17

14.2. Layout guidelines For best performance, all traces must be as short as possible. To be most effective, the input and output capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects. 14.3. Layout example IN OUT GND ON FLG VIN VOUT aaa-039305 Fig. 21. NPS4001 layout example (SOT753) 15. Thermal considerations The maximum IC junction temperature should be restricted to 125 °C under normal operating conditions. To calculate the maximum allowable dissipation, PD(max) for a given output current and ambient temperature, the equation as shown below can be used: Where: PD(MAX) = maximum allowable power dissipation TJ(MAX) = maximum allowable junction temperature (125 °C for NPS4001) Tamb = ambient temperature of the device θJA = junction to air thermal impedance. This parameter is highly dependent upon board layout. NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 13 / 17

  1. Package outline REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT753 SC-74A w BMbp D e A Lp Q detail X HE E v M A AB y 0 1 2 mm scale c X 1 32 Plastic surface-mounted package; 5 leads SOT753 UNIT A1 bp c D E HE Lp Q ywv mm 0.100 0.013 0.40 0.25 3.1 2.7 0.26 0.10 1.7 1.3 e 0.95 3.0 2.5 0.2 0.10.2 DIMENSIONS (mm are the original dimensions) 0.6 0.2 0.33 0.23 A 1.1 0.9 02-04-16 06-03-16 Fig. 22. Package outline SOT753 (SC-74A) NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 14 / 17

Table 8. Abbreviations Table 9. Revision history

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Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. NPS4001 Submit document feedback All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2024. All rights reserved Product data sheet Rev. 1 — 25 April 2024 16 / 17