NP36P06SLG

NP36P06SLG NEC | Alldatasheet

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Technical content

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. MOS FIELD EFFECT TRANSISTOR NP36P06SLG SWITCHING P-CHANNEL POWER MOSFET DATA SHEET Document No. D18008EJ5V0DS00 (5th edition) Date Published November 2007 NS Printed in Japan 2006 The mark <R> shows major revised points. The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

DESCRIPTION

The NP36P06SLG is P-channel MOS Field Effect Transistor designed for high current switching applications.

FEATURES

• Super low on-state resistance R DS(on)1 = 30 mΩ MAX. (VGS = −10 V, ID = −18 A) R DS(on)2 = 40 mΩ MAX. (VGS = −4.5 V, ID = −18 A)
• Low input capacitance Ciss = 3200 pF TYP.
• Built-in gate protection diode ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Drain to Source Voltage (VGS = 0 V) V DSS −60 V Gate to Source Voltage (VDS = 0 V) V GSS m20 V Drain Current (DC) (TC = 25°C) I D(DC) m36 A Drain Current (pulse) Note1 ID(pulse) m108 A Total Power Dissipation (TC = 25°C) PT1 56 W Total Power Dissipation (TA = 25°C) PT2 1.2 W Channel Temperature T ch 175 °C Storage Temperature T stg −55 to +175 °C Single Avalanche Current Note2 IAS 23.4 A Single Avalanche Energy Note2 EAS 54.8 mJ Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1% 2. Starting Tch = 25°C, VDD = −30 V, RG = 25 Ω, VGS = −20 → 0 V THERMAL RESISTANCE Channel to Case Thermal Resistance R th(ch-C) 2.68 °C/W Channel to Ambient Thermal Resistance R th(ch-A) 125 °C/W

ORDERING INFORMATION

NP36P06SLG TO-252 (MP-3ZK) (TO-252)

Data Sheet D18008EJ5V0DS 2 NP36P06SLG ELECTRICAL CHARACTERISTICS (TA = 25°C) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current I DSS V DS = −60 V, VGS = 0 V −10 μA Gate Leakage Current I GSS V GS = m20 V, VDS = 0 V m10 μA Gate to Source Cut-off Voltage V GS(off) V DS = −10 V, ID = −1 mA −1.0 −2.0 −2.5 V Forward Transfer Admittance Note | yfs | V DS = −10 V, ID = −18 A 12 S Drain to Source On-state Resistance Note RDS(on)1 V GS = −10 V, ID = −18 A 24 30 m Ω R DS(on)2 V GS = −4.5 V, ID = −18 A 27 40 m Ω Input Capacitance C iss V DS = −10 V, 3200 pF Output Capacitance C oss V GS = 0 V, 350 pF Reverse Transfer Capacitance C rss f = 1 MHz 205 pF Turn-on Delay Time t d(on) V DD = −30 V, ID = −18 A, 7 ns Rise Time t r V GS = −10 V, 12 ns Turn-off Delay Time t d(off) R G = 0 Ω 190 ns Fall Time t f 110 ns Total Gate Charge Q G V DD = −48 V, 52 nC Gate to Source Charge Q GS V GS = −10 V, 6.9 nC Gate to Drain Charge Q GD I D = −36 A 15 nC Body Diode Forward Voltage Note VF(S-D) I F = −36 A, VGS = 0 V 1.2 V Reverse Recovery Time t rr I F = −36 A, VGS = 0 V, 46 ns Reverse Recovery Charge Q rr di/dt = 100 A/ μs 75 nC Note Pulsed test PW ≤ 350 μs, Duty Cycle ≤ 2% TEST CIRCUIT 1 AVALANCHE CAPABILITY RG = 25 Ω 50 Ω L VDD VGS = −20 → 0 V BVDSSIAS ID VDS Starting Tch VDD D.U.T. TEST CIRCUIT 3 GATE CHARGE TEST CIRCUIT 2 SWITCHING TIME PG. RG VGS(−) D.U.T. RL VDD τ = 1 sμ Duty Cycle ≤ 1% VGS Wave Form VDS Wave Form VGS(−) 10% 90%VGS 10%0 VDS(−) 90%90% td(on) tr td(off) t f 10% τ VDS ton toff PG. PG. 50 Ω D.U.T. RL VDD IG = −2 mA

Data Sheet D18008EJ5V0DS 3 NP36P06SLG TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. CASE TEMPERATURE dT - Percentage of Rated Power - % 100 120 0 25 50 75 100 125 150 175 TC - Case Temperature - °C PT - Total Power Dissipation - W 0 25 50 75 100 125 150 175 TC - Case Temperature - °C FORWARD BIAS SAFE OPERATING AREA ID - Drain Current - A -0.1 -10 -100 -1000 -0.1 -1 -10 -100 ID(pulse) ID(DC) TC = 25°C Single pulse Power Dissipation Limited 1 ms10 ms DC PW = 1i00 μsRDS(on) Limited (VGS = −1i0 V) VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - °C/W 0.1 100 1000 Rth(ch-A) = 125°C/W Rth(ch-C) = 2.68°C/W Single pulse PW - Pulse Width - s 100 μ 1 m 10 m 100 m 1 10 100 1000 <R>

Data Sheet D18008EJ5V0DS 4 NP36P06SLG DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS ID - Drain Current - A -50 -100 -150 0 - 2- 4- 6- 8 - 1 0 VGS = −10 V Pulsed −4.5 V VDS - Drain to Source Voltage - V I D - Drain Current - A -0.001 -0.01 -0.1 -10 -100 -1000 0 - 1- 2- 3- 4- 5 VDS = −10 V Pulsed TA = −55°C 25°C 125°C 175°C VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT VGS(th) - Gate to Source Cut-off Voltage - V -0.5 -1.5 -2.5 -100 -50 0 50 100 150 200 VDS = −10 V ID = −1 mA Tch - Channel Temperature - °C | yfs | - Forward Transfer Admittance - S 0.1 100 -0.1 -1 -10 -100 VDS = −10 V Pulsed TA = −55°C 25°C 125°C 175°C ID - Drain Current - A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ -1 -10 -100 -1000 Pulsed −10 V VGS = −4.5 V ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ 0 -5 -10 -15 -20 ID = −18 A Pulsed VGS - Gate to Source Voltage - V

Data Sheet D18008EJ5V0DS 5 NP36P06SLG DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE RDS(on) - Drain to Source On-state Resistance - mΩ -100 -50 0 50 100 150 200 ID = −18 A Pulsed −10 V VGS = −4.5 V Tch - Channel Temperature - °C Ciss, Coss, Crss - Capacitance - pF 100 1000 10000 -0.1 -1 -10 -100 Ciss Crss Coss VGS = 0 V f = 1 MHz VDS - Drain to Source Voltage - V SWITCHING CHARACTERISTICS DYNAMIC INPUT/OUTPUT CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns 100 1000 -0.1 -1 -10 -100 td(off) tf td(on) tr VDD = −30 V, VGS = −10 V RG = 0 Ω ID - Drain Current - A VDS - Drain to Source Voltage - V -10 -20 -30 -40 -50 -60 02 0 4 0 6 0 -10 -12 VDS ID = −36 A VGS VDD = −48 V −30 V −12 V Q G - Gate Charge - nC V GS - Gate to Source Voltage - V SOURCE TO DRAIN DIODE FORWARD VOLTAGE REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT IF - Diode Forward Current - A -0.01 -0.1 -10 -100 -1000 00 . 511 . 5 Pulsed 0 V VGS = −10 V VF(S-D) - Source to Drain Voltage - V trr - Reverse Recovery Time - ns 100 1000 -0.1 -1 -10 -100 di/dt = 100 A/μs VGS = 0 V IF - Diode Forward Current - A

Data Sheet D18008EJ5V0DS 6 NP36P06SLG PACKAGE DRAWING (Unit: mm) TO-252 (MP-3ZK) 6.5±0.2 2.3±0.1 0.5±0.1 0.76±0.12 0 to 0.25 0.5±0.1 1.0 No Plating No Plating 5.1 TYP. 1.0 TYP.6.1±0.2 0.51 MIN. 4.0 MIN.0.8 10.4 MAX. (9.8 TYP.) 4.3 MIN. 1.14 MAX. 2.3 2.3 1. Gate 2. Drain 3. Source 4. Fin (Drain) EQUIVALENT CIRCUIT Source Body Diode Gate Protection Diode Gate Drain Remark The diode connected between the gate and source of th e transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.

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