N302AP

ISL9N302AP3 FAIRCHILD | Alldatasheet

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Technical content

Features

• Fast switching DS(ON) = 0.0019 Ω (Typ), V GS = 10V DS(ON) = 0.0027 Ω (Typ), V GS = 4.5V g (Typ) = 110nC, V GS = 5V gd (Typ) = 31nC ISS (Typ) = 11000pF MOSFET Maximum Ratings T A = 25°C unless otherwise noted Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units V DSS Drain to Source Voltage 30 V V GS Gate to Source Voltage 20 V I D Drain Current

75 AContinuous (T

C = 25 o C, V GS = 10V) Continuous (T C = 100 o C, V GS = 4.5V) 75 A Pulsed Figure 4 A P D Power dissipation Derate above 25 o C 345 2.3 W o C T J , T STG Operating and Storage Temperature -55 to 175 o C R θ JC Thermal Resistance Junction to Case TO-220 0.43 o C/W R θ JA Thermal Resistance Junction to Ambient TO-220 62 o C/W Device Marking Device Package Reel Size Tape Width Quantity N302AP ISL9N302AP3 TO-220AB Tube N/A 50 D G S TO-220AB DRAIN (FLANGE) DRAIN SOURCE GATE

©2002 Fairchild Semiconductor Corporation Rev. B January 2002 ISL9N302AP3

Electrical Characteristics

T A = 25°C unless otherwise noted Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics GS = 4.5V) Switching Characteristics GS = 10V) Unclamped Inductive Switching Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Units B VDSS Drain to Source Breakdown Voltage I D = 250 µ A, V GS = 0V 30 - - V I DSS Zero Gate Voltage Drain Current V DS = 25V - - 1 µ AV GS = 0V T C = 150 o - - 250 I GSS Gate to Source Leakage Current V GS 20V - - 100 nA V GS(TH) Gate to Source Threshold Voltage V GS = V DS , I D = 250 µ A1 - 3 V r DS(ON) Drain to Source On Resistance I D = 75A, V GS = 10V - 0.0019 0.0025 Ω I D = 75A, V GS = 4.5V - 0.0027 0.0033 C ISS Input Capacitance V DS = 15V, V GS = 0V, f = 1MHz - 11000 - pF C OSS Output Capacitance - 2000 - pF C RSS Reverse Transfer Capacitance - 900 - pF Q g(TOT) Total Gate Charge at 10V V GS = 0V to 10V V DD = 15V I D = 75A I g = 1.0mA 200 300 nC Q g(5) Total Gate Charge at 5V V GS = 0V to 5V - 110 165 nC Q g(TH) Threshold Gate Charge V GS = 0V to 1V - 12 18 nC Q gs Gate to Source Gate Charge - 25 - nC Q gd Gate to Drain “Miller” Charge - 31 - nC t ON Turn-On Time V DD = 15V, I D = 28A V GS = 4.5V, R GS = 1.5 Ω - - 224 ns t d(ON) Turn-On Delay Time - 29 - ns t r Rise Time - 120 - ns t d(OFF) Turn-Off Delay Time - 45 - ns t f Fall Time - 34 - ns t OFF Turn-Off Time - - 119 ns t ON Turn-On Time V DD = 15V, I D = 28A V GS = 10V, R GS = 1.5 Ω - - 204 ns t d(ON) Turn-On Delay Time - 16 - ns t r Rise Time - 120 - ns t d(OFF) Turn-Off Delay Time - 70 - ns t f Fall Time - 30 - ns t OFF Turn-Off Time - - 150 ns t AV Avalanche Time I D µ s V SD Source to Drain Diode Voltage I SD = 75A - - 1.25 V I SD = 40A - - 1.0 V t rr Reverse Recovery Time I SD = 75A, dI SD /dt = 100A/ µ s- - 4 2 n s Q RR Reverse Recovered Charge I SD = 75A, dI SD /dt = 100A/ µ s- - 3 4 n C

©2002 Fairchild Semiconductor Corporation Rev. B January 2002 ISL9N302AP3 SUBCKT ISL9N302AP3 2 1 3 ; rev Nov 2001 CA 12 8 9e-9 Cb 15 14 5.5e-9 Cin 6 8 1e-8 Dbody 7 5 DbodyMOD Dbreak 5 11 DbreakMOD Dplcap 10 5 DplcapMOD Ebreak 11 7 17 18 30.4 Eds 14 8 5 8 1 Egs 13 8 6 8 1 Esg 6 10 6 8 1 Evthres 6 21 19 8 1 Evtemp 20 6 18 22 1 It 8 17 1 Lgate 1 9 5.618e-9 Ldrain 2 5 1e-9 Lsource 3 7 1.98e-9 RLgate 1 9 56.1 RLdrain 2 5 15 RLsource 3 7 19.8 Mmed 16 6 8 8 MmedMOD Mstro 16 6 8 8 MstroMOD Mweak 16 21 8 8 MweakMOD Rbreak 17 18 RbreakMOD 1 Rdrain 50 16 RdrainMOD 4e-4 Rgate 9 20 5.93e-1 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 Rsource 8 7 RsourceMOD 1.3e-3 Rvthres 22 8 RvthresMOD 1 Rvtemp 18 19 RvtempMOD 1 S1a 6 12 13 8 S1AMOD S1b 13 12 13 8 S1BMOD S2a 6 15 14 13 S2AMOD S2b 13 15 14 13 S2BMOD Vbat 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*500),3))} .MODEL DbreakMOD D (RS=2.5e-1 TRS1=1e-3 TRS2=-8.9e-6) .MODEL DplcapMOD D (CJO=3.5e-9 IS=1e-30 N=10 M=4.7e-1) .MODEL MstroMOD NMOS (VTO=2.1 KP=550 IS=1e-25 N=10 TOX=1 L=1u W=1u) .MODEL MmedMOD NMOS (VTO=1.6 KP=30 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=5.93e-1) .MODEL MweakMOD NMOS (VTO=1.22 KP=1e-1 IS=1e-40 N=10 TOX=1 L=1u W=1u RG=5.93 RS=1e-1) .MODEL RbreakMOD RES (TC1=1e-3 TC2=-7e-7) .MODEL RdrainMOD RES (TC1=1.2e-2 TC2=2.5e-5) .MODEL RSLCMOD RES (TC1=3.5e-9 TC2=5e-6) .MODEL RsourceMOD RES (TC1=1e-3 TC2=1e-6) .MODEL RvthresMOD RES (TC1=-2.9e-3 TC2=-9e-6) .MODEL RvtempMOD RES (TC1=-1.8e-3 TC2=1e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-1.5) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1.5 VOFF=-3.5) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.4 VOFF=0.1) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.1 VOFF=-0.4) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. + - + - 8 + RBREAK RVTEMP VBAT RVTHRES IT 17 18 S1A S1B S2A S2B CA CB EGS EDS MWEAK EBREAK DBODY RSOURCE SOURCE 7 3 LSOURCE RLSOURCE CIN RDRAIN EVTHRES 1621 MMED MSTRO DRAIN LDRAIN RLDRAIN DBREAK DPLCAP ESLC RSLC1 RSLC2 GATE RGATE EVTEMP ESG LGATE RLGATE

©2002 Fairchild Semiconductor Corporation Rev. B January 2002 ISL9N302AP3 REV Nov 2001 template ISL9N302AP3 n2,n1,n3 electrical n2,n1,n3 var i iscl dp..model dbreakmod = (rs=2.5e-1,trs1=1e-3,trs2=-8.9e-6) dp..model dplcapmod = (cjo=3.5e-9,isl=10e-30,nl=10,m=4.7e-1) m..model mstrongmod = (type=_n,vto=2.1,kp=550,is=1e-25, tox=1) m..model mmedmod = (type=_n,vto=1.6,kp=30,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=1.22,kp=1e-1,is=1e-40, tox=1,rs=1e-1) c.ca n12 n8 = 5e-9 c.cb n15 n14 = 5.5e-9 c.cin n6 n8 = 1e-8 dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 30.4 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 5.618e-9 l.ldrain n2 n5 = 1e-9 l.lsource n3 n7 = 1.98e-9 res.rlgate n1 n9 = 56.1 res.rldrain n2 n5 = 15 res.rlsource n3 n7 = 19.8 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1=1e-3,tc2=-7e-7 res.rdrain n50 n16 = 4e-4, tc1=1.2e-2,tc2=2.5e-5 res.rgate n9 n20 = 5.93e-1 res.rslc1 n5 n51 = 1e-6, tc1=3.5e-9,tc2=5e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 1.3e-3, tc1=1e-3,tc2=1e-6 res.rvthres n22 n8 = 1, tc1=-2.9e-3,tc2=-9e-6 res.rvtemp n18 n19 = 1, tc1=-1.8e-3,tc2=1e-6 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/500))** 3)) + - + - 8 + RBREAK RVTEMP VBAT RVTHRES IT 17 18 S1A S1B S2A S2B CA CB EGS EDS MWEAK EBREAK DBODY RSOURCE SOURCE 7 3 LSOURCE RLSOURCE CIN RDRAIN EVTHRES 1621 MMED MSTRO DRAIN LDRAIN RLDRAIN DBREAK DPLCAP ISCL RSLC1 RSLC2 GATE RGATE EVTEMP ESG LGATE RLGATE

©2002 Fairchild Semiconductor Corporation Rev. B January 2002 ISL9N302AP3 SPICE Thermal Model REV May 2001 TISL9N302AP3 CTHERM1 th 6 4.5e-3 CTHERM2 6 5 2e-2 CTHERM3 5 4 1.5e-2 CTHERM4 4 3 2.5e-2 CTHERM5 3 2 7e-2 CTHERM6 2 tl 2.5e-1 RTHERM1 th 6 2e-3 RTHERM2 6 5 8.5e-3 RTHERM3 5 4 6e-2 RTHERM4 4 3 8e-2 RTHERM5 3 2 9e-2 RTHERM6 2 tl 1e-1 SABER Thermal Model SABER thermal model TISL9N302AP3 template thermal_model th tl thermal_c th, tl ctherm.ctherm1 th 6 = 4.5e-3 ctherm.ctherm2 6 5 = 2e-2 ctherm.ctherm3 5 4 = 1.5e-2 ctherm.ctherm4 4 3 = 2.5e-2 ctherm.ctherm5 3 2 = 7e-2 ctherm.ctherm6 2 tl = 2.5e-1 rtherm.rtherm1 th 6 =2e-3 rtherm.rtherm2 6 5 = 8.5e-3 rtherm.rtherm3 5 4 = 6e-2 rtherm.rtherm4 4 3 = 8e-2 rtherm.rtherm5 3 2 = 9e-2 rtherm.rtherm6 2 tl = 1e-1 RTHERM4 RTHERM6 RTHERM5 RTHERM3 RTHERM2 RTHERM1 CTHERM4 CTHERM6 CTHERM5 CTHERM3 CTHERM2 CTHERM1 tl th JUNCTION CASE

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