N150X4-L01 | DigiCamel IC Datasheet

Online Datasheet

Read N150X4-L01 online.

N150X4-L01 INTERPOINT | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 29

Technical content

Type 15.0 XGA Color TFT/LCD Module Model Name:N150X4-L01 Document Control Number : OEM N150X4-L01-01 Note:Specification is subject to change without notice. Consequently it is better to contact to International Display Technology before proceeding with the design of your product incorporating this module. Sales Support International Display Technology Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 1/29

1.0 Handling Precautions

2.0 General Description

2.1 Characteristics

2.2 Functional Block Diagram

3.0 Absolute Maximum Ratings

4.0 Optical Characteristics

5.0 Signal Interface

5.1 Connectors

5.2 Interface Signal Connector

5.3 Interface Signal Description

5.3.1 E-EDUD

5.4 Interface Signal Electrical Characteristics

5.4.1 Signal Electrical Characteristics for LVDS Receiver

5.4.2 LVDS Receiver Internal Circuit

5.4.3 Recommended Guidelines for Motherboard PCB Design and Cable Selection

5.5 Signal for Lamp connector

6.0 Pixel format image

7.0 Parameter guide line for CFL Inverter

8.0 Interface Timings

8.1 Timing Characteristics

8.2 Timing Definition

9.0 Power Consumption

10.0 Power ON/OFF Sequence

11.0 Mechanical Characteristics

12.0 National Test Lab Requirement

First Edition for customer. Based on Internal Spec."N150X4-IPI-01" AllOEM N150X4-L01-01February 06,2003 SummaryPageDocument RevisionDate Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 3/29

/G79If any signals or power lines deviate from the power on/off sequence, it may cause shorten the life of the LCD module. /G79The LCD panel and the CFL are made of glass and may break or crack if dropped on a hard surface, so please handle them with care. /G79CMOS ICs are included in the LCD panel. They should be handled with care, to prevent electrostatic discharge. /G79Do not press the reflector sheet at the LCD module to any directions. /G79Do not stick the adhesive tape on the reflector sheet at the back of the LCD module. /G79Please handle with care when mount in the system cover. Mechanical damage for lamp cable/lamp connector may cause safety problems. /G79Small amount of materials having no flammability grade is used in the LCD module. The LCD module should be supplied by power complied with requirements of Limited Power Source (2.5, IEC60950 or UL60950), or be applied exemption conditions of flammability requirements (4.7.3.4, IEC60950 or UL60950) in an end product. /G79The LCD module is designed so that the CFL in it is supplied by Limited Current Circuit (2.4, IEC60950 or UL60950). /G79The fluorescent lamp in the liquid crystal display(LCD) contains mercury. Do not put it in trash that is disposed of in landfills. Dispose of it as required by local ordinances or regulations. /G79 Never apply detergent or other liquid directly to the screen. /G79Wipe off water drop immediately. Long contact with water may cause discoloration or spots. /G79When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth; do not use solvents or abrasives. /G79Do not touch the front screen surface in your system, even bezel. /G79Gently wipe the covers and the screen with a soft cloth. The information contained herein may be changed without prior notice. It is therefore advisable to contact International Display Technology before proceeding with the design of equipment incorporating this product. /G79 The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by International Display Technology for any infringements of patents or other right of the third partied which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of International Display Technology or others. /G79 Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 4/29

This specification applies to the Type 15.0 Color TFT/LCD Module 'N150X4-L01'. This module is designed for a display unit of a notebook style personal computer. The screen format and electrical interface are intended to support the XGA (1024(H) x 768(V)) screen. Support color is native 262k colors ( RGB 6-bit data driver ). All input signals are LVDS(Low Voltage Differential Signaling) interface compatible. This module does not contain an inverter card for backlight. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 5/29

The following items are characteristics summary on the table under 25 degree C condition: 60 mmCFL cable length 0 to +50 (Operating) -20 to +60 (Storage, Shipping)Temperature Range [deg. C] Native 262K colors ( RGB 6-bit data driver )Support Color 4 pairs Single LVDS(Single) Electrical Interface 317.3(W) x 242.0(H) x 6.2(D) Typ.Physical Size [mm] 585 Max.Weight [grams] 4.1Typ.(@ICFL=6.5mA) CFL Power Consumption [watt] 1.6 Typ. (All White Pattern), 2.2 Max (worst pattern)Logic Power Consumption [watt] +3.3 VNominal Input Voltage [VDD] 60msec Typ.; 120ms Max. (@25degC)Optical Rise + Fall Time Anti-Glare,AG160Surface Treatment x:0.313 , y:0.329Color Chromaticity CR>=10:1 H: +/-85 deg., V:+/-85 deg. Typ. CR>=100:1 H: +/-40 deg., V:+/-40 deg. Typ.Viewing Angle 400 : 1 Typ. 300:1 Min Contrast Ratio 215 Typ. (Screen Center, ICFL = 6.5mA)White Luminance [cd/m2] Normally BlackDisplay Mode R.G.B. Vertical StripePixel Arrangement 0.297(per one triad) x 0.297Pixel Pitch [mm] 1024(x3) x 768Pixels H x V [pixels] 304.128(H) x 228.096(V)Active Area [mm] 38Screen Diagonal [cm] SPECIFICATIONSCHARACTERISTICS ITEMS Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 6/29

The following diagram shows the functional block of the Type 15.0 Color TFT/LCD Module. TFT ARRAY/CELL VDD LCD Controller LCD DRIVE CARD Backlight Unit 1024(R/G/B) x 768 GND DC-DC Converter Ref circuit Y-Driver X-Driver <4 pairs LVDS> RxIN1 RxIN0 RxIN2 RxCLKIN FI-XB30SL-HF10 BHSR-02VS-1 (JST) CCFL High Voltate CCFL Low Voltage Signal Connector CCFL Connector VDD VDD VDD EEDID Chip VEEDID CLCEEDID DataEEDID Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 7/29

Absolute maximum ratings of the module is as follows : Rectangle waveG ms50 18Shock G Hz1.5 10-200Vibration (Note 1)%RH955HSTStorage Relative Humidity (Note 1)deg.C+60-20TSTStorage Temperature (Note 1)%RH958HOPOperating Relative Humidity (Note 1)deg.C+500TOPOperating Temperature A single pulse20mA / 50ms-ICFLPCFL Peak Inrush Current mArms7-ICFLCFL Current Vrms2,000-VinvLamp Ignition Voltage VVDD+0.3-0.3Other InputsInput Voltage of Signal V+4.0-0.3VDDSupply Voltage Conditions Unit Max MinSymbol Item Note : 1. Maximum Wet-Bulb should be 39 degree C and No condensation. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 8/29

The optical characteristics are measured under stable conditions as follows under 25 degree C condition: 160Min Center 200Typ. Center White Luminance (cd/m2) ICFL 6.0 mA -0.329White y -0.313White x --Blue y --Blue x --Green y --Green x(CIE) --Red yChromaticity --Red xColor (ms) 120 Max.60Rising + FallingResponse Time -400Contrast ratio Vertical (Upper) K/G5010 (Lower)K:Contrast Ratio Horizontal (Right) K/G5010 (Left) Viewing Angle (Degrees) NoteTyp. SpecificationConditionsItem Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 9/29

Physical interface is described as for the connector on module. These connectors are capable of accommodating the following signals and will be following components. FI-X30M, FI-X30C2LMating Receptacle/Part Number FI-XB30SL-HF10Type / Part Number JAEManufacturer For Signal ConnectorConnector Name / Designation SM02B-BHSS-1Mating Type / Part Number BHSR-02VS-1Type / Part Number JSTManufacturer For Lamp ConnectorConnector Name / Designation Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 10/29

GND22DataEEDID (Note 2, 4)7 NC21CLKEEDID (Note 2, 4)6 NC20Reserved (Note 1)5 GND19VEDID (Note 2, 3)4 RxCLKIN+18VDD3 RxCLKIN-17VDD2 GND16GND1 Signal NamePin #Signal NamePin # Note : 1. 'Reserved' pins are not allowed to connect any other line. 2. This LCD Module complies with "VESA ENHANCED EXTENDED DISPLAY IDENTIFICATION DATA STANDARD Release A, Revision 1" and supports "EEDID version 1.3". 3. VEEDID power source shall be the limited current circuit which has not exceeding 1A. (Reference Document : "Enhanced Display Data Channel (E-DDCTM) Proposed Standard", VESA) 4. Both CLKEEDID line and DATAEEDID line are pulled up with 10k ohm resistor to VEEDID power source line at LCD panel, respectively. Voltage levels of all input signals are LVDS compatible (except VDD, EEDID). Refer to "Signal Electrical Characteristics for LVDS Receiver", for voltage levels of all input signals. +3.3V Power SupplyVDD LVDS differential clock inputRxCLKIN+, RxCLKIN- LVDS differential data input (Blue2-Blue5, HSync, VSync, DSPTMG)RxIN2+, RxIN2- LVDS differential data input (Green1-Green5,Blue0-Blue1)RxIN1+, RxIN1- LVDS differential data input (Red0-Red5, Green0)RxIN0+, RxIN0- DescriptionSignal Name Note : /G79 Input signals shall be low or Hi-Z state when VDD is off. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 11/29

EEDID 3.3 V Power SupplyVEEDID GroundGND Power SupplyVDD Horizontal Sync:The signal is synchronized with DTCLK . Both active high/low signals are acceptable. HSYNC(H-S) Vertical Sync:The signal is synchronized to DTCLK . Both active high/low signal acceptable. VSYNC(V-S) When the signal is high, the pixel data shall be valid to be displayed. +DSPTMG(DSP) Data Clock:The typical frequency is 65.0 MHz. The signal is used to strobe the pixel data and the DSPTMG . DTCLK Blue Data 5 (MSB) Blue Data 4 Blue Data 3 Blue Data 2 Blue Data 1 Blue Data 0 (LSB) Blue-pixel Data: Each blue pixel's brightness data consists of these 6 bits pixel data. +BLUE 5 +BLUE 4 +BLUE 3 +BLUE 2 +BLUE 1 +BLUE 0 Green Data 5 (MSB) Green Data 4 Green Data 3 Green Data 2 Green Data 1 Green Data 0 (LSB) Green-pixel Data: Each green pixel's brightness data consists of these 6 bits pixel data. +GREEN 5 +GREEN 4 +GREEN 3 +GREEN 2 +GREEN 1 +GREEN 0 Red Data 5 (MSB) Red Data 4 Red Data 3 Red Data 2 Red Data 1 Red Data 0 (LSB) Red-pixel Data: Each red pixcel's brightness data consists of these 6 bits pixel data. +RED5 +RED4 +RED3 +RED2 +RED1 +RED0 DescriptionSIGNAL NAME Note : Output signals except VEEDID, CLKEEDID and DataEEDID from any system shall be Hi-Z state when VDD is off. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 12/29

5.3.1 E-EDID

E-EDID detail in this LCD module is in the following table. (Note 1)Checksum7F No extension00Extension Flag7E Manufacturer P/N "N150X4" 00 00 00 FE 00 4E 31 35 30 58 34 0A 20 20 20 20 20 20 Detailed Timing / Monitor Description #4 6C - 7D Manufactuerer name "IDT" 00 00 00 FE 00 49 44 54 0A 20 20 20 20 20 20 20 20 20 Detailed Timing / Monitor Description #3 5A - 6B (Note 1)Detailed Timing / Monitor Description #2 48 - 59 Typical Timing64 19 00 40 41 00 26 30 18 88 36 00 30 E4 10 00 00 18 Detailed Timing / Monitor Description #1 36 - 47 Unused01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 Standard Timing Identification 26 - 35 Unused00 00 00Established Timing23 - 25 (Note 1)Color Characteristics19 - 22 Active Area : 30.41cm x 22.81cm, Gamma : 2.2 80 1E 17 78 0ABasic Display Parameter / Features 14 - 18 Ver1.301 03EDID Structure Version / Revision 12 - 13 Unused00Year of Manufacture11 Unused00Week of Manufacture10 Unused00 00 00 00ID Serial Number0C - 0F Product Code0D 00 ID Product Code0A - 0B "IDT"24 94ID Manufacturer Name08 - 09 Header, Fixed00 FF FF FF FF FF FF Header00 - 07 RemarkData (hex)DescriptionAddress (hex) Note: 1.Detail data contents shall be determined with concurrence between user and International Display Technology(IDTech). Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 13/29

The LVDS receiver equipped in this LCD module is compatible with ANSI/TIA/TIA-644 standard.

Electrical Characteristics

Vth - Vtl = 200mVmV+50-50/G1fVcmCommon Mode Voltage Offset Vth - Vtl = 200mVV1.51.21.0VcmCommon Mode Voltage mV600100|Vid|Magnitude Differential Input Voltage Vcm=+1.2VmV -100VtlDifferential Input Low Threshold Vcm=+1.2VmV +100 VthDifferential Input High Threshold ConditionsUnit MaxTypMinSymbolParameter Note : /G79Input signals shall be low or Hi-Z state when VDD is off. Voltage Definitions Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 14/29

fc = 65MHz, Tsu=Thd=900psps/clk20tCJavgCycle Modulation Rate (Note 4) fc = 65MHz, Tsu=Thd=900psps+150-150tCCJCycle-to-cycle jitter (Note 3) ps500ThdData Hold Time (Note 2) fc = 65MHz, tCCJ < 50ps, Vth-Vtl = 400mV, Vcm = 1.2V, /G1fVcm = 0 ps500TsuData Setup Time (Note 1) ns20.0015.3814.93tcCycle Time MHz676550fcClock Frequency ConditionsUnitMaxTypMinSymbolParameter Note : 1. All values are at VDD=3.3V, Ta=25 degree C. 2. See figure "Timing Definition" and "Timing Definition(detail A)" for definition. 3. Jitter is the magnitude of the change in input clock period. 4. This specification defines maximum average cycle modulation rate in peak-to-peak transition within any 100 clock cycles. Figure "Cycle Modulation Rate" illustrates a case against this requirement. This specification is applied only if input clock peak jitter within any 100 clock cycles is greater than 300ps. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 15/29

Timing Definition(detail A) Note: Tsu and Thd are internal data sampling window of receiver. Trskm is the system skew margin; i.e., the sum of cable skew, source clock jitter, and other inter-symbol interference, shall be less than Trskm. Cycle Modulation Rate Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 17/29

The following figure shows the internal block diagram of the LVDS receiver. This LCD module equips termination resistors for LVDS link. Following the suggestions below will help to achieve optimal results. /G79Use controlled impedance media for LVDS signals. They should have a matched differential impedance of 100 ohm. /G79Match electrical lengths between traces to minimize signal skew. /G79Isolate TTL signals from LVDS signals. /G79For cables, twisted pair, twin, or flex circuit with close coupled differential traces are recommended. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 18/29

Following figure shows the relationship of the input signals and LCD pixel format image. Even and odd pair of RGB data are sampled at a time. R 1 1022 1023 1st Line 768th Line GB RGRG B B RG B RGB RG B RGB RG B Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 20/29

Ta=25[deg. C] (Note 4) [W]4.1CFL Power consumption PCFL Ta=25[deg. C][Vrms]630CFL Voltage (Reference) VCFL Ta=0[deg. C][Vrms]1,600Inverter Ignition VoltageVCFLi Ta=25[deg. C] (Note 3) [kHz]7040CFL FrequencyFCFL Ta=25[deg. C] (Note 2,6) [mA]20CFL Peak Inrush Current ICFLP Ta=25[deg. C] (Note 2,5) [mArms]7.06.53.0CFL currentICFL Ta=25[deg. C][cd/m2]- 215- White Luminance (Center) (L63) CONDITIONUNITSMAXD.P (Note 1) MINPARAMETERSYMBOL Note : 1. Design Point 2. If it exceeds MIN/MAX values, then"CFL Life" , "ON/OFF Cycle", and "SAFETY" will not be guaranteed. 3. CFL Frequency should be carefully determined to avoid interference between inverter and TFT LCD. 4. Calculated value for reference (ICFL x VCFL = PCFL). 5. It should be employed the inverter which has \Duty Dimming\, if ICFL is less than 4[mA]. 6. Duration: 50msec MAX Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 21/29

The following chart is Luminance versus Lamp Current for your reference. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 22/29

Basically, interface timings should match the VESA 1024x768 / 60 Hz (VG901101) manufacturing guide line timing. These timings described here are not actual input timings of LCD module but output timings of SN75LVDS86DGG(Texas Instruments) or equivalent. 1tx63297V-sync back porchVbp tx31V-sync front porchVfp tx61V-sync WidthVw Hz616055Frame rateVsync tx768768768Y active timetacy tx1023806777Y total timety tck240H front porchHfp 2tck5101608H back porchHbp 2tck1368H-Sync widthHsw KHz48.363H frequencyHsync tck102410241024X active timetacx tck204713441206X total timetx nsec20.0015.3814.93DTCLK cycle timetck MHz67.0065.0050.00DTCLK Frequencyfdck NoteUnitMAXTYPMINSymbol Note1 : Vbp should be static. Note2 : Hsw+Hbp> 32 [tck] - The timing interval between V-Sync falling edge and H-Sync rising edge should be fixed between each V-Frame.(V-Sync and H-Sync polarity are assumed to be positive in this case.) Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 23/29

Input power specifications are as follows; [mVp-p]100Allowable Logic/LCD Drive Ripple Voltage VDDrp Max Pattern, VDD=3.0[V] [mA]640 (TBD) All Black Pattern, VDD=3.3[V] [mA]490 (TBD) VDD CurrentIDD Max. Pattern, VDD=3.6[V] [W]2.2 (TBD) All Black Pattern VDD=3.3[V] [W]1.6 (TBD) VDD PowerPDD Load Capacitance 20[uF][V]3.63.33.0Logic/LCD Drive Voltage VDD CONDITIONUNITSMaxTypMinPARAMETERSYMBOL Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 25/29

VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off. 90% 10% 10% 10% 90% 0.1ms min. 0 min. 0 min. 0 V 0 V VDD Signals 10% 10% 200ms min. 0 min. 0 V Lamp On 10% 10% 30ms max. 30ms min. Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 26/29

The display module will satisfy all requirements for compliance to UL 60950, 3rd Edition U.S.A. Information Technology Equipment CAN/CSA-C22.2 No. 60950-00 Canada, Information Technology Equipment IEC 60950 (3rd. Ed.) International, Information Technology Equipment EN 60950 (3rd. Ed.) International, Information Technology Equipment (European Norm for IEC60950) Engineering Specification (C) Copyright International Display Technology 2002 All Rights reserved. February 06,2003 OEM N150X4-L01-01 29/29

Product Information

N150X4-L01 specifications and overview.

Summary

Engineering Specification Type 15.0 XGA Color TFT/LCD Module

Description

Engineering Specification Type 15.0 XGA Color TFT/LCD Module

Source title N150X4-L01 Datasheet(PDF) - Interpoint Corporation Company

Related Parts

More parts from the same family.

Browse manufacturer