N03G

NTD40N03R ONSEMI | Alldatasheet

Document overview

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• PDF pages: 8

Technical content

Features

• Planar HD3e Process for Fast Switching Performance
• Low R DS(on) to Minimize Conduction Loss
• Low C iss to Minimize Driver Loss
• Low Gate Charge
• Optimized for High Side Switching Requirements in High−Efficiency DC−DC Converters
• Pb−Free Packages are Available MAXIMUM RATINGS (TJ = 25°C unless otherwise specified) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 25 Vdc Gate−to−Source Voltage − Continuous VGS ±20 Vdc Thermal Resistance − Junction−to−Case Total Power Dissipation @ TC = 25°C Drain Current − Continuous @ TC = 25°C, Chip − Continuous @ TA = 25°C, Limited by Wires − Single Pulse (tp ≤ 10 s) R JC PD ID ID ID 3.0 100 °C/W W A A A Thermal Resistance − Junction−to−Ambient (Note 1) Total Power Dissipation @ T A = 25°C Drain Current − Continuous @ TA = 25°C R JA PD ID 71.4 2.1 9.2 °C/W W A Thermal Resistance − Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Drain Current − Continuous @ TA = 25°C R JA PD ID 100 1.5 7.8 °C/W W A Operating and Storage Temperature Range TJ, Tstg −55 to 175 Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 0.5 sq. in pad size. 2. When surface mounted to an FR4 board using minimum recommended pad size. http://onsemi.com

45 AMPERES, 25 VOLTS

R DS(on) = 12.6 m (Typ) MARKING DIAGRAM & PIN ASSIGNMENTS 40N03= Device Code Y = Year WW = Work Week CASE 369AA D S G YWW T40 N03

4 Drain

N−CHANNEL DPAK (Surface Mount) STYLE 2 CASE 369D DPAK (Straight Lead) STYLE 2 1 2 See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

http://onsemi.com ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Characteristics Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) V(br)DSS Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS 1.0 Adc Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) IGSS − − ±100 nAdc ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS , ID = 250 Adc) Threshold Temperature Coefficient (Negative) VGS(th) 1.0 1.7 2.0 Vdc mV/°C Static Drain−to−Source On−Resistance (Note 3) (VGS = 4.5 Vdc, ID = 10 Adc) (VGS = 10 Vdc, ID = 10 Adc) R DS(on) 18.6 12.6 16.5 m Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 10 Adc) gFS − 20 − Mhos DYNAMIC CHARACTERISTICS Input Capacitance C iss − 584 − pF Output Capacitance (VDS = 20 Vdc, VGS = 0 V, f = 1 MHz) C oss − 254 − Transfer Capacitance ( DS , GS ,) C rss − 99 − SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time td(on) − 4.5 − ns Rise Time (VGS = 10 Vdc, VDD = 10 Vdc, tr − 19.5 − Turn−Off Delay Time (VGS = 10 Vdc, VDD = 10 Vdc, ID = 10 Adc, RG = 3 ) td(off) − 16.7 − Fall Time tf − 3.5 − Gate Charge Q T − 5.78 − nC (VGS = 4.5 Vdc, ID = 10 Adc, VDS = 10 Vdc) (Note 3) Q 1 − 2.1 −VDS = 10 Vdc) (Note 3) Q 2 − 2.5 − SOURCE−DRAIN DIODE CHARACTERISTICS Forward On−Voltage (IS = 10 Adc, VGS = 0 Vdc) (Note 3) VSD 08 5 12 Vdc(IS = 10 Adc, VGS = 0 Vdc) (Note 3) (IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C) − 0.85 0.71 1.2 dc Reverse Recovery Time trr − 20.4 − ns (IS = 10 Adc, VGS = 0 Vdc, ta − 8.25 −(IS = 10 Adc, VGS = 0 Vdc, dIS/dt = 100 A/s) (Note 3) tb − 12.1 − Reverse Recovery Stored Charge Q RR − 0.007 − C 3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures.

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance versus Drain Current Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current

3.5 V10 V

Figure 12. Thermal Response

http://onsemi.com Device Package Shipping† NTD40N03R DPAK 75 Units/Rail NTD40N03RG DPAK (Pb−Free) 75 Units/Rail NTD40N03R−1 DPAK (Straight Lead) 75 Units/Rail NTD40N03R−1G DPAK (Straight Lead, Pb−Free) 75 Units/Rail NTD40N03RT4 DPAK 2500 Tape & Reel NTD40N03RT4G DPAK (Pb−Free) 2500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

http://onsemi.com PACKAGE DIMENSIONS STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN D A B RV S F L 2 PL M0.13 (0.005) T E C U J −T− SEATING PLANE Z DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.025 0.035 0.63 0.88 E 0.018 0.024 0.46 0.61 F 0.033 0.045 0.83 1.14 J 0.018 0.023 0.46 0.58 L 0.090 BSC 2.29 BSC R 0.180 0.215 4.57 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 123 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* DPAK (SINGLE GAUGE) CASE 369AA−01 ISSUE O 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inchesSCALE 3:1

http://onsemi.com PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369D−01 ISSUE B STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 123 V S A K −T− SEATING PLANE R B F G D 3 PL M0.13 (0.005) T C E J H DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. Z ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone : 81−3−5773−3850 NTD40N03R/D LITERATURE FULFILLMENT : Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone : 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.