MTP9006E3 CYSTEKEC | Alldatasheet

Document overview

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Technical content

Features

  • Low Gate Charge
  • Simple Drive Requirement
  • Pb-free lead plating package Equivalent Circuit Outline MTP9006E3 TO-220 Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Unit Drain-Source V oltage VDS -60 Gate-Source V oltage VGS ±20 V Continuous Drain Current @ TC=25°C ID -10 Continuous Drain Current @ TC=100°C ID -7 Pulsed Drain Current *1 IDM -40 Avalanche Current IAS -10 A Avalanche Energy @ L=0.1mH, ID=-10A, RG=25Ω EAS 5 Repetitive Avalanche Energy @ L=0.05mH *2 EAR 2 mJ Total Power Dissipation @TC=25℃ 50 Total Power Dissipation @TC=100℃ Pd 25 W Operating Junction and Storage Temperature Range Tj, Tstg -55~+175 °C Note : *1. Pulse width limited by maximum junction temperature *2. Duty cycle ≤ 1% G：Gate D：Drain S：Source G D S

CYStech Electronics Corp. Spec. No. : C733E3 Issued Date : 2010.07.09 Revised Date : Page No. : 2/6 MTB9006E3 CYStek Product Specification Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max Rth,j-c 3 °C/W Thermal Resistance, Junction-to-ambient, max Rth,j-a 62.5 °C/W Characteristics (Tc=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS -60 - - V VGS=0, ID=-250μA VGS(th) -1 -1.8 -3 V VDS =VGS, ID=-250μA IGSS - - ±100 nA VGS=±20, VDS=0 - - -1 VDS =-32V , VGS =0 IDSS - - -25 μA VDS =-30V , VGS =0, TJ=125°C ID(ON) *1 -10 - - A VDS =-5V , VGS =-4.5V - 89 95 VGS =-10V , ID=-10A RDS(ON) *1 - 98 120 mΩ VGS =-5V , ID=-8A GFS *1 - 9 - S VDS =-5V , ID=-10A Dynamic Qg *1, 2 - 16.2 - Qgs *1, 2 - 2 - Qgd *1, 2 - 3.5 - nC ID=-10A, VDS=-30V , VGS=-10V td(ON) *1, 2 - 8 - tr *1, 2 - 12 - td(OFF) *1, 2 - 20 - tf *1, 2 - 12 - ns VDS=-10V , ID=-1A, VGS=-10V , RG=6Ω Ciss - 953 - Coss - 69 - Crss - 56 - pF VGS=0V , VDS=-25V , f=1MHz Rg - 6.8 - Ω VGS=15mV , VDS=0, f=1MHz Source-Drain Diode IS *1 - - -10 ISM *3 - - -40 A VSD *1 - - -1.3 V IF=IS, VGS=0V trr - 12 - ns Qrr - 9 - nC IF=-5A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature.

Ordering Information

(Pb-free lead plating package) 50 pcs / tube, 20 tubes/box, 4 boxes/carton

CYStech Electronics Corp. Spec. No. : C733E3 Issued Date : 2010.07.09 Revised Date : Page No. : 3/6 MTB9006E3 CYStek Product Specification Typical Characteristics Static Drain-Source On-State resistance vs Drain Current 100 150 0.1 1 10 100 -ID, Drain Current(A) Static Drain-Source On-State Resistance- RDS(on)(mΩ) VGS=-10V Static Drain-Source On-resistance vs Ambient Temperature 100 150 200 -100 -50 0 50 100 150 200 Ambient Temperature-Ta(°C) Static Drain-Source On-state Resistance-R DS(on)(mΩ) ID=-10A, VGS=-10V Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 150 200 02468 1 0 1 2 -VGS, Gate-Source Voltage(V) Static Drain-Source On-State Resistance-RDS(ON)(mΩ) ID=-10A Ta=25°C Body Diode Forward Voltage Variation with Source Current and Temperature 0.1 100 -VSD, Body Diode Forward Voltage(V) -IS, Reverse Drain Current(A) VGS=0V Ta=25°C Ta=150°C Capacitance vs Reverse Voltage 100 1000 10000 0 5 10 15 20 25 30 -VDS, Drain-to-Source Voltage(V) Capacitance-(pF) Ciss Coss Crssf=1MHz Brekdown Voltage vs Ambient Temperature -100 -50 0 50 100 150 200 Ambient Temperature-Tj(°C) -BVDSS, Drain-Source Breakdown Voltage (V) ID=-250μA, VGS=0V

CYStech Electronics Corp. Spec. No. : C733E3 Issued Date : 2010.07.09 Revised Date : Page No. : 4/6 MTB9006E3 CYStek Product Specification Typical Characteristics(Cont.) Maximum Safe Operating Area 0.01 0.1 100 11 0 100 Gate Charge Characteristics 0 5 10 15 20 Total Gate Charge---Qg(nC) -VGS, Gate-Source Voltage(V) ID=-10A VDS=-15V VDS=-30V -VDS, Drain-Source Voltage(V) -ID, Drain Current (A) 10μs 100 μ 1m s 10m s 100m s DC Operation in this area is limited by RDS(ON) Transient Thermal Response Curves 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) ZθJC(t), Thermal Response Single Pl 0.01 0.02 0.05 0.1 0.2 D=0.5 1.ZθJC(t)=3 °C/W max. 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*ZθJC(t)

CYStech Electronics Corp. Spec. No. : C733E3 Issued Date : 2010.07.09 Revised Date : Page No. : 5/6 MTB9006E3 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3°C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6°C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C733E3 Issued Date : 2010.07.09 Revised Date : Page No. : 6/6 MTB9006E3 CYStek Product Specification TO-220 Dimension *: Typical Inches Millimeters Inches Millimeters DIM Min. Max. Min. Max. A B E G I KM OP C N H D Marking: CYS P9006 □□□□ 1 2 3 Device Name Date Code 3-Lead TO-220 Plastic Package CYStek Package Code: E3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain DIM Min. Max. Min. Max. Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead: KFC ; pure tin plated
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0 Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.