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1Motorola TMOS Power MOSFET Transistor Device Data /C0068/C0101/C0115/C0105/C0103/C0110/C0101/C0114/C0039/C0115 /C0068/C0097/C0116/C0097 /C0083/C0104/C0101/C0101/C0116 /C0084/C0077/C0079/C0083 /C0086 /C0080/C0111/C0119/C0101/C0114 /C0070/C0105/C0101/C0108/C0100 /C0069/C0102/C0102/C0101/C0099/C0116 /C0084/C0114/C0097/C0110/C0115/C0105/C0115/C0116/C0111/C0114 P–Channel Enhancement–Mode Silicon Gate TMOS V is a new technology designed to achieve an on–resis- tance area product about one–half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMO S devices. Just as with our TMOS E–FET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in powe r supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety m argin against unexpected voltage transients. New Features of TMOS V

  • On–resistance Area Product about One–half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
  • Faster Switching than E–FET Predecessors Features Common to TMOS V and TMOS E–FETS
  • Avalanche Energy Specified
  • IDSS and VDS(on) Specified at Elevated Temperature
  • Static Parameters are the Same for both TMOS V and TMOS E–FET MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–to–Source Voltage VDSS 60 Vdc Drain–to–Gate Voltage (RGS = 1.0 MΩ ) VDGR 60 Vdc Gate–to–Source Voltage — Continuous Gate–to–Source Voltage — Non–repetitive (tp ≤ 10 ms) VGS VGSM ± 15 ± 25 Vdc Vpk Drain Current — Continuous @ 25°C Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp ≤ 10 µs) ID ID IDM Adc Apk Total Power Dissipation @ TC = 25°C Derate above 25°C PD 40 0.27 Watts W/°C Operating and Storage T emperature Range TJ, Tstg –55 to 175 °C Single Pulse Drain–to–Source Avalanche Energy — STARTING TJ = 25°C (VDD = 25 Vdc, VGS = 10 Vdc, PEAK IL = 5 Apk, L = 10 mH, RG = 25 Ω ) EAS 125 mJ Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient R θJC R θJA 3.75 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 seconds TL 260 °C Designer’s Data for “Worst Case” Conditions— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics— are given to facilitate “worst case” design. E–FET, Designer’s and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. REV 1 Order this document by MTP5P06V/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA TMOS POWER FET

5 AMPERES

60 VOLTS

R DS(on) = 0.450 OHM Motorola Preferred Device D S G CASE 221A–06, Style 5 TO–220AB TM /C0077/C0084/C0080/C0053/C0080/C0048/C0054/C0086  Motorola, Inc. 1996

/C0077/C0084/C0080/C0053/C0080/C0048/C0054/C0086

2 Motorola TMOS Power MOSFET Transistor Device Data

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS 61.2 Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS 100 µAdc Gate–Body Leakage Current (VGS = ± 15 Vdc, VDS = 0 Vdc) IGSS — — 100 nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS , ID = 250 µAdc) Threshold T emperature Coefficient (Negative) VGS(th) 2.0 2.8 4.7 4.0 Vdc mV/°C Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 2.5 Adc) R DS(on) — 0.34 0.45 Ohm Drain–Source On–Voltage (VGS = 10 Vdc, ID = 5 Adc) (VGS = 10 Vdc, ID = 2.5 Adc, TJ = 150°C) VDS(on) 2.7 2.6 Vdc Forward Transconductance (VDS = 15 Vdc, ID = 2.5 Adc) gFS 1.5 3.6 — Mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C iss — 367 510 pF Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C oss — 140 200 Transfer Capacitance f = 1.0 MHz) C rss — 29 60 SWITCHING CHARACTERISTICS (2) Turn–On Delay Time (VDD = 30 Vdc, ID = 5 Adc, VGS = 10 Vdc, R G = 9.1 Ω ) td(on) — 11 20 ns Rise Time (VDD = 30 Vdc, ID = 5 Adc, VGS = 10 Vdc, R G = 9.1 Ω ) tr — 26 50 Turn–Off Delay Time VGS = 10 Vdc, R G = 9.1 Ω ) td(off) — 17 30 Fall Time G = 9.1 Ω ) tf — 19 40 Gate Charge (See Figure 8) (VDS = 48 Vdc, ID = 5 Adc, VGS = 10 Vdc) Q T — 12 20 nC (See Figure 8) (VDS = 48 Vdc, ID = 5 Adc, VGS = 10 Vdc) Q 1 — 3.0 —(VDS = 48 Vdc, ID = 5 Adc, VGS = 10 Vdc) Q 2 — 5.0 — Q 3 — 5.0 — SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (IS = 5 Adc, VGS = 0 Vdc) (IS = 5 Adc, VGS = 0 Vdc, TJ = 150°C) VSD 1.72 1.34 3.5 Vdc Reverse Recovery Time (IS = 5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) trr — 97 — ns (IS = 5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) ta — 73 —(IS = 5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) tb — 24 — Reverse Recovery Stored Charge Q RR — 0.42 — µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from contact screw on tab to center of die) (Measured from the drain lead 0.25″ from package to center of die) LD — 3.5 4.5 nH Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS — 7.5 — nH (1) Pulse Test: Pulse Width ≤/n636861720000000000000000300 µs, Duty Cycle ≤ 2%. (2)Switching characteristics are independent of operating junction temperature.

4 Motorola TMOS Power MOSFET Transistor Device Data

by recognizing that the power MOSFET is charge controlled. by current from the generator. and Q2 and VGSP are read from the gate charge curve. on–state when calculating td(off). voltage at the source which reduces the gate drive current. tion of drain current, the mathematical solution is complex. sure and, consequently, is not specified. Figure 7. Capacitance Variation

6 Motorola TMOS Power MOSFET Transistor Device Data

Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy versus Figure 13. Thermal Response Figure 14. Diode Reverse Recovery Waveform

/C0077/C0084/C0080/C0053/C0080/C0048/C0054/C0086 7Motorola TMOS Power MOSFET Transistor Device Data PACKAGE DIMENSIONS CASE 221A–06 ISSUE Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. STYLE 5: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 B Q H Z L V G N A K F 1 2 3 D SEATING PLANE–T– C ST U R J

/C0077/C0084/C0080/C0053/C0080/C0048/C0054/C0086

8 Motorola TMOS Power MOSFET Transistor Device Data

How to reach us: USA / EUROPE : Motorola Literature Distribution; JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, T oshikatsu Otsuki, P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 T atsumi Koto–Ku, T okyo 135, Japan. 03–3521–8315 INTERNET : http://Design–NET .com 51 Ting Kok Road, T ai Po, N.T ., Hong Kong. 852–26629298 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MTP5P06V/D /C0042/C0077/C0084/C0080/C0053/C0080/C0048/C0054/C0086/C0047/C0068/C0042