MTP4N40E MOTOROLA | Alldatasheet

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1Motorola TMOS Power MOSFET Transistor Device Data /C0068/C0101/C0115/C0105/C0103/C0110/C0101/C0114/C0039/C0115 /C0068/C0097/C0116/C0097 /C0083/C0104/C0101/C0101/C0116 /C0084/C0077/C0079/C0083 /C0069/C0045/C0070/C0069/C0084/C0046 /C0080/C0111/C0119/C0101/C0114 /C0070/C0105/C0101/C0108/C0100 /C0069/C0102/C0102/C0101/C0099/C0116 /C0084/C0114/C0097/C0110/C0115/C0105/C0115/C0116/C0111/C0114 N–Channel Enhancement–Mode Silicon Gate This high voltage M OSFE T uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in powe r supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.

  • Robust High Voltage Termination
  • Avalanche Energy Specified
  • Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
  • Diode is Characterized for Use in Bridge Circuits
  • IDSS and VDS(on) Specified at Elevated Temperature MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–to–Source Voltage VDSS 400 Vdc Drain–to–Gate Voltage (RGS = 1.0 MΩ ) VDGR 400 Vdc Gate–to–Source Voltage — Continuous — Non–Repetitive (tp ≤ 10 ms) VGS VGSM ± 20 ± 40 Vdc Vpk Drain Current — Continuous — Continuous @ 100°C — Single Pulse (tp ≤ 10 µs) ID ID IDM 4.0 3.0 Adc Apk Total Power Dissipation Derate above 25°C PD 74 0.59 Watts W/°C Operating and Storage T emperature Range TJ, Tstg –55 to 150 °C Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 4.0 Apk, L = 25 mH, RG = 25 Ω ) EAS 200 mJ Thermal Resistance — Junction to Case — Junction to Ambient R θJC R θJA 1.7 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design. E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. REV 2 Order this document by MTP4N40E/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA /C0077/C0084/C0080/C0052/C0078/C0052/C0048/C0069 TMOS POWER FET

4.0 AMPERES

400 VOLTS

R DS(on) = 1.8 OHM Motorola Preferred Device D S G CASE 221A–06, Style 5 TO–220AB  Motorola, Inc. 1996

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2 Motorola TMOS Power MOSFET Transistor Device Data

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS 400 420 Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 400 Vdc, VGS = 0 Vdc) (VDS = 400 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS 100 µAdc Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) IGSS — — 100 nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS , ID = 250 µAdc) Threshold T emperature Coefficient (Negative) VGS(th) 2.0 3.0 6.0 4.0 Vdc mV/°C Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 2.0 Adc) R DS(on) — 1.3 1.8 Ohms Drain–to–Source On–Voltage (VGS = 10 Vdc, ID = 4.0 Adc) (VGS = 10 Vdc, ID = 2.0 Adc, TJ = 125°C) VDS(on) 8.6 4.3 Vdc Forward Transconductance (VDS = 15 Vdc, ID = 2.0 Adc) gFS 1.8 2.5 — mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C iss — 440 616 pF Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C oss — 72 100 Reverse Transfer Capacitance f = 1.0 MHz) C rss — 14 19.6 SWITCHING CHARACTERISTICS (2) Turn–On Delay Time (VDD = 200 Vdc, ID = 4.0 Adc, VGS = 10 Vdc, R G = 9.1 Ω ) td(on) — 9.0 20 ns Rise Time (VDD = 200 Vdc, ID = 4.0 Adc, VGS = 10 Vdc, R G = 9.1 Ω ) tr — 11 30 Turn–Off Delay Time VGS = 10 Vdc, R G = 9.1 Ω ) td(off) — 18 30 Fall Time G = 9.1 Ω ) tf — 14 30 Gate Charge (VDS = 320 Vdc, ID = 4.0 Adc, VGS = 10 Vdc) Q T — 13 21 nC (VDS = 320 Vdc, ID = 4.0 Adc, VGS = 10 Vdc) Q 1 — 2.5 —(VDS = 320 Vdc, ID = 4.0 Adc, VGS = 10 Vdc) Q 2 — 6.0 — Q 3 — 7.0 — SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (IS = 4.0 Adc, VGS = 0 Vdc) (IS = 4.0 Adc, VGS = 0 Vdc, TJ = 125°C) VSD 0.9 0.78 1.6 Vdc Reverse Recovery Time (IS = 4.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) trr — 200 — ns (IS = 4.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) ta — 99 —(IS = 4.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) tb — 101 — Reverse Recovery Stored Charge Q RR — 1.03 — µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from contact screw on tab to center of die) (Measured from the drain lead 0.25″ from package to center of die) LD 3.5 4.5 nH Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS — 7.5 — nH (1) Pulse Test: Pulse Width ≤/n636861720000000000000000300 µs, Duty Cycle ≤ 2%. (2)Switching characteristics are independent of operating junction temperature.

Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics Figure 3. On–Resistance versus Drain Current Figure 4. On–Resistance versus Drain Current Figure 5. On–Resistance Variation with Figure 6. Drain–To–Source Leakage

7 V8 V

4 Motorola TMOS Power MOSFET Transistor Device Data

by recognizing that the power MOSFET is charge controlled. by current from the generator. and Q2 and VGSP are read from the gate charge curve. on–state when calculating td(off). voltage at the source which reduces the gate drive current. tion of drain current, the mathematical solution is complex. sure and, consequently, is not specified. Figure 7. Capacitance Variation

6 Motorola TMOS Power MOSFET Transistor Device Data

Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy versus Figure 13. Thermal Response Figure 14. Diode Reverse Recovery Waveform

/C0077/C0084/C0080/C0052/C0078/C0052/C0048/C0069 7Motorola TMOS Power MOSFET Transistor Device Data PACKAGE DIMENSIONS CASE 221A–06 (TO–220AB) ISSUE Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. STYLE 5: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 B Q H Z L V G N A K F 1 2 3 D SEATING PLANE–T– C ST U R J

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8 Motorola TMOS Power MOSFET Transistor Device Data

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 T atsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 INTERNET : http://Design–NET .com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MTP4N40E/D /C0042/C0077/C0084/C0080/C0052/C0078/C0052/C0048/C0069/C0047/C0068/C0042