MTP2P50E ONSEMI | Alldatasheet
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Semiconductor Components Industries, LLC, 2000 November, 2000 – Rev. 3
1 Publication Order Number:
2 Amps, 500 Volts
P–Channel TO–220 This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this Power MOSFET is designed to withstand high energy in the avalanche and commutation modes. The energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.
- Robust High V oltage Termination
- Avalanche Energy Specified
- Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode
- Diode is Characterized for Use in Bridge Circuits
- IDSS and VDS(on) Specified at Elevated Temperature MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–Source Voltage VDSS 500 Vdc Drain–Gate Voltage (RGS = 1.0 MΩ ) VDGR 500 Vdc Gate–Source Voltage – Continuous – Non–Repetitive (tp ≤ 10 ms) VGS VGSM ±20 ±40 Vdc Vpk Drain Current – Continuous Drain Current – Continuous @ 100°C Drain Current – Single Pulse (tp ≤ 10 µs) ID ID IDM 2.0 1.6 6.0 Adc Apk Total Power Dissipation Derate above 25°C PD 75 0.6 Watts W/°C Operating and Storage Temperature Range TJ, Tstg –55 to 150 Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, IL = 4.0 Apk, L = 10 mH, RG = 25 Ω ) EAS 80 mJ Thermal Resistance – Junction to Case – Junction to Ambient R θJC R θJA 1.67 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C D S G
2 AMPERES
500 VOLTS
R DS(on) = 6 Ω Preferred devices are recommended choices for future use and best overall value. Device Package Shipping
ORDERING INFORMATION
MTP2P50E TO–220AB 50 Units/Rail TO–220AB CASE 221A STYLE 5 http://onsemi.com P–Channel MARKING DIAGRAM & PIN ASSIGNMENT MTP2P50E = Device Code LL = Location Code Y = Year WW = Work Week MTP2P50E LLYWW Gate Source Drain Drain
http://onsemi.com ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 µAdc) Temperature Coefficient (Positive) V(BR)DSS 500 564 Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 500 Vdc, VGS = 0 Vdc) (VDS = 500 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS 100 µAdc Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0) IGSS – – 100 nAdc ON CHARACTERISTICS (Note 1.) Gate Threshold Voltage (VDS = VGS , ID = 250 µAdc) Temperature Coefficient (Negative) VGS(th) 2.0 3.0 4.0 4.0 Vdc mV/°C Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 1.0 Adc) R DS(on) – 4.5 6.0 Ohm Drain–Source On–Voltage (VGS = 10 Vdc) (ID = 2.0 Adc) (ID = 1.0 Adc, TJ = 125°C) VDS(on) 9.5 14.4 12.6 Vdc Forward Transconductance (VDS = 15 Vdc, ID = 1.0 Adc) gFS 0.5 – – mhos DYNAMIC CHARACTERISTICS Input Capacitance (V 25 Vd V 0 Vd C iss – 845 1183 pF Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C oss – 100 140 Reverse Transfer Capacitance f = 1.0 MHz) C rss – 26 52 SWITCHING CHARACTERISTICS (Note 2.) Turn–On Delay Time td(on) – 12 24 ns Rise Time (VDD = 250 Vdc, ID = 2.0 Adc, VGS =1 0V d c tr – 14 28 Turn–Off Delay Time VGS = 10 Vdc, R G = 9.1 Ω ) td(off) – 21 42 Fall Time R G 9.1 Ω ) tf – 19 38 Gate Charge (S Fi 8) Q T – 19 27 nC (See Figure 8) (VDS = 400 Vdc, ID = 2.0 Adc, Q 1 – 3.7 –(VDS 400 Vdc, ID 2.0 Adc, VGS = 10 Vdc) Q 2 – 7.9 – Q 3 – 9.9 – SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (Note 1.) (IS = 2.0 Adc, VGS = 0 Vdc) (IS = 2.0 Adc, VGS = 0 Vdc, TJ = 125°C) VSD 2.3 1.85 3.5 Vdc Reverse Recovery Time (S Fi 14) trr – 223 – ns (See Figure 14) (IS =20A d c VGS = 0 Vdc ta – 161 – (IS = 2.0 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) tb – 62 – Reverse Recovery Stored Charge dIS/dt = 100 A/µs) Q RR – 1.92 – µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from contact screw on tab to center of die) (Measured from the drain lead 0.25″ from package to center of die) LD 3.5 4.5 nH Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS – 7.5 – nH 1. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 2. Switching characteristics are independent of operating junction temperature.
http://onsemi.com PACKAGE DIMENSIONS TO–220 THREE–LEAD TO–220AB CASE 221A–09 ISSUE AA STYLE 5: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 B Q H Z L V G N A K F 12 3 D SEATING PLANE–T– C ST U R J
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