MTP2N20 MOTOROLA | Alldatasheet

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MOTOROLA SC (XSTRS/R F) b&E D MM 6367254 00946634 365 MENOTL MOTOROLA mt SEMICONDUCTOR xan TECHNICAL DATA . 1, Designer’s Data Sheet MTP2N20 Power Field Effect Transistor N-Channel Enhancement-Mode Silicon Gate fi TMOS POWER FETs This TMOS Power FET is designed for medium voltage, 2 AMPERES high speed power switching applications such as switching regu- j Rps{on) = 1.8 OHMS lators, converters, solenoid and relay drivers. ® 200 VOLTS © Silicon Gate for Fast Switching Speeds — Switching Times TOS Specified at 100°C © Designer's Data — Ipss- VDS(on). VGSith) and SOA Specified ° at Elevated Temperature Rugged — SOA is Power Dissipation Limited © Source-to-Drain Diode Characterized for Use With Inductive Loads G s MAXIMUM RATINGS re Gate-Source Voltage — Continuous Ves +20 Vde —Non-tepetitive (tp < 50 us) VGsm +40 Vpk , Drain Current — Continuous Adc .T \\ — Pulsed \\) Total Power Dissipation @ Tc = 25°C Watts ZW Derate above 25°C wre fe Y THERMAL CHARACTERISTICS GF ‘Thermai Resistance — Junction to Case Res "CW — Junction to Ambient Rea it ri CASE 2210-06 Maximum Lead Temperature for Soldering TL 260 °c 10-220AB Purposes, 1/8" from case for 5 seconds ELECTRICAL CHARACTERISTICS (Tc = 25°C unless otherwise noted) [ haracteritie | Srmbot [twin [max Unie | OFF CHARACTERISTICS Drain-Source Breakdown Voltage ViBRIDSS Vee (Vag = 0, Ip = 0.25 mA) Zero Gate Voltage Drain Current Ipss wAdc (Vps = Rated Vpss, Vgs = 01 (Vpg = Rated Voss, Vgg = 0, Ty = 125°C) [Gat oay este Curent Forward Vase = Vea Vos=O ~~ taser | | 100 | naa [Gat Body teskoge Curent Reverse Vagn= Z0VWee vos =o) | tessa | _— | 100 | nade (continued) Designer's Data for “Worst Case” Conditions — The Designer's Data Sheet permits the design of most circuits entirely from the information presented Limit curves — representing boundanes on device characteristics — are given to facitate “worst case” design. MOTOROLA TMOS POWER MOSFET DATA 3-240

MOTOROLA SC ( XSTRS/R F) BE D MM 6367254 0098635 21] MNOTL MTP2N20 ELECTRICAL CHARACTERISTICS — continued (Tc = 25°C unless otherwise noted) ON CHARACTERISTICS* Gate Threshold Voltage Vesithy Vde (ps = Ves. Ip = 1 mA) Ty = 100°C Static Drain-Source On-Resistance (Vgg = 10 Vde, Ip = 1 Adc) [_Rosion [ — | 18 | Ohms | Drain-Source On-Voltage (Vgg = 10 V) Vpston) Vde (lp = 2 Adc) 44 (lp = 1 Ade, Ty = 100°C) 36 DYNAMIC CHARACTERISTICS SWITCHING CHARACTERISTICS® (T = 100°C) Be heal ee ee Turn-Off Delay Time seofigures 8, 13and1¢ — |_ tao [| — | a0 [| = fe Total Gate Charge (pg = 08Rated Voss, «= |_@ | 287) | 10 | nc Gate-Source Charge Ip =Retedip, Ves = 10v) [| Qgs | 2ive) | — | Gate-Drain Charge Seo Figura 12 [Qa | 15(Tyr | — | SOURCE DRAIN DIODE CHARACTERISTICS* [veo [ati [2 a INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance ld (Measured from the contact screw on tab to center of die) 3.5 (Typ) (Measured from the drain lead 0.25" from package to center of die) 45 (Typ) Internal Source Inductance Us 75 (Typ) (Measured from the source lead 0.25" from package to source bond pad) *Pulge Test Pulse Width = 200 ys, Duty Cycle < 2% MOTOROLA TMOS POWER MOSFET DATA 3-241

Figure 1. On-Region Characteristics Figure 2. Gate-Threshold Voltage Variation

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Figure 3. Transfer Characteristics Figure 4. Breakdown Voltage Variation

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Figure 5. On-Resistance versus Drain Current Figure 6. On-Resistance Variation

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Figure 7. Maximum Rated Forward Biased Figure 8. Maximum Rated Switching

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Figure 10. Thermal Response

Figure 11. Capacitance Variation Figure 12. Gate Charge versus

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Figure 13. Switching Test Circuit Figure 14. Switching Waveforms