MTM40N20 MOTOROLA | Alldatasheet
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MOTOROLA SC (XSTRS/R F) b8E D MM 6367254 0098608 2935 MNOTL MOTOROLA a SEMICONDUCTOR Saag TECHNICAL DATA ; 1 Designer's Data Sheet MTM40N20 Power Field Effect Transistor N-Channel Enhancement-Mode Silicon Gate rv | | TMOS POWER FET This TMOS Power FET is designed for high speed power switch- Ri 40 ETE HM ing applications such as switching regulators, converters, solenoid Psion) VOLTS and relay drivers. ™o AY | 00 VOL ® Silicon Gate for Fast Switching Speeds — Switching Times ~ Specified at 100°C © Designer's Data — Ipgg. VpS(on). V@sith) and SOA Specified > at Elevated Temperature ‘© Rugged — SOA is Power Dissipation Limited © Source-to-Drain Diode Characterized for Use With Inductive Loads MAXIMUM RATINGS s Drain-Gate Voltage (Res = 1 MM) Voorn | 200—S'””st—=‘L*C«‘Ues=C*dS! Gate-Source Voltage Continuous Ves £20 Vde Non-repetitive (tp < 50 1s) VGsm 40 Vpk Drain Current — Continuous 40 Ade S — Pulsed 200 a 4 Total Power Dissipation @ Tc = 25°C 260 Watts we)" Derate above 25°C 2 wre [ TY Operating and Storage Temperature Range | ToTag | -estotso | _—*'| ‘THERMAL CHARACTERISTICS Thermal Resistance — Junction to Case Resc 05 “CW — Junction to Ambient Raa 30 Maximum Lead Temperature for Soldering Te °c A one Purposes, 1/8" from case for 5 seconds ELECTRICAL CHARACTERISTICS (Tc = 25°C unless otherwise noted) OFF CHARACTERISTICS Drain-Source Breakdown Voltage V(BR)DSS Vde (Vgs = 9, Ip = 0.25 mA) MTM40N20 Zero Gate Voltage Drain Current Ipss pAdC (Vp = Rated Voss, Vs = 0) (Vps = Rated Vpsg, Ves = 9, Ty = 125°C) Gate-Body Leakage Current, Forward (VGgF = 20 Vdc, Vpg = 0) [igsse | — | 100 | nAde | Gate-Body Leakage Current, Reverse (VGgp = 20 Vdc, Vps = 0) [tcssr | — | 100 | nade | (continued) Designer's Data for “Worst Case” Conditions — The Designers Data Sheet permits the design of most circuits entirely from the information presented Limit Canvas representing boundaries on device characteristics — are given to facilitate “worst case” design. MOTOROLA TMOS POWER MOSFET DATA 3-214
MOTOROLA SC (XSTRS/R F) bAE D MM 6367254 00598605 12T MMOTL ELECTRICAL CHARACTERISTICS — continued (T¢ = 25°C unless otherwise noted) ON CHARACTERISTICS" Gate Threshold Voltage Vesith) Vde (ps = Vas. Ip = 1 mA) 45 Ty = 100°C 4 Static Drain-Source On-Resistance (Vgg = 10 Vdc, Ip = 20 Adc) Rpsion) | — | 008 | Ohm | Drain-Source On-Voltage (Vgg = 10 VI Vpsion) Vae {Ip = 40 Ado) (Ip = 20 Adc, Ty = 100°C) Forward Transconductance (Vpg = 15 V, Ip = 20 A) os | 10 | — | mhos | DYNAMIC CHARACTERISTICS Reverse Transfer Capacitance Ciss — | 00 | SWITCHING CHARACTERISTICS* (T) = 100°C) Turn-On Delay Time tao | — | 6 | - Rgen = 50 ohms} Turn-Off Delay Time See Figures 13 and 14 [400 | Gate-Source Charge Ip = Rated Ip, Vgg = 10 V) Og | 5c) | — ‘| Gate-Drain Charge See Figure 12 aoctyp) | — | ‘SOURCE DRAIN DIODE CHARACTERISTICS* INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance la 5(typ) | — nH (Measured from the contact screw on the header closer to the source pin i and the center of the die) Internal Source Inductance Ls 12.5 (Typ) — (Measured from the source pin, 0 25" from the package to the source | bond pad) ‘Pulse Test. Pulse Width « 300 ys, Duty Cycle = 2% MOTOROLA TMOS POWER MOSFET DATA 3-215
Figure 1. On-Region Characteristics Figure 2. Gate-Threshold Voltage Variation
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Figure 3. Transfer Characteristics Figure 4. Breakdown Voltage Variation Figure 5. On-Resistance versus Drain Current Figure 6. On-Resistance Variation
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Figure 7. Maximum Rated Forward Biased Figure 8. Maximum Rated Switching
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Figure 10. Thermal Response
Figure 11. Capacitance Variation Figure 12, Gate Charge versus
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Figure 13. Switching Test Circuit Figure 14. Switching Waveforms