MTE050N10KRJ3 CYSTEKEC | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 9

Technical content

Features

  • Low Gate Charge
  • Simple Drive Requirement
  • ESD protected gate
  • Pb-free lead plating & Halogen-free package Equivalent Circuit Outline

Ordering Information

MTE050N10KRJ3-0-T3-G TO-252 (Pb-free lead plating & Halogen-free package) 2500 pcs / Tape & Reel TO-252(DPAK) MTE050N10KRJ3 G：Gate D：Drain S：Source BVDSS 100V ID@VGS=10V , TC=25°C 13A RDSON@VGS=10V , ID=10A 55.5mΩ(TYP) G D S Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T3 : 2500 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 2/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Symbol Limits Unit Drain-Source V oltage V DS 100 Gate-Source V oltage V GS ±20 V Continuous Drain Current @ TC=25°C, VGS=10V 13 Continuous Drain Current @ TC=100°C, VGS=10V ID 8.2 Pulsed Drain Current *1 IDM 36 Single Pulse Avalanche Current @L=0.1mH I AS 16 A Avalanche Energy @ L=1mH, ID=10A, VDD=50V *3 EAS 50 Repetitive Avalanche Energy @ L=0.05mH *2 EAR 3 mJ Total Power Dissipation @TC=25℃ 25 Total Power Dissipation @TC=100℃ PD 10 W Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 °C Note : *1. Pulse width limited by maximum junction temperature *2. Duty cycle ≤ 1% *3. 100% tested by L=0.1mH, IAS=10A, VGS=10V , VDD=25V Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max R θJC 5 50 (Note) Thermal Resistance, Junction-to-ambient, max R θJA 110 °C/W Note : When the device is mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The value in any given application depends on the user’s specific board design. Characteristics (Tc=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 100 - - V GS=0V , ID=250μA VGS(th) 2 - 4 V VDS =VGS, ID=250μA IGSS - - ±10 V GS=±16V , VDS=0V - - 1 V DS =80V , VGS =0V IDSS - - 25 μA VDS =80V , VGS =0V , TJ=125°C RDS(ON) *1 - 55.5 75 mΩ VGS =10V , ID=10A GFS *1 - 5.4 - S V DS =10V , ID=5A Dynamic Qg *1, 2 - 8.2 - Qgs *1, 2 - 3.1 - Qgd *1, 2 - 1.6 - nC I D=10A, VDS=80V , VGS=10V

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 3/9 MTE050N10KRJ3 Preliminary CYStek Product Specification td(ON) *1, 2 - 9 - tr *1, 2 - 16.6 - tf *1, 2 - 4 - ns VDS=50V , ID=10A, VGS=10V , RG=3Ω Ciss - 519 - Coss - 48 - Crss - 6 - pF V GS=0V , VDS=50V , f=1MHz Rg - 6.1 - Ω f=1MHz Source-Drain Diode IS *1 - - 13 ISM *3 - - 36 A VSD *1 - 0.92 1.2 V I S=10A, VGS=0V trr - 28.8 - ns Qrr - 42.4 - nC IF=10A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Recommended soldering footprint

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 4/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Typical Characteristics Typical Output Characteristics 02468 1 0 VDS, Drain-Source Voltage(V) ID, Drain Current (A) 10V,9V,8V,7V,6V VGS=4V 4.5V Brekdown Voltage vs Ambient Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 0.01 0.1 1 10 100 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=7V VGS=10V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 02468 1 0 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 120 160 200 02468 1 0 VGS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=10A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 2.8 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=10A RDS( ON)@Tj=25°C : 55.5mΩ typ.

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 5/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 0 5 10 15 20 25 30 35 40 45 50 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.2 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 0.001 0.01 0.1 1 10 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) Ta=25°C Pulsed VDS=10V VDS=15V Gate Charge Characteristics 02468 1 0 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) ID=10A VDS=20V, 50V, 80V from left to right Maximum Safe Operating Area 0.1 100 0.1 1 10 100 1000 VDS, Drain-Source Voltage(V) ID, Drain Current(A) TC=25°C, Tj=150°C VGS=10V, RθJC=5°C/W Single Pulse DC 100ms RDSON Limited 100μs 1ms 10ms Maximum Drain Current vs Case Temperature 25 50 75 100 125 150 175 T C, Case Temperature(°C) ID, Maximum Drain Current(A)VGS=10V, RθJC=5°C/W

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 6/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 0123456789 1 0 VGS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=10V Single Pulse Power Rating, Junction to Case 100 200 300 400 500 600 700 800 900 1000 0.001 0.01 0.1 1 10 100 1000 Pulse Width(s) Power (W) TJ(MAX)=150°C TC=25°C RθJC=5°C/W Transient Thermal Response Curves 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*RθJC(t) 4.RθJC=5°C/W

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 7/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Reel Dimension Carrier Tape Dimension

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 8/9 MTE050N10KRJ3 Preliminary CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3 °C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6 °C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.

CYStech Electronics Corp. Spec. No. : C019J3 Issued Date : 2018.04.02 Revised Date : Page No. : 9/9 MTE050N10KRJ3 Preliminary CYStek Product Specification TO-252 Dimension Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:

  • Lead : Pure tin plated.
  • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
  • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
  • CYStek reserves the right to make changes to its products without notice.
  • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
  • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Marking: Style: Pin 1.Gate 2.Drain 3.Source 4.Drain 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Device Name Date Code E050N 10KR □□□□ 1 2 3