MTD07N04V8 CYSTEKEC | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 9
Technical content
Features
- Single Drive Requirement
- Low On-resistance
- Fast Switching Characteristic
- Pb-free lead plating and halogen-free package Equivalent Circuit Outline
Ordering Information
MTD07N04V8-0-T6-G DFN3×3 (Pb-free lead plating and halogen-free package) 3000 pcs / tape & reel DFN3×3 MTD07N04V8 G:Gate D:Drain S:Source BVDSS 40V ID @ VGS=10V , TA=25°C 12.7A ID @ VGS=10V , TC=25°C 52A VGS=10V , ID=11A 5.4mΩ RDSON(TYP) VGS=4.5V , ID=9A 7.2mΩ Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T6 : 3000 pcs / tape & reel,13” reel Product rank, zero for no rank products Product name Pin 1
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 2/9 MTD07N04V8 CYStek Product Specification Absolute Maximum Ratings (Ta=25°C, unless otherwise specified) Parameter Symbol Limits Unit Drain-Source V oltage V DS 40 Gate-Source V oltage V GS ±20 V Continuous Drain Current @ VGS=10V , TC=25°C 52 Continuous Drain Current @ VGS=10V , TC=100°C 32.9 Continuous Drain Current @ VGS=10V , TA=25°C 12.7 Continuous Drain Current @ VGS=10V , TA=70°C ID 10.2 Pulsed Drain Current I DM 180 *1 Single Pulse Avalanche Current @ L=0.1mH I AS 45 A Avalanche Energy @ L=0.1mH, ID=45A, VDD=25V E AS 101 *3 Repetitive Avalanche Energy @ L=0.05mH E AR 4.9 mJ TC=25℃ 41.7 TC=100℃ PD 16.7 TA=25℃ 2.5 *2Total Power Dissipation TA=70℃ PDSM 1.6 *2 W Operating Junction and Storage Temperature Range Tj, Tstg -55~+150 °C Thermal Data Parameter Symbol Value Unit Thermal Resistance, Junction-to-case, max R θJC 3 Thermal Resistance, Junction-to-ambient, max R θJA 50 *2 °C/W Note : 1. Pulse width limited by maximum junction temperature. 2. Surface mounted on a 1 in² pad of 2oz copper. In practice Rth,j-a will be determined by customer’s PCB characteristics. 125°C/W when mounted on a minimum pad of 2 oz. copper. 3. 100% tested by conditions of L=0.1mH, IAS=12A, VGS=10V , VDD=15V , rated 30V Characteristics (TC=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Test Conditions Static BVDSS 40 - - V GS=0V , ID=250μA VGS(th) 1.4 - 2.5 V VDS = VGS, ID=250μA GFS *1 - 15.3 - S V DS =10V , ID=10A IGSS - - ±100 nA VGS=±20V , VDS=0V - - 1 V DS =32V , VGS =0V IDSS - - 10 μA VDS =32V , VGS =0V , Tj=85°C - 5.4 7 V GS =10V , ID=11A RDS(ON) *1 - 7.2 10 mΩ VGS =4.5V , ID=9A Dynamic Ciss - 1548 - Coss - 187 - Crss - 122 - pF V DS=20V , VGS=0V , f=1MHz
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 3/9 MTD07N04V8 CYStek Product Specification Qgs *1, 2 - 4.7 - Qgd *1, 2 - 6.6 - nC VDS=15V , VGS=10V , ID=12A tr *1, 2 - 18.4 - td(OFF) *1, 2 - 51 - tf *1, 2 - 7.8 - ns VDS=15V , ID=1A, VGS=10V , RGS=1Ω Rg - 1.5 - Ω f=1MHz Source-Drain Diode IS *1 - - 15 ISM *3 - - 60 A VSD *1 - 0.8 1.2 V IS=10A, VGS=0V trr - 13.7 - ns Qrr - 7.1 - nC IF=5A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Recommended Soldering Footprint unit : mm
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 4/9 MTD07N04V8 CYStek Product Specification Typical Characteristics Typical Output Characteristics 100 120 140 012345 VDS, Drain-Source Voltage(V) ID, Drain Current (A) 10V,9V,8V,7V,6V,5V VGS=3V 3.5V Brekdown Voltage vs Junction Temperature 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) BVDSS, Normalized Drain-Source Breakdown Voltage ID=250μA, VGS=0V Static Drain-Source On-State resistance vs Drain Current 100 0.01 0.1 1 10 100 ID, Drain Current(A) RDS(on), Static Drain-Source On-State Resistance(mΩ) VGS=10V VGS=4.5V Reverse Drain Current vs Source-Drain Voltage 0.2 0.4 0.6 0.8 1.2 048 1 2 1 6 2 0 IDR, Reverse Drain Current(A) VSD, Source-Drain Voltage(V) Tj=25°C Tj=150°C VGS=0V Static Drain-Source On-State Resistance vs Gate-Source Voltage 02468 1 0 VGS, Gate-Source Voltage(V) RDS(on), Static Drain-Source On- State Resistance(mΩ) ID=11A Drain-Source On-State Resistance vs Junction Tempearture 0.4 0.8 1.2 1.6 2.4 2.8 3.2 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) RDS(on), Normalized Static Drain- Source On-State Resistance VGS=10V, ID=11A RDSON @ Tj=25°C : 5.4 mΩ typ VGS=4.5V, ID=9A RDSON @ Tj=25°C : 7.2 mΩ typ
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 5/9 MTD07N04V8 CYStek Product Specification Typical Characteristics(Cont.) Capacitance vs Drain-to-Source Voltage 100 1000 10000 0 5 10 15 20 25 30 VDS, Drain-Source Voltage(V) Capacitance---(pF) Coss Ciss Crss Threshold Voltage vs Junction Tempearture 0.4 0.6 0.8 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) VGS(th), Normalized Threshold Voltage ID=250μA ID=1mA Forward Transfer Admittance vs Drain Current 0.01 0.1 100 0.001 0.01 0.1 1 10 100 ID, Drain Current(A) GFS, Forward Transfer Admittance(S) Ta=25°C Pulsed VDS=10V VDS=15V Gate Charge Characteristics 0 4 8 1 21 62 02 42 83 2 Qg, Total Gate Charge(nC) VGS, Gate-Source Voltage(V) ID=12A VDS=15V Maximum Safe Operating Area 0.01 0.1 100 1000 0.01 0.1 1 10 100 VDS, Drain-Source Voltage(V) ID, Drain Current(A) TA=25°C, Tj=150°C VGS=10V, RθJA=50°C/W Single Pulse DC 100ms RDSON Limited 100μs 1ms 10ms Maximum Drain Current vs Junction Temperature 25 50 75 100 125 150 175 Tj, Junction Temperature(°C) ID, Maximum Drain Current(A)TA=25°C, VGS=10V, RθJA=50°C/W
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 6/9 MTD07N04V8 CYStek Product Specification Typical Characteristics(Cont.) Typical Transfer Characteristics 100 120 140 0123456 V GS, Gate-Source Voltage(V) ID, Drain Current(A) VDS=5V Single Pulse Power Rating, Junction to Ambient (Note on page 2) 100 0.001 0.01 0.1 1 10 100 1000 Pulse Width(s) Power (W) TJ(MAX)=150°C TA=25°C RθJA=50°C/W Transient Thermal Response Curves 0.001 0.01 0.1 t1, Square Wave Pulse Duration(s) r(t), Normalized Effective Transient Thermal Resistance Single Pulse 0.01 0.02 0.05 0.1 0.2 D=0.5 1.RθJA(t)=r(t)*RθJA 2.Duty Factor, D=t1/t2 3.TJM-TA=PDM*RθJA(t) 4.RθJA=50°C/W
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 7/9 MTD07N04V8 CYStek Product Specification Reel Dimension Carrier Tape Dimension Pin #1
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 8/9 MTD07N04V8 CYStek Product Specification Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Pb-free Assembly Average ramp-up rate (Tsmax to Tp) 3°C/second max. 3 °C/second max. Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds Time maintained above: −Temperature (TL) − Time (tL) 183°C 60-150 seconds 217°C 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C 260 +0/-5 °C Time within 5°C of actual peak temperature(tp) 10-30 seconds 20-40 seconds Ramp down rate 6°C/second max. 6 °C/second max. Time 25 °C to peak temperature 6 minutes max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface.
CYStech Electronics Corp. Spec. No. : C140V8 Issued Date : 2018.01.31 Revised Date : Page No. : 9/9 MTD07N04V8 CYStek Product Specification DFN3×3 Dimension D3 0.13 TYP 0.005 TYP θ 8° 12 ° 8 ° 12 ° Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material:
- Lead: pure tin plated.
- Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice:
- All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
- CYStek reserves the right to make changes to its products without notice.
- CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
- CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. Marking: 8-Lead DFN3×3 Plastic Package CYStek Package Code: V8 Date Code S S S G D D D D D07 N04