MTC24

74LCX652 FAIRCHILD | Alldatasheet

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I 5V tolerant inputs and outputs I 2.3V − 3.6V VCC specifications provided I 7.0 ns tPD max (VCC = 3.3V), 10 µA ICC max I Power down high impedance inputs and outputs I Supports live insertion/withdrawal (Note 1) I ±24 mA output drive (VCC = 3.0V) I Implements patented noise/EMI reduction circuitry I Latch-up performance exceeds 500 mA I ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Order Number Package Number Package Description 74LCX652WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74LCX652MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74LCX652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description A0–A7, B0–B7 A and B Inputs/3-STATE Outputs CPAB, CPBA Clock Inputs SAB, SBA Select Inputs OEAB, OEBA Output Enable Inputs

www.fairchildsemi.com 2 74LCX652 Logic Symbols IEEE/IEC Truth Table (Note 2) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial /c17 = LOW-to-HIGH Clock Transition Note 2: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. Inputs Inputs/Outputs Operating Mode OEAB OEBA CPAB CPBA SAB SBA A 0 thru A7 B 0 thru B7 L H H or L H or L X X Input Input Isolation LH /c17/c17 X X Store A and B Data XH /c17 H or L X X Input Not Specified Store A, Hold B HH /c17/c17 X X Input Output Store A in Both Registers LX H o r L /c17 X X Not Specified Input Hold A, Store B LL /c17/c17 X X Output Input Store B in Both Registers L L X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus H H X X L X Input Output Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus

3 www.fairchildsemi.com 74LCX652 Functional Description In the transceiver mode, data present at the HIGH imped- ance port may be stored in either the A or B register or both. The select (SAB, SBA) controls can multiplex stored and real-time. The examples below demonstrate the four fundamental bus-management functions that can be performed with the Octal bus transceiver and receiver. Data on the A or B data bus, or both can be stored in the internal D flip-flop by LOW to HIGH transitions at the appropriate Clock Inputs (CPAB, CPBA) regardless of the Select or Output Enable Inputs. When SAB and SBA are in the real time transfer mode, it is also possible to store data without using the internal D flip-flops by simultaneously enabling OEAB and OEBA . In this configuration each Out- put reinforces its Input. Thus when all other data sources to the two sets of bus lines are in a HIGH impedance state, each set of bus lines will remain at its last state. Real-Time Transfer Bus B to Bus A Real-Time Transfer Bus A to Bus B Transfer Storage Data to A or B Storage OEAB OEBA CPAB CPBA SAB SBA LL X X X L OEAB OEBA CPAB CPBA SAB SBA HHX XL X OEAB OEBA CPAB CPBA SAB SBA H L H or L H or L H H OEAB OEBA CPAB CPBA SAB SBA XH /c17 XX X LXX /c17 XX LH /c17/c17 XX

www.fairchildsemi.com 4 74LCX652 Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

5 www.fairchildsemi.com 74LCX652 Absolute Maximum Ratings(Note 3) Recommended Operating Conditions (Note 5) Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom- mended Operating Conditions” table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Unused inputs or I/Os must be held HIGH or LOW. They may not float. Symbol Parameter Value Conditions Units VCC Supply Voltage −0.5 to +7.0 V VI DC Input Voltage −0.5 to +7.0 V VO DC Output Voltage −0.5 to +7.0 Output in 3-STATE V−0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 4) IIK DC Input Diode Current −50 V I < GND mA IOK DC Output Diode Current −50 V O < GND mA+50 V O > VCC IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to +150 °C Symbol Parameter Min Max Units VCC Supply Voltage Operating 2.0 3.6 VData Retention 1.5 3.6 VI Input Voltage 0 5.5 V VO Output Voltage HIGH or LOW State 0 V CC V3-STATE 0 5.5 IOH /IOL Output Current V CC = 3.0V − 3.6V ±24 mAVCC = 2.7V − 3.0V ±12 VCC = 2.3V − 2.7V ±8 TA Free-Air Operating Temperature −40 85 °C ∆t/∆V Input Edge Rate, V IN = 0.8V − 2.0V, VCC = 3.0V 0 10 ns/V Symbol Parameter Conditions VCC TA = −40°C to +85°C Units (V) Min Max VIH HIGH Level Input Voltage 2.3 − 2.7 1.7 V 2.7 − 3.6 2.0 VIL LOW Level Input Voltage 2.3 − 2.7 0.7 V 2.7 − 3.6 0.8 VOH HIGH Level Output Voltage I OH = −100 µA2 . 3 − 3.6 V CC − 0.2 V IOH = −8 mA 2.3 1.8 IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 IOH = −24 mA 3.0 2.2 VOL LOW Level Output Voltage I OL = 100 µA2 . 3 − 3.6 0.2 V IOL = 8 mA 2.3 0.6 IOL = 12 mA 2.7 0.4 IOL = 16 mA 3.0 0.4 IOL = 24 mA 3.0 0.55 II Input Leakage Current 0 ≤ VI ≤ 5.5V 2.3 − 3.6 ±5.0 µA IOZ 3-STATE I/O Leakage 0 ≤ VO ≤ 5.5V 2.3 − 3.6 ±5.0 µA VI = VIH or VIL IOFF Power-Off Leakage Current V I or VO = 5.5V 0 10 µA

www.fairchildsemi.com 6 74LCX652 Note 6: Outputs disabled or 3-STATE only. Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL ) or LOW-to-HIGH (tOSLH ). Parameter guaranteed by design. Dynamic Switching Characteristics Capacitance Symbol Parameter Conditions VCC TA = −40°C to +85°C Units (V) Min Max ICC Quiescent Supply Current V I = VCC or GND 2.3 − 3.6 10 µA ∆ICC Increase in ICC per Input V IH = VCC −0.6V 2.3 − 3.6 500 µA Symbol Parameter TA = −40°C to +85°C; RL = 500Ω Units C L = 50 pF C L = 50 pF C L = 30 pF Min Max Min Max Min Max fMAX Maximum Clock Frequency 150 MHz ns ns ns ns ns tS Setup Time 2.5 2.5 4.0 ns tH Hold Time 1.5 1.5 2.0 ns tW Pulse Width 3.3 3.3 4.0 ns tOSHL Output to Output Skew (Note 7) 1.0 ns tOSLH 1.0 Symbol Parameter Conditions VCC TA = 25°C Units (V) Typical VOLP Quiet Output Dynamic Peak VOL C L = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V C L = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6 VOLV Quiet Output Dynamic Valley VOL C L = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 V C L = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.6 Symbol Parameter Conditions Typical Units C IN Input Capacitance V CC = Open, VI = 0V or VCC 7p F C I/O Input/Output Capacitance V CC = 3.3V, VI = 0V or VCC 8p F C PD Power Dissipation Capacitance V CC = 3.3V, VI = 0V or VCC , f = 10 MHz 25 pF

www.fairchildsemi.com 8 74LCX652 Schematic Diagram Generic for LCX Family

9 www.fairchildsemi.com 74LCX652 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

www.fairchildsemi.com 10 74LCX652 Low Voltage Transceiver/Register with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com