Power Management

MT6370

MediaTek Inc.

MT6370 Power Management IC Version: 1.0 2023-09-18

Manufacturer: MediaTek Inc.

Document: 28 Pages / 941Kb

Request Quote Download Datasheet Read online HTML view

Read MT6370 online.

MT6370 MEDIATEK | Alldatasheet

Document overview

Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
PDF pages: 28

Technical content

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. Use of this document and any information contained therein is subject to the terms and conditions set forth in Exhibit 1. This document is subject to change without notice. Version: 1.0 Release date: 2023-09-18 The full datasheet is available with an NDA MT6370 Power Management IC Product Brief

1 Overview

Features

Battery Charger – High-Accuracy Voltage/Current Regulation – Average Input Current Regulation (AICR) : 0.1A to 3.25A in 50mA steps – Charge Current Regulation Accuracy : ±7% – Charge Voltage Regulation Accuracy : ±0.5% (0 to 70°C) – Battery Temperature Sensing – Synchronous 1.5Mz Frequency PWM Controller with Up to 95% Duty Cycle – Thermal Regulation and Protection – Over-Temperature Protection – Input Over-Voltage Protection – IRQ Output for Communication via I 2C – Automatic Charging – BATFET Control to Support Ship Mode, Wake Up, and Full System Reset – Resistance Compensation from Charger Output to Cell Terminal – USB OTG Output Voltage Range : 4.425V to 5.825V – D+/D- Detection for BC1.2 – Integrated ADCs for System Monitoring (Charger Current, Voltage, and Temperature) – JEITA Thermal Comparator Accuracy ±1% VTS – Low Battery Protection from 2.3V to 3.8V for Boost Operation – Initial VOREG Set for Relieve Battery Protection – External OVP MOSFET Driving for Higher Surge Application, Up to AMR 28V
USB_PD – PD-Compatible Dual-Role – Attach/Detach Detection as Host, Device or Dual-Role Port – Current Capability Definition and Detection – Cable Recognition – Alternate Mode Supported – Supports VCONN with Programmable Over-Current Protection (OCP) – Dead Battery Support – Ultra-Low Power Mode for Attach Detection (<10mA) – BIST Mode Supported – USB PD3.0
Backlight WLED Driver – Drives up to 4 Strings of 8 series WLEDs – External PWM Pin and I2C-Controlled with Programmable 11 bits of Linear and Exponential Brightness – I2C-Programmable Over-Voltage Protection (OVP) Threshold – Supports Torch Mode and Strobe Mode for Front Cameras

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief – Auto Switch Frequency Mode (500kHz, 1MHz) – Four Over-Voltage Protection Thresholds (17V, 21V, 25V, and 29V) – Four Over-Current Protection Thresholds (900mA, 1200mA, 1500mA, and 1800mA) – Front-Facing Flash with 300% Brightness for Selfshot

Flash LED Driver – Synchronous Boost Dual Flash LED Driver with Dual Independently-Programmable LED Current Sources – Torch Mode Current : from 25mA to 400mA in 12.5mA Steps per Channel – I2C-Programmable Flash Safety Timer, from 64ms to 2432ms with 32ms/Step – Flash LED1/LED2 Short-Circuit Protection, and Output Short-Circuit Protection – TXMask Protection with dedicated FL_TXMASK Pin – Shared Charger/OTG as Power Stage – Independent Torch Bypass MOSFET from VSYS – Strobe Mode Current : 50mA to 1.5A in 12.5mA Steps or 25mA to 750mA in 6.25mA Steps per Channel, and Up to 2.5A in Total
Display Bias Driver – I2C-Programmable Output Voltages – Flexible Output Voltages (VDB_BST, VDB_POS, VDB_NEG) Setting – Boost Converter Output Voltage (VDB_BST) Range : 4V to 6.2V, 50mV/Step – Positive Voltage Output (VDB_POS) Range : 4V to 6V, 50mV/Step – Negative Voltage Output (VDB_NEG) Range : -4V to -6V, 50mV/Step – Selectable Output Mode (Fast Discharge or Float) when Positive/Negative Voltage Output Disabled – External Independent Positive/Negative Enable Control – True Load Disconnect, Over-Current Protection, and Positive/Negative Short-Circuit Protection Function – Output Current : 80mA – Power-Saving by Periodic Mode
LDO – Output Voltage Range : 1.6V to 4V, 200mV/Step – Output Current : 400mA – High PSRR and Low Dropout LDO
RGB LED Driver – 4-Channel LED Driver – Sink Current for 3 RGB LEDs : 24mA/Channel in 4mA Steps – PWM Dimming Frequency Range : 0.1Hz to 1kHz – RGB_ISINK4 for CHG_VIN Power Good Indicator – Support Register Mode, PWM Mode, and Breath Mode

Applications

Cellular Telephones
Personal Information Appliances
Tablet PCs
Portable Instruments
Industrial HMI, desktop POS, KIOSK, digital signage

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief General Descriptions The MT6370 is a highly-integrated smart power management IC, which includes a single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C & Power Delivery (PD) controller, dual Flash LED current sources, a RGB LED driver, a backlight WLED driver, a display bias driver and a general LDO for portable devices. The switching charger integrates a synchronous PWM controller, power MOSFETs, input current sensing and input current regulation, high-accuracy voltage regulation, and charge termination circuitry. Besides, the charge current is regulated through the integrated sensing resistors. It also features USB On-The-Go (OTG) support. The USB Type-C & PD controller complies with the latest USB Type-C and PD standards. It integrates a complete Type-C transceiver including the Type-C termination resistors, Rp and Rd, and enables the USB Type-C detection including attach and orientation. It also integrates the physical layer of the USB BMC power delivery protocol, allowing power transfers and role swaps. The BMC PD function provides full support for alternate modes on the USB Type-C standard. Dual independent current sources supply for each flash LED. The power for the current sources in strobe mode are from the CHG_VMID pin, which is supplied from the charger in reverse boost mode, the same operation as OTG mode of the charger. The high-side current sources, allowing for grounded-cathode connection for LEDs, provide strobe mode current levels from 25mA to 1.5A in a 12.5 mA step or from 25mA to 750mA in a 6.25mA step and torch mode current levels from 25mA to 400mA in a 12.5mA step. The two channels can support totally up to 2.5A. The backlight WLED driver supports up to a 29V output voltage for 4 channels of 8 series WLEDs. Each channel supports up to 30mA of current capability with 2048 current steps in exponential or linear mapping curves. The backlight brightness is controlled by the I 2C interface and an external PWM control. The PWM frequency range is from 50Hz to 50kHz. The MT6370 can also support torch/strobe backlight modes with regulated constant current for front camera screen flash applications. The display bias driver (DB) is implemented with a single-inductor boost and an inverting charge pump to achieve a smaller PCB area, compared with a dual-inductor boost converter. The display bias driver is used to provide a negative voltage output (VDB_NEG) through the DB_NEGVOUT pin and a positive voltage output (VDB_POS) through the DB_POSVOUT pin. The negative voltage output comes from the boost converter output voltage (VDB_BST) at the DB_BSTVOUT pin, and the positive voltage output is from the DB_POSVOUT voltage passing through an LDO to reduce power noise. The VDB_POS and VDB_NEG voltage ranges can be programmed from 4V to 6V and from -4V to -6V with a resolution of 50mV, respectively. These two output rails, usually connected to a Source Driver IC, can support up to 50mA output current capability to drive up to 10" TFT-LCD panels. The LDO can be used to supply power to an Eccentric Rotating Mass (ERM) Motor in mobile phones and other hand-held devices. The output voltage is programmable in the range of 1.6V to 4V via the I 2C interface. The RGB LED driver is a 4-Channel smart LED string controller to drive 3 channels of LEDs with a sink current of up to 24mA and a CHG_VIN power good indicator with a sink current of up to 6mA. All channels can be set independently via the I interface, and are provided with three operation modes: Register Mode, PWM Mode and Breath Mode. The MT6370 is available in a WL-CSP-93B 4.22x4.32 (BSC) package.

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Table 1-1. MT6370 pin descriptions Pin No. Pin Name Pin Description A1, A2, A3 CHG_VIN Charger power input. A4 D- USB D- port. A5 D+ USB D+ port. A6 FL_LEDCS2 High-side current source output 2 for flash LED2. A7 FL_LEDCS1 High-side current source output 1 for flash LED1. A8 PD_VBUS VBUS input for attach and detach detection when the device operates as an UFP port. A9 PD_CC2 Type-C connector Configuration Channel (CC) 2, used to detect a cable plug event and determine the cable orientation. A10 BL_VLX Backlight boost converter switch node. Connect a 10µH inductor between BL_VLX and VSYS. B1, B2, B3 CHG_VMID Connection point between the reverse-blocking MOSFET and the high-side switching MOSFET. B4, B5, B6 FL_VMID Flash LED driver power input for strobe mode. Connect a 4.7µF ceramic capacitor between FL_VMID and ground. B8 PD_IRQB Interrupt output, active-low open-drain, to request the processor to check the registers. B9 PD_VCONN5V Regulated input voltage to power PD_C C pins as VCONN. B10 BL_PGND Backlight ground. Tie BL_PGND and groun d on the PCB. C1, C2, C3 CHG_VLX Charger switch node for output i nductor connection. C4 NC No internal connection. C6 FL_VINTORCH Flash LED driver power input for tor ch mode. C8 CHG_ILIM Input current limit setting pin. A resistor is connected from CHG_ILIM pin to ground to set the maximum input current limit. The actual input current limit is the lower value set through the CHG_ILIM pin and IAICR register bits. C9 PD_CC1 Type-C connector Configuration Channel (CC) 1, used to detect a cable plug event and determine the cable orientation. C10 BL_VDDA Backlight analog power supply. Connect a 1µF ceramic capacitor between BL_VDDA and ground. D1, D2, D3 CHG_PGND Charger ground. Tie CHG_PGND an d ground on the PCB. D4 CHG_BOOT Charger bootstrap voltage to supply the high-side MOSFET gate driver. Connect a capacitor between CHG_BOOT and CHG_VLX. D5 VBATS Battery voltage-sense input. D6 FL_STROBE Flash LED Strobe mode enable input. D7 FL_TORCH Flash LED Torch mode enable input. D8 CHG_OTG OTG boost mode enable control, active-hi gh. Act with OTG_Pin_EN (0x11[1]). D9 BL_VOUT Backlight output voltage. D10 BL_LED1 Backlight current regulator output 1. E1, F1, F2 VSYS System connection node. Internal BATFET is connected between VSYS and VBAT. Connect a 22µF ceramic capacitor between VSYS and ground. E2 VBUS VBUS input voltage for over-voltage protect ion detection. E3 CHG_VDDP Regulated output voltage to supply for the PWM low-side gate driver and the bootstrap capacitor. Connect a 1µF ceramic capacitor CHG_VDDP to ground. 1. If VBUS is plugged in, CHG_VDDP will be powered by VBUS and regulated to 4.9V. 2. If VBUS is unplugged, the charger will operate in sleep mode and the CHG_VDDP voltage will be 0V. * For 2. : Since the CHG_VDDP voltage is also used to power the TS resistor, when the charger is in sleep mode, the CHG_VDDP will be woken up (be

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Pin No. Pin Name Pin Description reactivated) if VBAT is greater than forward voltage (VF) of the internal high-side (HS) MOS diode by VSLEEP_EXIT with all function of the internal ADC being activated. The CHG_VDDP wake-up time is 500ms. E4 OVP_CTRL Input over-voltage protection (IN_OVP) control input. E5, E6, E7, F5, F6, F7, G5, G6, G7, G9 AGND Analog ground. Tie AGND and ground on the PCB. E8 CHG_QONB Internal BATFET enable control input. In shipping mode, CHG_QONB is pulled Low for the duration of tSHIPMODE_CHG (typical 0.9s) to exit shipping mode. E9 CHG_ENB Charger enable input, active-low. E10 BL_LED2 Backlight current regulator output 2. F3 CHG_VBATOVPB Battery over-voltage protection (BAT OVP) indication, open–drain and active-low output: Low if BAT OVP occurs, and High, otherwise. F4 NC No internal connection. F8 CHG_DSEL Open-drain output. When the device starts to detect input power source, CHG_DSEL drives Low to indicate that detection is in progress and the device needs to take control of the D+ and D- signals. When detection is completed, CHG_DSEL holds Low if DCP (Dedicated Charging Port) or HVDCP adapter is detected. CHG_DSEL returns to High if SDP (Standard Downstream Port) or CDP (Charging Downstream Port) is detected. F10 BL_LED3 Backlight current regulator output 3. G1, G2, H1, H2 VBAT Charge current output node for battery connection. The internal BATFET is connected between VSYS and VBAT. Connect a 10µF ceramic capacitor between VBAT and ground. G4 CHG_STAT Charge status indication, open-drain output that indicates charge is in progress when held low and charge is finished when held High. If any fault occurs, CHG_STAT will blink at the frequency of 1Hz. Connect a 2.2k to 10kΩ pull-up resistor. G8 FL_TXMASK Configurable power amplifier synchronization input or configurable active-high torch mode enable. Connect an internal pull-down resistor of 300kΩ between FL_TXMASK and ground. G10 BL_LED4 Backlight current regulator output 4. H4 RGB_ISINK4 RGB LED current sink output 4. H5 RGB_ISINK1 RGB LED current sink output 1. H6 DB_ENN Enable control input for DB_NEGVOUT. H7 DB_ENP Enable control input for DB_POSVOUT. H8 MRSTB Manual reset input for hardware reset. H9 BL_PWM Backlight PWM dimming control input. H10 BL_EN Backlight enable control input. J1 LDO_VOUT LDO output. Connect a 2.2µF ceramic capacitor between LDO_VOUT and ground. J2 LDO_VIN LDO power input. Connect a 2.2µF ceramic capacitor between LDO_VIN and ground. J3 TS Battery temperature-sense input, connected to a resistor divider for temperature programming. If there is no need for the battery temperature- sense function, a 50kΩ resistor is connected to CHG_VDDP and another 50kΩ resistor to ground. J4 RGB_ISINK3 RGB LED current sink output 3. J5 RGB_ISINK2 RGB LED current sink output 2. J6 IRQB Interrupt output, active-low open-drain, to request the processor to read the registers.

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Pin No. Pin Name Pin Description J8 SCL I2C interface serial clock input. Open-drain. An external pull-up resistor is required. J9 SDA I2C interface serial data input/output. Open-drain. An external pull-up resistor is required. J10 VDDA Regulated power input for an internal analog base. Connect a 1µF ceramic capacitor between VDDA and ground. K1 DB_NEGVOUT Display bias negative voltage output from the inverting charge pump. Connect a 10µF ceramic capacitor between DB_NEGVOUT and ground. K2 DB_NEGCF2 Inverting charge pump connection point for negative terminal of the flying capacitor. Connect a 10µF ceramic capacitor between DB_NEGCF2 and DB_NEGCF1. K3 DB_NEGPGND Display bias negative-voltage power ground. Tie DB_NEGPGND and ground on the PCB. K4 DB_NEGCF1 Inverting charge pump connection point for positive terminal of the flying capacitor. Connect a 10µF ceramic capacitor between DB_NEGCF2 and DB_NEGCF1. K5 DB_POSVOUT Display bias positive voltage output from the LDO. Connect a 10µF ceramic capacitor between DB_POSVOUT and ground. K6 DB_BSTVOUT Display bias boost converter output. Connect a 10µF ceramic capacitor between DB_BSTVOUT and ground. K7 DB_POSVLX Display bias boost converter switch node. Connect a 2.2μH inductor between DB_POSVLX and VSYS. K8 DB_POSPGND Display bias positive-voltage power ground. Tie DB_POSPGND and ground on the PCB. K9 VDDM Regulated voltage output. Connect a 1μF ceramic capacitor between VDDM and PGND. It also provides power to all VDDA-powered circuits. K10 DB_VDDA Display bias analog power supply. Connect a 1µF ceramic capacitor between DB_VDDA and ground.

2 Electrical Characteristics

(1)

Power Dissipation, PD @ T A = 25°C
Package Thermal Resistance (2)
ESD Susceptibility (3) (1) Note 1 Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. (2) Note 2 θJA is measured under natural convection (still air) at T A = 25 °C with the component mounted on a high effective-thermal- conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. (3) Note 3 Devices are ESD sensitive. Handling precaution recommended. Recommended Operating Range (Note) Note. The device is not guaranteed to function outside its operating conditions.

Electrical Characteristics

VCHG_VIN = 5V, V BAT = 4.2V, L2 = 1µH, C2 = 2.2µF, C19 = 10µF, T A = 25 °C, unless otherwise specified Table 2-1. Electrical specifications Parameter Symbol Test Conditions Min Typ Max Unit Quiescent Current Shutdown Current I SHDN On VBAT pin, with all channels shut down, V BAT = 4V -- 60 85 µA Shipping-Mode Current IBAT_SHIP VBAT only, in shipping mode -- 31 46 µA VBUS Supply Current I VBUS VCHG_VLX is non-switching, V BUS = 5V, V BAT = V CV_CHG , ICHG = 0, Flash LED, LDO, Backlight and RGB devices disabled, PD Cable attached (Full functions are not in the communication situation) -- 8.55 11.12 mA VBUS Supply Current with PD Communication I VBUS_ PDTX_ON VCHG_VLX is non-switching, V BUS = 5V, V BAT = V CV_CHG , I CHG = 0, Flash LED, LDO, Backlight and RGB drivers disabled, PD Cable attached (Full functions are in the communication situation) -- 12.55 16.31 mA VBUS Supply Current with Charger in H-Z Mode I VBUS_HZ VCHG_VLX is in high-impedance mode, VBUS = 5V, V BAT = VCV_CHG Flash LED, LDO, Backlight and RGB devices disabled, PD in ultra-low power mode -- 810 1053 µA BAT Supply Current I BAT_LDO_ON VBUS = 0V, V BAT = 3.8V, charger, Flash LED, Backlight and RGB devices disabled, LDO enabled with load = 0, PD in ultra-low power mode -- 200 300 µA BAT Supply Current I BAT_DB_ON VBUS = 0V, V BAT = 3.8V, charger, Flash LED, Backlight and RGB devices disabled, display bias driver enabled with load = 0, PD in ultra-low power mode -- 1750 2100 µA Over-Temperature Protection Threshold T OTP Thermal shutdown threshold temperature -- 160 -- °C Over-Temperature Protection Hysteresis T OTP_HYS Thermal shutdown hysteresis temperature -- 20 -- °C Control I/O Pin & VDDA Logic-Low Threshold Voltage for All Open- Drain Outputs V OL I DS = 10mA -- -- 0.4 V Logic-High Threshold Voltage for All Inputs V IH Logic high threshold 1.2 -- -- V Logic-Low Threshold Voltage for All Inputs V IL Logic low threshold -- -- 0.4 V VDDA Under-Voltage Protection Threshold V VDDA_UVLO V DDA falling 2.3 2.4 2.5 V VDDA Under-Voltage Protection Hysteresis V VDDA_UVLO_ HYS VDDA rising -- 0.1 -- V VDDA Over-Voltage Protection Threshold V VDDA_OVP V DDA rising 5.7 5.95 6.2 V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit VDDA Over-Voltage Protection Hysteresis V VDDA_OVP_HYS VDDA falling -- 0.2 -- V Pull-Down Resistance on MRSTB R L_MRSTB -- 300 -- kΩ OVP Controller VBUS POR Threshold for CHG_VIN Only V POR_OVP V BUS rising 2.5 2.7 2.9 V VBUS POR Hysteresis Only for CHG_VIN V POR_OVP_HYS V BUS falling -- 100 -- mV POR Deglitch Time Only for CHG_VIN tD_POR_OVP V BUS = 5V to 12V 22.4 32 41.6 ms Over-Voltage Protection Threshold V OVP V BUS rising 15.5 16.5 17.5 V Over-Voltage Protection Hysteresis V OVP_HYS V BUS falling -- 200 -- mV OVP Propagation Delay for MOS Turned Off t PD_OVP VBUS from 12V to 20V, (6V/µs), Q g of MOS at V GS = 4.5V < 20nC -- 0.18 0.25 µs OVP Recovery Delay t RD_OVP V BUS from 20V to 12V 5.6 8 10.4 ms Charger Sleep-Mode Entry Threshold, VBUS-VBAT VSLEEP_ ENTER_CHG VBUS falling, 2.5V < V BAT < V OREG_CHG 0 0.04 0.1 V Sleep-Mode Exit Threshold, VBUS-VBAT VSLEEP_EXIT_ CHG VBUS rising, 2.5V < V BAT < V OREG_CHG 0.04 0.1 0.2 V Sleep-Mode Exit Deglitch Time t D_SLEEP_ EXIT_CHG Exit sleep-mode -- 120 -- ms CHG_VIN Bad Adapter Threshold V BAD_ADP_CHG -- 3.8 -- V CHG_VIN Bad Adapter Hysteresis V BAD_ADP_ HYS_CHG -- 150 -- mV CHG_VIN Bad Adapter Sink Current I BAD_ADP_ SINK_CHG -- 50 -- mA CHG_VIN Bad Adapter Detection Time t BAD_ADP_ DET_CHG -- 30 -- ms Input Current Limit Factor K ILIM_CHG Input current regulation 508mA by ILIM pin with resistance = 698Ω 320 355 390 AΩ CHG_VIN Minimum Input Voltage Regulation (MIVR) Threshold V MIVR_CHG I 2C programmable range in 0.1V steps 3.9 -- 13.4 V CHG_VIN Minimum Input Voltage Regulation Accuracy V MIVR_ACC_CHG VMIVR = 4.4V or 9V -2 -- 2 % AICR 100mA Mode IAICR_100mA_ CHG IAICR = 100mA, V CHG_VIN = 5V, VBAT = 3.8V 86 93 100 mA AICR 500mA Mode IAICR_500mA_ CHG IAICR = 500mA, V CHG_VIN = 5V, VBAT = 3.8V 440 470 500 mA AICR 1000mA Mode IAICR_1000mA_ CHG IAICR = 1000mA, V CHG_VIN = 5V, VBAT = 3.8V 880 940 1000 mA AICR 1500mA Mode IAICR_1500mA_ CHG IAICR = 1500mA, V CHG_VIN = 5V, VBAT = 3.8V 1300 1400 1500 mA CHG_VIN UVLO V UVLO_CHG V CHG_VIN rising 3.05 3.3 3.55 V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit CHG_VIN UVLO Hysteresis V UVLO_HYS_CHG VCHG_VIN falling -- 150 -- mV CHG_VIN Over-Voltage Protection Threshold V CHG_VIN_OVP_ CHG VCHG_VIN rising 13.5 14.5 15.5 V CHG_VIN Over-Voltage Protection Hysteresis V CHG_VIN_OVP_HYS_C HG VCHG_VIN falling -- 250 -- mV VBAT Over-Voltage Protection Threshold V BAT_OVP_CHG VBAT rising, as percentage of V OREG_CHG , as V BAT_OVP /V OREG_CHG 106 108 110 % VBAT Over-Voltage Protection Hysteresis V BAT_OVP_ HYS_CHG VBAT falling, as (V BAT_OVP_HYS )/V OREG_CHG -- 4 -- % Thermal Regulation Threshold t THREG_CHG Charge current starts decreasing (default) -- 120 -- °C VSYS Over-Voltage Protection Threshold V SYS_OVP_CHG VSYS rising 4.9 5.25 5.5 V VSYS Under-Voltage Protection V SYS_UVP_CHG VSYS falling 2.2 2.4 2.6 V End of Charge Battery Regulation Voltage Range V OREG_CHG I 2C programmable in 10mV steps 3.9 -- 4.71 V Battery Regulation Voltage Accuracy V OREG_ACC_CHG VOREG_CHG = 4.2V, 4.35V, 4.36V, 4.37V or VOREG_CHG = 4.38V (T C = 0°C to 70°C) (3) -0.5 -- 0.5 % Re-charge Mode Threshold V RECH_CHG I2C programmable, V BAT falling, the difference below V OREG_CHG 50 100 150 mV Re-charge Deglitch Time t D_RECH_CHG V BAT falling -- 120 -- ms End-of-charge Current IEOC_CHG I 2C programmable in 50mA steps 100 -- 850 mA Default End-of-charge Current I EOC_DEF_CHG Default. -- 250 -- mA End-of-charge Current Accuracy I EOC_ACC I EOC_CHG = 100 to 850mA -20 -- 20 % End-of-charge Deglitch Time t D_EOC_CHG I2C default, I CHG < I EOC_CHG , V BAT > VRECH_CHG -- 2 -- ms Charge Current I CHG I2C programmable in 0.1A steps, 0x17 bit[7:2] 0.5 -- 5 A ICHG Current Accuracy 1 I CHG_ACC1_CHG VBAT = 3.8V, I CHG = 500mA, (T C = -30°C to 65°C) -20 -- 20 % ICHG Current Accuracy 2 I CHG_ACC2_CHG VBAT = 3.8V, 500mA < I CHG < 1000mA, (T C ICHG Current Accuracy 3 I CHG_ACC3_CHG VBAT = 3.8V, I CHG > 1000mA, (T C = -30°C to 65°C) -7 -- 7 % Pre-Charge Mode Threshold V PRECHG_CHG I2C programmable in 0.1V steps, rising 2.0 -- 3.5 V Pre-Charge Mode Hysteresis V PRECHG_ HYS_CHG Pre-charge hysteresis, falling -- 0.2 -- V Pre-Charge Threshold Accuracy V PRECHG_ ACC_CHG VBAT < V PREC_CHG -5 -- 5 % Pre-Charge Current I PRECHG_CHG I2C programmable (default) -- 150 -- mA Pre-Charge Current Accuracy I PRECHG_ ACC_CHG -20 -- 20 % VSYS Regulation Voltage V SYS_MIN_CHG I2C programmable in 0.1V steps 3.3 -- 4 V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit VSYS Regulation Voltage Accuracy V SYS_MIN_ ACC_CHG -3 -- 3 % UUG On-Resistance R ON_UUG_CHG From VBUS to CHG_VMID -- 14 30 mΩ UG On-Resistance R ON_UG_CHG From CHG_VMID to CHG_VLX -- 28 40 mΩ LG On-Resistance R ON_LG_CHG From CHG_VLX to PGND -- 28 40 mΩ PPMOS On-Resistance RON_PPMOS_CHG From VSYS to VBAT -- 13 30 mΩ Switching Frequency f OSC1_CHG I 2C programmable to 1.5 MHz -- 1.5 -- MHz Switching Frequency Accuracy f OSC_ACC_CHG -10 -- 10 % Maximum Duty Cycle D MAX_CHG -- 97 -- % Minimum Duty Cycle D MIN_CHG 0 -- -- % VDDP Regulation V VDDP_CHG V BUS = 5V 4.5 4.9 5.3 V Buck OCP Current I BUCK_OCP_CHG REG0x1D[2] = 1’b0 4 6 8 A REG0x1D[2] = 1 ‘b1 5.6 8 10.4 Sink Current for Battery Detection IBAT_SINK_CHG -- 300 -- µA Internal QONB Pull-Up Resistance R QONB_CHG 90 125 160 kΩ QONB Exit Shipping Mode Duration t SHIPMODE_CHG CHG_QONB Low for BATFET on-time to exit shipping mode 0.81 0.9 0.99 s QONB System Reset Duration t QONB_RST_CHG CHG_QONB low time to enable full system reset 12 15 18 s BATFET Reset Time t BATFET_RST_CHG BATFET off-time during full system reset 0.54 0.6 0.66 s Shipping Mode Entry Deglitch Time t D_SHIP_ENTER Enter shipping mode delay -- 9 -- s AICL V AICL_CHG V BUS rising, I 2C programmable -- 4.6 -- V AICL Hysteresis V AICL_HYS_CHG -- 50 -- mV OTG Output Regulation VBSTCV_CHG I 2C programmable default -- 5.05 -- V OTG Output Accuracy V BSTCV_ACC_CHG IVBUS = no load, VOBST = 5.05V -3 -- 3 % OTG Over-Load Protection Threshold I BST_0.5A_CHG REG0x1A[2:0] = 3’b000 0.5 0.55 0.6 A OTG CHG_VMID Over- Voltage Protection Threshold V MIDOVP_ OTG_CHG VCHG_VMID rising 4.2 6 -- V OTG CHG_VMID Over- Voltage Protection Hysteresis V MIDOVP_OTG_ HYS_CHG -- 200 -- mV OTG VBAT Under- Voltage Protection Threshold V BAT_UVP_ OTG_CHG I2C default, VBAT falling -- 2.8 3.08 V OTG VBAT Under- Voltage Protection Hysteresis V BAT_UVP_OTG_HYS_C HG Rising -- 400 -- mV OTG Over-Current Protection Threshold I OTG_OCP_CHG Default = 6.05A 5.2 6.05 6.9 A Battery Temperature HOT Threshold V VTS_HOT_CHG VTS falling, the ratio of CHG_VDDP 33.5 34.5 35.5 %VTS Battery Temperature WARM Threshold V VTS_WARM_CHG VTS falling, the ratio of CHG_VDDP 44 45 46 %VTS

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit Battery Temperature COOL Threshold V VTS_COOL_CHG VTS rising, the ratio of CHG_VDDP 67.5 68.5 69.5 %VTS Battery Temperature COLD Threshold V VTS_COLD_CHG VTS rising, the ratio of CHG_VDDP 72.5 73.5 74.5 %VTS Battery Temperature Hysteresis V VTS_HYS_CHG -- 2 -- %VTS VDP_SRC Voltage V DP_SRC_CHG With IDAT_SRC = 0 to 250µA 0.5 -- 0.7 V VDAT_REF Voltage V DAT_REF_CHG 0.25 -- 0.4 V VLGC Voltage V LGC_CHG 0.8 -- 2 V IDM SINK Current IDM_SINK May be a resistance if de sired 50 100 150 µA Data Contact Timeout tDCDT Setting by register 0x22[5:4] -- 600 -- ms Dedicated Charging Port resistance across D+/- R D+D- DCP REG0x24[1] = 1’b1 50 90 130 Ω Pull-Down Resistance on CHG_OTG R L_CHG_OTG -- 100 -- kΩ Pull-Down Resistance on CHG_ENB R CHG_ENB -- 100 -- kΩ ADC ADC Conversion Time t CONV_ADC One channel 35 -- 200 ms Number of Bits for ADC Resolution R ES_ADC -- 10 -- bits VBUS_DIV5 Measurement Range V VBUS_DIV5_ADC_RAN GE 1 -- 22 V VBUS_DIV5 Resolution VVBUS_DIV5ADC_RES -- 25 -- mV VBUS_DIV5 Accuracy V VBUS_DIV5ADC_ACC -3 -- 3 LSB VBUS_DIV2 Measurement Range V VBUS_DIV2_ADC_RAN GE 1 -- 9.7 V VBUS_DIV2 Resolution VVBUS_DIV2ADC_RES -- 10 -- mV VBUS_DIV2 Accuracy V VBUS_DIV2ADC_ACC -3 -- 3 LSB VBAT Measurement Range V BAT_ADC_ RANGE 0 -- 4.9 V VBAT Resolution V BAT_ADC_RES -- 5 -- mV VBAT Accuracy V BAT_ADC_ACC -2 -- 2 LSB VSYS Measurement Range V SYS_ADC_RANGE 0 -- 4.9 V VSYS Resolution V SYS_ADC_RES -- 5 -- mV VSYS Accuracy V SYS_ADC_ACC -2 -- 2 LSB CHG_VDDP Measurement Range V CHG_VDDP_ADC_RAN GE 0 -- 4.9 V CHG_VDDP Resolution VCHG_VDDP_ADC_RES -- 5 -- mV CHG_VDDP Accuracy V CHG_VDDP_ADC_ACC -2 -- 2 LSB TS_BAT Measurement Range R ATETS_BAT_ RANGE 0 -- 100 % TS_BAT Resolution R ATETS_BAT_RES -- 0.25 -- % TS_BAT Accuracy R ATETS_BAT_ACC -2 -- 2 LSB IBUS Measurement Range I IBUS_ADC_ RANGE 0 -- 5 A IBUS Resolution I IBUS_ADC_RES -- 50 -- mA IBUS Accuracy I IBUS_ADC_ACC IBUS > 2A, IAICR [5:0] setting ≥ 400mA -3 -- 3 LSB

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit IBUS < 2A, IAICR [5:0] setting ≥ 400mA -2 -- 2 IBUS < 2A, IAICR [5:0] setting < 400mA -2 -- 2 IBAT Measurement Range I IBAT_ADC_ RANGE 0 -- 5 A IBAT Resolution I IBAT_ADC_RES -- 50 -- mA IBAT Accuracy I IBAT_ADC_ACC -2 -- 2 LSB TEMP_JC Measurement Range T TEMP_JC_ADC_ RANGE -40 -- 120 °C TEMP_JC Resolution TTEMP_JC_ADC_ RES -- 2 -- °C TEMP_JC Accuracy TTEMP_JC_ADC_ ACC Temperature < 85°C -2 -- 2 LSB Pump Express PE+1 On Time (A) t ON_A_PE V BAT = 3.8V. Use PE+ adapter 430 500 570 ms PE+1 On Time (B) t ON_B_PE V BAT = 3.8V. Use PE+ adapter 240 300 360 ms PE+1 On Time (C) t ON_C_PE V BAT = 3.8V. Use PE+ adapter 70 100 130 ms PE+1 Off Time (D) t OFF_D_PE V BAT = 3.8V. Use PE+ adapter 70 100 130 ms PE+1 Off Time (I) t OFF_I_PE V BAT = 3.8V. Use PE+ adapter 80 -- 225 ms PE+2 Off Time (D) t OFF_D_PE V BAT = 3.8V. Use PE+ adapter 87 105 128 ms PE+2 On Time (E) t ON_E_PE V BAT = 3.8V. Use PE+ adapter 147 190 248 ms PE+2 On Time (F) t ON_F_PE V BAT = 3.8V. Use PE+ adapter 87 102.5 118 ms PE+2 On Time (G) t ON_G_PE V BAT = 3.8V. Use PE+ adapter 22 50 68 ms PE+2 Off Time (H) t OFF_H_PE V BAT = 3.8V. Use PE+ adapter 22 50 68 ms PE+2 Off Time (I) t OFF_I_PE V BAT = 3.8V. Use PE+ adapter 135 155 175 ms Flash LED Current Source LED Current Accuracy I LED1_ACC_FL Flash LED current is set 25mA to 400mA -8 -- 8 % LED Current Accuracy I LED2_ACC_FL Flash LED current set 0.4A to 1A -6 -- 6 % FL_LEDCSx Leakage Current I LEAK_FL VLEDVIN = 5V, LEDCSX = 0, LEDCSX disabled -- 0.1 4 µA FL_LEDCSx Start Up Current I START_FL LEDCSX = 0, LEDCSX enabled -- 320 1000 µA LEDCSX Short Threshold V SC_FL -- 1 1.3 V LEDCSX Short Event Timer t D_SC_FL 1.8 2.5 3.3 ms Flash Time-Out t TIMEOUT_FL FLEDx_STRB_TO = 0100101 -- 1248 -- ms Flash Timer Accuracy t TMR_ACC_FL Timer set by register -10 -- 10 % Current Source Regulation Voltage V REG1_FL I LED = 200mA, 0x7C[1:0] = 00 -- 200 300 mV Current Source Regulation Voltage V REG2_FL I LED = 1500mA, 0x7C[1:0] = 01 -- -- 500 mV Strobe/TXMask Deglitch Time t D_STRB_FL -- 10 -- µs Flash Ready Time t FLSH_RDY_FL EN_LEDCS = 1 to current reach 800mA target value -- 4.5 5 ms Strobe FL-CHG_VIN OVP VIN_OVP_FL 5.45 5.6 5.75 V Strobe FL-CHG_VIN OVP Hysteresis VIN_OVP_ Hys_FL 0.25 0.3 0.35 V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit Timer Accuracy t D_ACC_FL VDDA = 2.7V to 5.5V (for deglitch time, soft-start) -- 10 15 % High Side Switch On- Resistance R ON_H_FL -- 60 -- mΩ Low Side Switch On- Resistance R ON_L_FL -- 36 -- mΩ Pull-Down Resistance on FL_STROBE R L_FL_STROBE -- 350 -- kΩ Pull-Down Resistance on BL_EN R L_FL_TORCH -- 350 -- kΩ Pull-Down Resistance on FL_TXMASK R L_FL_TXMASK -- 300 -- kΩ Backlight Maximum Backlight LED Current I LED_MAX_BL Maximum LED current (per string) -- 30 -- mA Backlight LED Current Accuracy I LED_ACC_BL 2.7V ≤ VSYS ≤ 5V, 6mA < I LED < 30mA, Linear or Exponential Mode -3 -- 3 % 2.7V ≤ VSYS ≤ 5V, 0.1mA < I LED < 6mA, Linear or Exponential Mode -10 -- 10 % Backlight LED Current Matching I LED_MATCH_BL 2.7V ≤ VSYS ≤ 5V, 100µA < I LED < 30mA, Linear or Exponential Mode -3 0.2 3 % Minimum Backlight LED Current ILED_MIN_ LINEAR_BL PWM or I 2C current control linear mode (per string) (3) -- 14.6 -- µA Minimum Backlight LED Current ILED_MIN_EXP_ BL PWM or I 2C current control exponential mode (3) -- 60 -- µA LED Current Step size ILED_STEP_ EXP_BL Exponential mode (Code to Code) -- 0.3 -- % LED Current Step size ILED_STEP_ LINEAR_BL Linear mode (Code to Code) -- 14.6 -- µA Backlight Output Over- Voltage Protection Threshold V OVP_BL 2.7V ≤ VCHG_VIN ≤ 5V, rising. BLED_OVP @ REG0xA1[6:5] = 2’b01 19.8 21 22.2 V Regulated Current Sink Headroom Voltage (Boost Feedback Voltage) V HR_BL I LED = 3 mA -- 500 -- mV N-MOSFET On- Resistance R ON_N_BL I SW = 500mA -- 0.2 -- Ω Switching Frequency f SW_BL 2.7V ≤ VIN ≤ 5V 450 500 550 kHz 2.7V ≤ VIN ≤ 5V 900 1000 1100 kHz N-MOSFET Current Limit Tolerance I LIM_NMOS_BL 2.7V ≤ VIN ≤ 5V @ REG0xA1[2:1] : BL_OC = 2’b01 960 1200 1440 mA Maximum Boost Duty Cycle D MAX_BST_BL 92 96 -- % PWM Input Frequency Range f PWM_BL 2.7V ≤ VIN ≤ 5V 50 -- 50000 Hz Minimum Pulse ON Time t ON_MIN_BL Sample rate = 24MHz 183.3 -- -- ns Sample rate = 4MHz 1100 -- -- Sample rate = 1MHz 5500 - -- Minimum Pulse OFF Time t OFF_MIN_BL Sample rate = 24MHz 183.3 -- -- ns Sample rate = 4MHz 1100 -- --

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit Sample rate = 1MHz 5500 -- -- Turn on Delay from PWM = 0 to PWM = 50% Duty Cycle t _START_UP_BL 24MHz sample rate, FPWM = 10kHz -- 6 9 ms PWM Shutdown Period tPWM_STBY_BL Sample rate = 24MHz 0.54 0.60 0.66 ms Sample rate = 4MHz 0.27 3 3.3 Sample rate = 1MHz 22.5 25 27.5 Pull-Down Resistance on PWM R L_BLPWM Pull-down resistance on PWM -- 335 -- kΩ Pull-Down Resistance on BL_EN R L_BLEN -- 388 -- kΩ PWM Input Resolution RESPWM_BL 50Hz < FPWM < 11kHz -- -- 11 bits Display Bias Positive Voltage Accuracy V POSV_ACC_DB REG0XB3[5:0] = 6’b011100, I OUT = 0mA -1 -- 1 % Negative Voltage Accuracy V NEGV_ACC_DB REG0XB4[5:0] = 6’b011100, I OUT = 0mA -1.5 -- 1.5 % POS Ripple V RIPPLE_POS REG0xB2[5:0] = 0’b100010, REG0XB3[5:0] = 0’b011110, I OUT = 0mA -- 20 -- mV NEG Ripple V RIPPLE_NEG REG0xB2[5:0] = 0’b100010, REG0xB4[5:0] = 0’b011110, I OUT = 0mA -- 75 -- mV Display Bias LDO Dropout Voltage V DROP_DB V DB_BST = V DB_POS = 5.2V, I OUT = 80mA -- 35 70 mV BST Switching Frequency f SW_DB 0.9 1.0 1.1 MHz Maximum Duty Cycle D MAX_DB 90 91 -- % BST N-MOSFET On- Resistance R ON_N_DB 0.05 0.3 0.6 Ω BST P-MOSFET On- Resistance R ON_P_DB REG0XB2[5:0] = 6’b100010 0.05 0.5 1 Ω Charge Pump Equivalent Resistance R EQ_CP_DB V DB_BSTVOUT = 5.2V, I NEG = 50mA -- 2.4 -- Ω POS Discharge Resistor RDISCHP_DB REG0xB1[5] = 1’b1 -- 70 -- Ω NEG Discharge Resistor RDISCHN_DB REG0xB1[2] = 1’b1 -- 20 -- Ω BST Current Limit I BSTOCP_DB REG0xB2[5:0] = 6’b100010 0.88 1.1 1.32 A POS Short-Circuit Protection Voltage V SCPP_DB -- 0.8 x DB_VPOS -- V NEG Short-Circuit Protection Voltage V SCPN_DB -- 0.25 - 0.8 x DB_VNEG -- V Pull-Down Resistance on DB_ENN R L_DB_ENN -- 386 -- kΩ Pull-Down Resistance on DB_ENP R L_DB_ENP -- 386 -- kΩ USB_PD Bit Rate f BitRate_PD 270 300 330 Kbps Maximum difference between the bit rate during the part of the packet following the Preamble and the reference bit-rate. p BitRate_PD -- -- 0.25 %

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit Time from the end of last bit of a frame until the start of the first bit of the next Preamble. t InterFrameGap_PD 25 -- -- µs Time before the start of the first bit of the Preamble when the transmitter shall start driving the line t StartDrive_PD -1 -- 1 µs Time to cease driving the line after the end of the last bit of the frame. t EndDriveBMC_ PD -- -- 23 µs Fall Time t Fall_PD 300 -- -- ns Time to cease driving the line after the final high-to-low transition t HoldLowBMC_PD 1 -- -- µs Rise Time t Rise_PD 300 -- -- ns Voltage Swing V Swing_PD 1.05 1.125 1.2 V Transmitter Output Impedance z Driver_PD 33 -- 75 Ω Time window for detecting non-idle t TransitionWindow_PD 12 -- 20 µs Receiver Input Impedance z BmcRx_PD 1 -- -- MΩ Operating Supply Current I OP_PD Cable attached (Full function on) -- 2.8 -- mA Idle Mode Current (Act as a source) I IDLE_SRC1_PD Cable attached with Ra, Rd -- 300 -- µA Idle Mode Current (Act as a source) I IDLE_SRC2_PD Cable attached with either Ra or Rd -- 200 -- µA Idle Mode Current (Act as a sink) I IDLE_SNK_PD Cable attached -- 125 -- µA Low-Power Mode I LOW-POWER_PD Cable unattached, V PD_VCONN5V = 5V -- 20 -- µA Cable unattached, V PD_VCONN5V = 0V -- 10 -- Shipping-Mode Current ISHIP_PD -- 1 -- µA VCONN Switch On- Resistance R ON_VCONN_PD -- 0.7 1 Ω OCP Range I OCP_PD 200 -- 600 mA Time for VCONN Switch to Turn-On State tD_SOFT_PD -- 1.2 -- ms DFP 80µA CC Current I CC_DFP80µ_PD 64 80 96 µA DFP 180µA CC Current ICC_DFP180µ_PD 166 180 194 µA DFP 330µA CC Current ICC_DFP330µ_PD 304 330 356 µA UFP Pull-Down Resistance through CC Pin Rd_ PD 4.59 5.1 5.61 kΩ UFP Pull-Down Threshold Voltage in Dead Battery V TH_DBL_PD Under I CHG = I CC_DFP80µ_PD and I CC_DFP180µ_PD 0.2 -- 1.6 V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit UFP Pull-Down Threshold Voltage in Dead Battery V TH_DBH_PD Under I CHG = I CC_DFP330µ_PD 0.8 -- 2.45 V Valid VBUS Detection Threshold V VALID_VBUS_PD 3.5 -- 4.0 V VBUS Measurement Range V VBUSMR_PD 4 -- 20 V VBUS Measurement Step V VBUS_MSL_PD If V BUS measurement range is from 4V to 10V -- 0.5 -- V VBUS Measurement Step V VBUS_MSH_PD If V BUS measurement range is from 10V to 20V -- 1 -- V RGB LED Driver Current Accuracy I LED_ACC_RGB I LED = 4mA to 24mA -4 -- 4 % Current Matching I LED_MATCH_RGB ILED = 4mA to 24mA -3 -- 3 % Dropout Voltage V DROP_RGB I LED = 20mA -- 200 300 mV LED Open-Circuit Protection Threshold V TH_OPP_RGB Any ISINK voltage lower than open LED protection threshold 40 100 160 mV LED Short-Circuit Protection Threshold V TH_SCP_RGB Any ISINK voltage higher than short LED protection threshold VSYS - 0.88 VSYS - 0.5 VSYS - 0.12 V LDO Input Voltage Range V IN_LDO 2.7 -- 5 V Output Voltage Range VOUT_LDO 1.6 -- 4 V Output Voltage Accuracy ΔV OUT_LDO VIN_LDO = (V OUT_LDO + V DROP ) to 5V, IOUT = 0mA to 400mA -3 -- 3 %/V Load Current I LOAD_LDO V IN_LDO = (V OUT_LDO + V DROP ) to 5V 0 -- 400 mA Output Current Limit I LIM_LDO VIN_LDO = (V OUT_LDO + V DROP ) to 5V, V OUT = 70% of V OUT (Target) 600 -- -- mA Dropout Voltage V DROP_LDO V IN_LDO > 2V, I OUT = 0.3A -- -- 180 mV Load Regulation ΔILOAD_LDO VIN_LDO = (V OUT_LDO + V DROP ) to 5V, IOUT = 1mA to 400mA -0.2 0.06 0.2 %/mA Line Regulation ΔVLINE_LDO VIN_LDO = (V OUT_LDO + V DROP ) to 5V, I OUT = 1mA to 400mA -1 0.5 1 %/V Power Supply Rejection Ratio PSRR LDO VIN_LDO = 3.6V, V OUT_LDO = 2.8V, IOUT = 20mA @ 1kHz, LDO_COUT = 2.2µF (3) -- 50 -- dB Inrush Current I INRUSH_LDO I OUT = 0mA, LDO_COUT = 2.2µF (3) -- -- 500 mA Soft-Start Time t SS_LDO I2C Enable to V OUT_LDO = 90% of V OUT_LDO (Target), LDO_COUT = 2.2µF @ Forced turn-on BASE (REG0x10[1] = 1’b1) (3) -- -- 300 µs Discharge Time t DISCHG_LDO I2C Disable to V OUT_LDO = 10% of V OUT_LDO (Target), LDO_COUT = 2.2µF (3) -- -- 500 µs I2C Characteristics LOW-Level Input Voltage V IL_I 2C -- -- 0.4 V HIGH-Level Input Voltage V IH_I 2C 1.2 -- -- V LOW-Level Output Voltage V OL_I 2C Open-drain -- -- 0.4 V Input Current Each IO Pin I IN_I 2C 0.1 x V DD < V I < 0.9 x V DD(MAX) -10 -- 10 µA SCL Clock Frequency f SCL_I 2C_HSM CB ≦ 100pF -- -- 3.4 MHz 100pF ≦ CB ≦ 400pF -- -- 1.7

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Parameter Symbol Test Conditions Min Typ Max Unit Data Hold Time t DH_I 2C 30 -- -- ns Data Set-Up Time t DS_I 2C 70 -- -- ns (1) Note 1 A 10kΩ NTC thermistor with β = 3435K is suggested, and a SEMITEC 103KT1608T is in use. (2) Note 2 Quiescent, or ground current, is the difference between input and output currents. It is defined by I Q = I IN - IOUT under no load condition (I OUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current. (3) Note 3 Guarantee by design.

3 Typical Operating Characteristics

Typical Operating Characteristics Charger Efficiency vs. Charging Current Charging Current (A) Efficiency (%) VBUS = 5V VBUS = 9V VBUS = 12V VBAT = 3.9V, f sw = 1.5MHz Charger Efficiency vs. Charging Current Charging Current (A) Efficiency (%) VBAT = 4.2V, f SW = 1.5MHz VBUS = 5V VBUS = 9V VBUS = 12V Boost Efficiency vs. Load Current 100 Load Current (A) Efficiency (%) VBUS = 5.05V, f SW = 1.5MHz VBAT = 4.35V VBAT = 4V VBAT = 3.8V VBAT = 3.5V Charging Current vs. VBAT 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 Battery Voltage (V) Charging Current (A fSW = 1.5MHz, ICHG = 2A VBUS = 5V VBUS = 9V VBUS = 12V VBUS = 14V

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief CV Regulation vs. Temperature 4.10 4.15 4.20 4.25 4.30 4.35 4.40 4.45 4.50 -50 -25 0 25 50 75 100 125 Temperature (°C) CV Regulation (V) VBUS = 5V CV = 4.35V CV = 4.44V LDO Load Regulation -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 0.001 0.01 0.1 1 Load Current (A) Load Regulation (%/mA) VIN = 5V VIN = 3V VIN = 3.6V LDO_VIN = 3V / 3.6V / 5V, LDO_VOUT = 2.8V LDO Line Regulation -0.5 -0.3 -0.1 0.1 0.3 0.5 Input Voltage (V) Line Regulation (%/mV) IOUT = 0.2A IOUT = 0.001A IOUT = 0.4A IOUT = 0.001A / 0.2A / 0.4A, LDO_VOUT = 2.8V Power Supply Rejection Ratio -80 -70 -60 -50 -40 -30 -20 -10 10 100 1000 10000 100000 1000000 Frequency (Hz) PSRR (dB) LDO_VIN = 3.6V, LDO_VOUT = 2.8V, I OUT = 20mA BLED Boost Efficiency vs. Output Current 100 0 5 10 15 20 25 30 35 40 45 50 55 60 65 Output Current (mA) Boost Efficiency (%) VBAT = 3.7V, VOUT = 25V, 30mA/string, 8S2P, L = MDMK4040T100M BLED Current Matching -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 0 5 10 15 20 25 30 ILED (mA) Matching (%) VBAT = 3.7V, linear dimmimg Matching 1% Matching 3% Matching 4% Matching 2%

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief BLED Current Accuracy 0 5 10 15 20 25 30 ILED (mA) Accuracy (%) Accuracy 1% Accuracy 3% Accuracy 4% Accuracy 2% VBAT = 3.7V, linear dimmimg BLED I LED vs. Brightness Code 0 256 512 768 1024 1280 1536 1792 2048 Brightness Code ILED (mA) VBAT = 3.7V, linear dimmimg, LED brightness code from 0 to 2048 BLED I LED vs. Brightness Code 0 256 512 768 1024 1280 1536 1792 2048 Brightness Code ILED (mA) VBAT = 3.7V, exponential dimmimg, LED brightness code from 0 to 2048

4 MT6370 Packaging

Figure 4-1. Package dimension

MediaTek Proprietary and Confidential. © 2023 MediaTek Inc. All rights reserved. Unauthorized reproduction or disclosure of this document, in whole or in part, is strictly prohibited. MT63 70 Power Management IC Product Brief Exhibit 1 Terms and Conditions Your access to and use of this document and the information contained herein (collectively this “Document”) is subject to your (including the corporation or other legal entity you represent, collectively “You”) acceptance of the terms and conditions set forth below (“T&C”). By using, accessing or downloading this Document, You are accepting the T&C and agree to be bound by the T&C. If You don’t agree to the T&C, You may not use this Document and shall immediately destroy any copy thereof. This Document contains information that is confidential and proprietary to MediaTek Inc. and/or its affiliates (collectively “MediaTek”) or its licensors and is provided solely for Your internal use with MediaTek’s chipset(s) described in this Document and shall not be used for any other purposes (including but not limited to identifying or providing evidence to support any potential patent infringement claim against MediaTek or any of MediaTek’s suppliers and/or direct or indirect customers). Unauthorized use or disclosure of the information contained herein is prohibited. You agree to indemnify MediaTek for any loss or damages suffered by MediaTek for Your unauthorized use or disclosure of this Document, in whole or in part. MediaTek and its licensors retain titles and all ownership rights in and to this Document and no license (express or implied, by estoppels or otherwise) to any intellectual propriety rights is granted hereunder. This Document is subject to change without further notification. MediaTek does not assume any responsibility arising out of or in connection with any use of, or reliance on, this Document, and specifically disclaims any and all liability, including, without limitation, consequential or incidental damages. THIS DOCUMENT AND ANY OTHER MATERIALS OR TECHNICAL SUPPORT PROVIDED BY MEDIATEK IN CONNECTION WITH THIS DOCUMENT, IF ANY, ARE PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE. MEDIATEK SPECIFICALLY DISCLAIMS ALL WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, COMPLETENESS OR ACCURACY AND ALL WARRANTIES ARISING OUT OF TRADE USAGE OR OUT OF A COURSE OF DEALING OR COURSE OF PERFORMANCE. MEDIATEK SHALL NOT BE RESPONSIBLE FOR ANY MEDIATEK DELIVERABLES MADE TO MEET YOUR SPECIFICATIONS OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM. Without limiting the generality of the foregoing, MediaTek makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does MediaTek assume any liability arising out of the application or use of any product, circuit or software. You agree that You are solely responsible for the designing, validating and testing Your product incorporating MediaTek’s product and ensure such product meets applicable standards and any safety, security or other requirements. The above T&C and all acts in connection with the T&C or this Document shall be governed, construed and interpreted in accordance with the laws of Taiwan, without giving effect to the principles of conflicts of law.

Product Information

MT6370 specifications and overview.

Summary

MT6370 Power Management IC Version: 1.0 2023-09-18

Description

MT6370 Power Management IC Version: 1.0 2023-09-18

Source title MT6370 Datasheet(PDF) - MediaTek Inc.

Related Parts

More parts from the same family.

Browse manufacturer