MT2063 MICROTUNE | Alldatasheet

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RF SILICON AND SUBSYSTEMS SOLUTIONS FOR BROADBAND COMMUNICATIONS AND AUTOMOTIVE ELECTRONICS MT2063 SINGLE-CHIP UNIVERSAL TUNER PRELIMINARY PRODUCT BRIEF The MT2063 is a low-power 3.3V single- chip universal tuner for analog and digital worldwide terrestrial and cable standards The MicroTuner™ MT2063 is an advanced, low-power single-chip tuner, optimized for terrestrial and cable television reception. The MT2063 is capable of receiving frequencies in the 48 MHz to 1002 MHz range. It can convert a selected channel to a standard intermediate frequency (IF) between 30 MHz and 60 MHz. The MT2063 dual-conversion architecture yields the desirable characteristics of traditional television tuners without the need for external tracking filters. This is achieved by an integrated pre- selection filter at the RF input, low in-band emissions and outstanding image rejection The MT2063 has a high level of integration to keep the total Bill of Materials (BOM) low. It supports multiple digital terrestrial television standards including ATSC, DVB-T, DMB-T and ISDB-T. In addition, MT2063 supports 256QAM reception as it is used in world wide digital cable networks and analog NTSC, PAL and SECAM signals. It provides excellent in-band flatness as well as consistent gain characteristics across the complete reception band. The integrated LNA delivers excellent sensitivity. An innovative architecture enables an AGC control range of more than 90 dB. The programmable buffered reference frequency output enables crystal sharing with the demodulator.

APPLICATIONS

  • Digital terrestrial reception
  • Analog and digital PC-TV
  • Digital terrestrial set-top boxes
  • Portable TV receivers
  • TV Plug-in modules
  • Multi-standard PCTV receivers

FEATURES

  • 48 MHz to 1002 MHz input frequency range
  • Supports off-air terrestrial and cable reception
  • No active external components required
  • Standard IF output works seamlessly with analog and digital demodulators
  • Low-power 1 W dual-conversion architecture with additional power saving modes
  • Integrated RF pre-filter and first IF filter
  • Single-ended RF input
  • Alignment free
  • Integrated power detector for closed loop RF AGC
  • Integrated IF variable gain amplifier for direct connection to digital demodulators
  • Fully compatible with ATSC, DVB-T, DMB-T, ISDB-T, QAM/ DVB-C, NTSC, PAL, SECAM and other terrestrial television standards
  • Capable of driving cascaded SAW filters with a built-in fixed gain IF buffer amplifier
  • Can drive two IF SAW filters in parallel for hybrid analog/digital
  • 48 pin, 7 mm x 7 mm QFN package MT2063 Single-Chip Universal Tuner

MT2063 SINGLE-CHIP UNIVERSAL TUNER PRELIMINARY PRODUCT BRIEF MT2063 PB-00136 — Rev 1.1 January 2008 P R E L I M I N A R Y Microtune, Inc., 2201 10th Street, Plano, TX 75074, USA Tel: +1-972-673-1600, Fax: +1-972-673-1602, E-mail: sales@microtune.com, Web site: www.microtune.com For a detailed list of office locations, sales offices, and sales representatives, visit our web site at www.microtune.com Microtune believes that the information in this document is accurate and reliable, as of the date of this document. Microtune a ssumes no responsibility for any consequences arising from the use of this information, nor from any infringement of patents or the rights of third parties which may result from its use. No license is g ranted by implication or otherwise under any patent or other rights of Microtune. The information in this publication replaces and supersedes all information previously supplied, and is subject to change without n otice. The customer is responsible for assuring that proper design and operating safeguards are observed to minimize inherent and procedural hazards. Microtune assumes no responsibility for applications assis tance or customer product design. The devices described in this document are not authorized for use in medical, life-support equipment, or any other application involving a potential risk of severe property or environmental damage, personal injury, or death without prior express written approval of Microtune. Any such use is understood to be entirely at the user’s risk. Microtune is a registered trademark of Microtune, Inc. MicroTuner, MicroStreamer, VideoCaster, DataCaster, ClearTune, and the M icrotune logo are trademarks of Microtune, Inc. All other trademarks belong to their respective companies. Microtune’s products are protected by one or more of the following U.S. patents: 5,625,325; 5,648,744; 5,717,730; 5,737,035C1; 5,739,730; 5,805,988; 5,847,612; 6,100,761; 6,104,242; 6,163,684; 6,169,569; 7,171,176; 7,184,724; 7,190,942; 7,190,943; 7,242,918; 7,274,410; 7,304,689; 7,304,533; 7,304,393; 7,313,201; D469,742 and additional patents pending or filed. Microtune’s products are protected by one or more of the following International patents: United Kingdom: 1532732; Germany: 60313621.4; Netherlands: 1532732; France: 1532732; and additional patents pending or file d. Entire contents Copyright © 1996 - 2008 Microtune, Inc. 011108 RECOMMENDED OPERATING CONDITIONS PARAMETER M IN T YP M AX U NIT Supply voltage 3.15 3.3 3.45 V Supply voltage ripple 25 mVp-p Operating junction temperature 100 °C Serial control clock 400 kHz ABSOLUTE MAXIMUM RATINGS PARAMETER M IN M AX U NIT Supply voltage 3.6 V Storage temperature range -50 +150 °C Lead-free solder temperature (soldering 5 seconds, x3) +260 °C Input voltage -0.3 VCC +0.3 V TUNER ELECTRICAL CHARACTERISTICS PARAMETER M IN T YP M AX U NIT Power Supply Active current 300 mA RF Signal Path Input frequency range 1 48 1002 MHz Noise figure 2 5 dB Terminal voltage gain 42 dB RF AGC range 60 dB Image rejection 70 dBc LO phase noise (1 kHz) -80 dBc/Hz LO phase noise (10 kHz) -85 dBc/Hz LO phase noise (100 kHz) -105 dBc/Hz LO step size 50 kHz IF VGA Frequency range 30 60 MHz Output voltage swing 2.0 Vp-p Maximum terminal voltage gain 46 dB IF AGC range 30 dB IF Buffer Frequency range 30 60 MHz Output voltage swing 2.0 Vp-p Maximum terminal voltage gain 12,18, 24 dB Notes: 1) in cable reception mode 2) in terrestrial reception mode MT2063 Pin Diagram MT2063 Block Diagram 13 14 15 16 17 18 19 20 21 22 23 24 37 38 39 40 41 42 43 44 45 46 47 48 Exposed paddle on package bottom PLL PLL RF INPUT UPC L01 L02 DNC FGA VGA IF OUTPUT SERIAL DATA CLOCKSRO SERIA L CONTROL INTERFA CE AMP IF OUTPUT FGA OPTIONAL ANALOG DEMOD DIGITAL DEMOD