PM6644 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 35
Technical content
Datasheet sections
- 1 Simplified application schematic
- 1.1 Pin description
- 1.2 Absolute maximum ratings
- 1.3 Thermal data
- 1.4 Recommended operating conditions
- 1.5 Electrical characteristics
- 1.6 T ypical operating characteristics
- 2 Device description
- 2.1 Switching regulator
- 2.1.1 Output voltage set-up
- 2.1.2 Constant-on-time control (COT)
- 2.1.3 PWM control
- 2.1.4 Skip mode management
- 2.1.5 Current sensing and current limit
- 2.1.6 Soft-start and soft-end
- 2.1.7 Monitoring
- 2.1.8 Overvoltage protection
- 2.1.9 Undervoltage protection
- 2.1.10 VCC undervoltage
- 2.1.11 VCC and BYP power management
- 2.1.13 General fault management: thermal protection
- 3 Application information
- 3.1 External component selection
- 3.1.1 Inductor selection
- 3.1.2 Input capacitor selection
- 3.1.3 Output capacitor selection
- 3.1.4 Maximum RMS output current
- 4 Typical application configuration V OUT = 8 V
- 4.1 Test set configuration
Features
■ 4.5 V to 25 V input voltage range ■ Output voltage VOUT: fixed 3.47 V or adjustable
0.9 V to 8 V
■ 350 mA valley current limit ■ Constant-on-time control ■ Programmable switching frequency ■ Pulse skipping mode (skip mode) at light loads ■ Independent EN signals ■ Latched OVP and UVP
Applications
■ Networking power supply ■ Portable applications ■ Microcontroller supply ■ Industrial supply
Description
The PM6644 is a 350 mA valley current limit step- down regulator capable of delivering an adjustable output voltage in the range between 0.9 V and 8 V. A fixed value of output voltage is also available (3.47 V), saving the external resistor divider. It is housed in a small DFN10 3x3 package. The switching regulator is based on COT (constant-on-time) architecture, that assures fast load transient response; the embedded voltage feed-forward provides nearly constant switching frequency operation. The pulse skipping technique increases efficiency at very light load. The switching frequency can be adjusted from 200 kHz to 600 kHz through a simple resistor. The switching regulator can be programmed to regulate a fixed value of 3.47 V or it can deliver an adjustable voltage, depending on the FB pin set- up. DFN10 Table 1. Device summary
1 Simplified application schematic
Figure 1. V OUT = 3.47 V fixed configuration Figure 2. Adjustable V OUT configuration
Figure 3. Pinout
1.1 Pin description
Table 2. Pin description 1 REF 1.216 V internal reference voltage. Do not connect this pin to any external component. If this pin is connected to VCC, OUT operates at 3.47 V (Fixed mode). operation. If the EN pin is not used for power sequencing, tie this pin to the VIN pin. 5 GND Power and signal ground connection. MOSFETs. Connect this pin to the inductor. integrated voltage generator that supplies VCC if BYP < 2.4 V. connected to BYP through a MOSFET switch (see Figure 18 ). switch. Bypass to GND with a 10-100 nF capacitor. capacitor. VREF3 is the voltage at REF3 pin. EXP PAD EXP PAD Exposed pad. Connect to signal ground.
1.2 Absolute maximum ratings
1.3 Thermal data
1.4 Recommended operating conditions
Table 3. Absolute maximum ratings Table 4. Thermal data Table 5. Recommended operating conditions
- Refer to Section 3.1.4: Maximum RMS output current .
1.5 Electrical characteristics
Table 6. Electrical characteristics
3.3 V voltage reference
1.6 Typical operating characteristics
- In the range T j = 0 °C-70 °C limits are guaranteed by design and statistical analysis, not production tested. Production test
Table 6. Electrical characteristics (continued) Figure 4. Efficiency vs. load Figure 5. Switching frequency vs. load
Figure 18. Simplified block diagram
2 Device description
The PM6644 combines a 350 mA valley current limit step-down regulator with a high accuracy 3.3 V voltage reference in a small DFN10 3x3 package. The switching regulator is based on constant-on-time (COT) architecture. This type of control offers a very fast load transient response with a minimum external component count. The switching regulator can regulate 3.47 V in Fixed mode (the FB pin tied at VCC) or it can deliver an adjustable voltage between 0.9 V and 8 V (the FB pin connected to the output voltage rail through an external resistor divider). The switching frequency can be adjusted from 200 kHz to 600 kHz by a resistor between TON and the VIN pin. The embedded input and output voltage feed-forward provides nearly constant switching frequency operation. A pulse skipping technique allows increasing efficiency at very light load. The switching regulator has protection against overvoltage, undervoltage and overcurrent. The power MOSFET and switching controller of the switching regulator are supplied by VCC voltage. An integrated voltage generator from V IN > 6 V provides 3.8 V at the VCC pin when the BYP pin < 2.4 V if BYP > 3.2 V, the integrated voltage generator is turned off and VCC is connected to BYP through a MOSFET switch (switch-over function). An integrated 3.3 V linear regulator (supplied by VCC) provides an accurate 3.3 V output (REF3). The PM6644 also provides protection against overtemperature, turning off both switching regulator and 3.3 V reference.
2.1 Switching regulator
2.1.1 Output voltage set-up
The switching sections can be configured in several ways. Output voltage is configured with the FB pin. If the FB pin is tied to VCC, the PM6644 regulates 3.47 V. Using an external resistor divider the output can be adjusted following this equation: Equation 1 where R1, R2 are the resistors of the FB pin divider. REF is a voltage reference used to internally generate the 0.9 V threshold used to set the output voltage of the switching regulator.
2.1.2 Constant-on-ti me control (COT)
The PM6644 implements a pseudo-fixed frequency algorithm using the COT architecture. Vout 0.9V= R1 ⎛⎞⋅
input voltage (sensed at the VIN pin). Figure 19 shows how the on-time is generated. Figure 19. On-time generator
2.1.3 PWM control
the correct startup sequence. during switching transition. Table 7. Frequency configurations
2 M 245 kHz
1 M 470 kHz
500 K 260 kHz
250 K 495 kHz
Figure 20. Constant-on-time controller architecture
- The PWM comparator is high
- The inductor valley current is below the current limit threshold
- The minimum OFF-time has timed out A slope proportional to the low-side MOSFET current (A * RDS(on) * ILS) is added at the input of the PWM comparator in order to ensure stability. The slope determines a load line on the output voltage of about 0.16 Ω when the controller works in PWM mode.
2.1.4 Skip mode management
inductor current is sensed and, if it is equal to zero, the synchronous MOSFET is turned off. switching and the conduction losses are reduced by skipping some cycles. mode), Skip mode is automatically changed into PWM mode.
2.1.5 Current sensing and current limit
where ∆IL is the inductor current ripple. Figure 22. Current waveforms in current limit conditions Figure 21. Inductor current in skip mode
2.1.6 Soft-start and soft-end
when the EN pin rises above 2.1 V. current limit threshold with steps of 25%. is always active while the undervoltage protection is enabled at the end of the 2.8 ms.
2.1.7 Monitoring
2.1.8 Overvoltage protection
on the low-side MOSFET keeping the output voltage at 0 V. The protection is latched and this fault is cleared by cycling VCC < 2.1 V and then > 3 V.
2.1.9 Undervoltage protection
2.1.10 VCC undervoltage
section is turned off until PVCC voltage goes over 3 V. Table 8. Fault management summary PVCC voltage goes over 3 V . Not latched fault.
2.1.11 VCC and BY P power management
switch (16 Ω typ.) to the BYP pin. This feature decreases the power dissipation of the device. turned on when BYP > 3.2 V. Connect pin REF3 with a 100 nF ceramic capacitor to GND.
2.1.13 General fault mana gement: thermal protection
Table 9. VCC and BYP management (EN pin > 2 V)
3 Application information
3.1 External component selection
3.1.1 Inductor selection
Once the switching frequency is defined, inductor selection depends on the desired inductor ripple current and load transient performance. Low inductance means greater ripple current and may generate greater output noise. On the other hand, low inductor values involve fast load transient response. A good compromise between the transient response time, the efficiency, the cost and the size, is to choose the inductor value in order to maintain the inductor current ripple ∆IL between 20% and 50% of the maximum output current ILOAD(max.). The maximum ∆IL occurs at the maximum input voltage. With these considerations, the inductor value can be calculated with the following relationship: Equation 7 where f SW is the switching frequency, VIN is the input voltage, VOUT is the output voltage and ∆IL is the selected inductor current ripple. In order to prevent overtemperature working conditions, the inductor must be able to provide an RMS current greater than the maximum RMS inductor current ILRMS: Equation 8 where ∆Ι L (max.) is the maximum current ripple: Equation 9 If hard saturation inductors are used, the inductor saturation current should be much greater than the maximum inductor peak current Ipeak: Equation 10 Using soft saturation inductors it is possible to choose inductors with a saturation current limit at nearly Ipeak. In Table 10 there is a list of some inductor part numbers. L VIN VOUT– VIN ILRMS ILOAD max()() 2 ∆IL max()() 2 ∆IL max() VINmax VOUT– VINmax Ipeak I LOAD max() ∆IL max()
3.1.2 Input capacitor selection
maximum RMS current given by the formula. burn out if subjected to very high current during the charge. Table 11 shows an example of ceramic capacitor part numbers.
3.1.3 Output capacitor selection
The controller can work with ceramic or tantalum output capacitors. Table 10. Inductor part number Table 11. Input capacitor part numbers
output voltage ripple requirements. A low ESR capacitor is required to reduce the output voltage ripple. Finally the output capacitor choice heavily impacts the load transient response. Table 12 shows a list of some capacitor part numbers.
3.1.4 Maximum RMS output current
withstand a maximum RMS current of 300 mA.
- input voltage VIN
- output voltage VOUT
- inductor current ripple ∆IL (that depends on the switching frequency FSW and on the inductor value L, according to Equation 7 ). The maximum RMS currents of high-side (IRMS,HS) and low-side (IRMS,LS) MOSFETs are given by: Equation 16
Table 12. Output capacitor part number
where ILOAD is the RMS output current. The minimum ILOAD between equation 16 and equation 17, combined with RMS load current limitation due to valley current limit (Equation 6 ), determines the maximum RMS output current ILOADRMS sustained by the switching regulator: Equation 18 Example 1 VIN = 5 V, FB = VCC (VOUT = 3.47 V), ∆IL= 68.5 mA (L = 33 uH, Fsw = 470 kHz). High-side can withstand a load current of ILOADRMS = 432 mA. Low-side can withstand a load current of ILOADRMS = 977 mA. ILOADRMS due to valley current limit = 384 mA. As a result, ILOADRMS = 384 mA (limitation determined by the valley current limit). The PM6644 switching regulator can source 384 mA RMS. 384 mA is also the peak load current. Example 2 VIN = 25 V, FB = VCC (VOUT = 3.47 V), ∆IL = 192.5 mA (L = 33 uH, Fsw = 470 kHz). High-side can withstand a load current of ILOADRMS = 2164 mA. Low-side can withstand a load current of ILOADRMS = 344 mA. ILOADRMS due to valley current limit = 446 mA. As a result, ILOADRMS = 344 mA (limitation determined by the low-side RMS max. current). The PM6644 switching regulator can source 344 mA RMS. The peak load current is 446 mA. IRMS LS, ILRMS 1D–() ILOAD() 2 ∆IL() 2 ILOADRMS MIN 300mA ⎛⎞ 2 ∆IL() 300mA ⎛⎞ 2 ∆IL() 350mA ∆IL
4 Typical application configuration V OUT = 8 V
device with VIN = 12 V ±5%, VOUT = 8 V.
4.1 Test set configuration
following schematic and bill of materials. Figure 23. Schematic and bill of materials
4.2 Characterization report
Figure 24. No load Figure 25. Load = 50 mA
Typical application configuration VOUT = 8 V PM6644 28/35 Doc ID 023203 Rev 1 Bias current VIN =12.158 V VIN = 12.158 V Vout = 8.150 V (externally forced) V out = 8.107 V No switching No load, pulse skipping (820 Hz, double pulses) BYP = GND BYP = GND IVIN = 126 µA IVIN = 444 µA
5 Conclusion
The device regulates VOUT = 8 V properly with the designed schematic and bill of material. The 12 V input voltage range should have an accuracy of ± 5%. refer to the PM6644 evaluation kit board for a complete layout example.
- Place all the power components (inductors, input and output capacitors) on the top side. Refer them to a ground plan, GND in an inner layer. Connect the exposed pad of the PM6644 to the GND plan with vias (design a GND pad on the top side with the same size as the exposed pad). On the top side connect the GND pin with a short trace to the exposed pad.
- Place input capacitors close to the VIN pin, in order to minimize AC current drops during high-side MOSFET turn-on. Add vias to the GND plan.
- Place the output capacitor close to the GND pin, in order to minimize AC current drops during high-side and low-side MOSFET turn-on. Add vias to the GND plan.
- Place filtering capacitors close to pins REF3, BYP and VCC.
- Place the resistor near the TON pin in order to minimize parasitic capacitance on the TON pin.
Figure 31. Recommended layout - top layer Figure 32. Recommended layout - inner layer
Figure 33. Recommended layout - bottom layer
6 Package mechanical data
specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 13. DFN10 (3x3 mm) mechanical data
Figure 34. DFN10 (3x3 mm)
Figure 35. DFN10 (3x3 mm) footprint
7 Revision history
Table 14. Document revision history 19-Jun-2012 1 Initial release.