MSLOSC | DigiCamel IC Datasheet

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MSLOSC MSI | Alldatasheet

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Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 8

Technical content

4/2014 “m y i ope e

15 Hz to 64 kHz All Silicon Sine Source

——— Description Features Up to 64 kHz operation The MSLOSC integrated circuit provides a pro- Provides Low Distortion Sinewave Output grammable frequency low distortion (0.1%) sine Programmable level control down to -63 dB wave output, The level is digitally programmable from 0 dB to -63 dB. Using switched-capacitor filters and dividers the frequency can be con- Applications trolled from 15 Hz to 64 kHz with no external - LO for Communication Modulation or Demodulation capacitors. The device can operate from 3.30V : Differential Clock for Data Acquisition up 10 5.5 VDC. The frequency accuracy of the oie ca MSLOSC is less than 0.01%. Temperature stabili- Pewhal ia e Ps mig polree ty is better than discrete solutions using resistors, Portable Test Equipment capacitors and op amps. = Ab: Maxi atings___ A 4 bit DAC is filtered with a programmable solute Maximum R gs — wa switched-capacitor filter followed by a continuous time programmable lowpass filter to reduce distor- Pewer Supply Voltage «wv Q tion to 0.1% (-60 dB) A synchronous serial Storage Temperature Range -60 to +150° C wz input sets the desired frequency and level. Operating Temperature Range -40 to +85°c Msi bl 15” SOIC. . The MSLOSC is available in a 8 pin 0.15" SOIC Ordering Information MSLOSCN 150 mils wide 8 pin SOIC MCLK CONTROL REGISTERS DCLK DATA COUNTERS VDD DAC LEVEL vss CONTROL SINE OUTPUT SWITCHED- AGND CAPACITOR CONTINUOUS FILTERING TIME FILTER Msi Web Site “wwmix-sig.com” © 2005 - 2014 Mixed Signal Integration 1 ee

eoge 2. Alectrical Characteristics (VDD = 5.0V, T = 25°C felock-16.384 MHz R,-5k2) Oc seater | TT CT CT TC Paws wines [wo [Si | ee | | a A a Da Dom ter wget [| rosfoo-4 | vor | a a [men eel | pe pe | | ES WS [atone wn] | Aver Te [fer] | =| Q fama aane [| em | feof [=] SC Amplitude/Frequency fo= IkHz 15 ms Setting Time The formula for calculating the output frequency is given by the equation below, where Do-7 is the decimal equivalent of the setting of bits DO-7 in the frequency range setting and the MCLK DIVIDER range 2011 is controlled by bits D8-D19. Only one bit is set for a given frequency setting for MCLK DIVIDER. Output Voltage (Peak) vs. AGND-VSS. 241 B17 ‘a > B15 fo= MCLK 512 2 13 Os Om *—— au 202 257 +[D0-7] 6 oe 5 7 1.35 1.60 185 210 235 260 AGND-VSS (VDC) =Msi Web Site “www.mix-sig.com” © 2005 - 2014 - 2014 Mixed Signal Integration 2

4/2014 . ra . Msi a Pin Descriptions

1 DCLK the data clock

2 EN the enable function, voltage HI is enabled

3 AGND this supply is midpoint between VDD and VSS,

typically +2.5 V

4 OUT the sinewave output

6: vss the most negative supply voltage, typically OV

6 MCLK the masterclock input

7 DATA the data input 2

8 VDD the most positive supply voltage, typically +5V wv

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a) . 4/2014 mM S I eye e ——— MCLK Divider Control D19 D18 D17 D16 D15 D14.D13 D12D11D10 DY D& D7 DE DS D4 D3 D2 D1 DO Fo (He) J i) oO oO i?) i) oO i) i?) oO fo) ie) 1 1 1 1 1 1 1 1 15.63 1 i) 0 0 0 0 0 0 0 © © 0 0 0 0 0 0 0 0 Oo 31.13 oO 1 Oo ° i) i?) Oo i) ie} oO ie) i?) ¥ 1 1 1 1 1 1 1 31.25 oO 1 o 0 0 000 00 00 00 0 0 00 0 0 6226 ° fe) 1 o 0 0 0 0 00 00 1 1 1 1 1 1 1 1 62.50 ° ° 1 0 0 0 6000000 0600 0 0 0 0 0 0 124.51 ° oO ° 1 0 0 0 0 0 0 00 1 1 * 1 1 1 1 1 125.00 i) to) ° 1 0 0 0 00 00 00 00 0 0 0 0 0 249.03 oO [) oo 1 o 0 0 00 00 1 1 1 1 1 1 1 O 250.49 fe) ie) oo 1 o 0 0 0 0 0 0 0 0 0 0 0 0 0 0 498.05 fe) [) oo 0 100 00 0 0 1 a | bi 1 Z 1 1 500.00 oO i) o 0 0 1.0 00 0 0 0 00 0 0 0 0 0 0 996.11 oO oO o 0 0 0 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1000.00 = oO [°) o 0 0 0 1.0 0000 00 0 0 0 0 0 0 1992.22 °O oO o 0 00 0 1 o 0 0 0 1 1 1 1 q 1 1 1 2000.00 7) ° ° o 0 0 0 0 1000 0 0 0 0 0 0 0 0 0 3984.44 | o 0 © 0 0 00 0 1 0 0 0 4 4 4 4 14°14 = 4 1 4000.00 3° fe) ie) ie) o oO ie) Oo ° 1 i) ie) °O Oo o oO oO i) i?) i?) O 7968.87 oO ° o 0 0 0000 1 oo 1 1 1 1 1 1 1 1 8000.00 A fo) o 0 0 0 00 00 1 0 0 0 0 0 0 0 0 O 0 15937.74 a fe) ie) 0 0 0 0 000 0 1,0 1 1 1 1 1 1 1 1 16000.00 i?) oO o 0 0 0000 0 1.0 00 0 0 0 0 0 0 31875.49 oO fe) o 0 0 0 0 0 00 0 1 1 1 1 1 1 1 1 1 32000.00 oO fe) o 0 0 00 0 00 0 1 0 0 0 0 0 0 O 0 63750.97 Fractional Frequency Control D7 D6 DS D4 D3 D2 D1 DO FACTOR D7 D6 DS D4 D3 D2 D1 DO FACTOR 1 1 1 4 1°14 4 0 100200 0 0 1 1 0 0 0 0 1.6787 1 1 1 4 1 1 0 0 1009 0 0 1 0 0 0 0 0 1.7716 1 1 1°14 1° 0 0 0 1019 0 0 0 14 4 4 4 4 «14.7778 1 1° 1 1 0 0 0 0 10302 0 0 0 1 1 1 =4 «© 1.7840 1 1 1 0 0 0 0 0 1064 0 0 0 1 14 1 0 0 1.7965 1 10 0 0 0 0 0 1143 0 0 0 1 1 0 0 0 18221 1 0 0 0 0 0 0 0 13299 0 0 0 1 0 0 0 0 1.8755 Oo 1 1°14 47 14 4 1 «133390 0 0 0 1 1 4 1 1.8824 Oo 1 1°14 4 14 4 0 13368 0 0 0 0 1 1 14 «© 1.8893 Oo 1 1°14 41 1 0 0 134388 0 0 0 0 1 1 0 © 1.9033 Oo 1 1 1 1 0 0 0 13581 0 0 0 0 1 0 0 0 1.9321 o 1 1 1 0 0 0 0 13895 0 0 0 0 0 1 41 14. 1.9394 Oo 1 1 0 0 0 0 0 14504 0 0 0 0 0 1 1 0 1.9468 0 10 0 0 0 0 0 1599 0 0 0 0 0 1 0 14. 1.9542 o 0 1 1 1 1 4 41 1600 0 0 0 0 0 1 0 © 1.9617 o 0 1 1 1 1 14 0 16050 0 0 0 0 0 0 1 1. 1.9692 o Oo 1° 1 1 1 0 0 16151 0 0 0 0 0 0 1 0 1.9768 0 0 1 1 1 0 0 0 1638 0 0 0 0 0 0 0 1 1.9845 ®M yi Web Site “www.mix-sig.com” © 2005 - 2014 Mixed Signal Integration 6

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4/2014 “2m iN i ope ° —— eee Bitmap for Coarse/Fine Attenuator Control (Bits D26-D20) D26 D25 D24 D23 D22 D21 D20 ATTEN D26 D25 D24 D23 D22 D21 D20 ATTEN o 0 0 0 0 0 0 0.00 fe) 1 fo} 1 Oo Oo 1 -20.50 o 0 0 00 0 1 0.50 fe) 1 oO 1 0 1 O- -21.00 o 0 0 0 0 1 fe) -1.00 oO 1 fe) 1 fe) 1 1 -21.50 o 0 0 0 0 1 1 -1,.50 fe) 1 Oo 1 1 0 0O- -22.00 o 0 0 0 1 Oo Oo -2.00 ie) 1 Oo 1 1 fo} 1 -22.50 o 0 0 0 1 0 1 -2.50 fe) 1 f°) 1 1 1 O-— -23.00 o 0 0 0 1 1 0 -3.00 Le) 1 fe) 1 1 1 1 -23.50 o 0 0 0 1 1 1 -3.50 fe) 1 1 0 0 0 0O- -24.00 0 0 0 1 o o oO -4.00 fe) 1 1 o 0 0 1 -24.50 o 0 0 1 Oo Oo 1 -4.50 1°) 1 1 Oo Oo 1 O- -25.00 o 0 0 1 ie) 1 Le) -6.00 fe) 1 1 o oO 1 1 -25.50 = o 0 0 1 fe} 1 1 -6.50 Lo} 1 1 1°) 1 Oo oO -26.00 wa o oOo Oo 1 1 Oo Oo -6.00 0 1 1 io) 1 1°) 1 -26.50 rE o o oO 1 1 ie} z -6.50 oO 1 1 io) a 1 O- -27.00 o 0 0 1 1 1 f°) -7.00 fe) 1 1 fe) 1 1 1 -27.50 ce) o 0 0 1 1 1 1 -7.50 fe) 1 1 1 Oo O O- -28.00 ”A Oo Oo 1 o 0 0 0 -8.00 oO 1 1 7 Oo Oo 1 -28.50 A Oo Oo 1 o 0 Oo 1 -8.50 Le) 1 1 1 fe} 1 0 -29.00 o Oo 1 Oo Oo 1 1 -9.50 fo} 1 1 1 fe) 1 1 -29.50 Oo Oo 1 o 0 1 oO -9.00 fe) 1 1 1 1 Oo 0O- -30,00 Oo Oo 1 oO 1 0 0O- -10.00 Lo) 1 1 1 1 oO 1 -30.50 Oo 0 1 Oo 1 fe) 1 -10.50 fo) 1 1 1 1 1 0 -31,00 Oo Oo 1 fo} 1 1 O -11.00 Lo) 1 1 1 | 1 1 -31.50 Oo Oo 1 fo} 1 1 1 -11.50 1 0 0 0 0 0 O° -32.00 o 0 1 1 Oo O O- -12.00 1 o 0 0 0 0 1 -32.50 o 0 1 1 Oo 0 1 -12.50 1 o 0 0 0 1 O- -33.00 Oo Oo 1 1 Le) 1 O- -13.00 1 o 0 0 0 1 1 -33.50 Oo Oo 1 1 ° 1 1 -13.50 1 o 0 0 1 Oo O- -34,00 Oo Oo 1 1 1 0 0O- -14.00 1 o 0 0 1 fe} 1 -34.50 Oo 60 1 1 1 Lo) 1 -14.50 1 o 0 0 1 1 O- -35,00 Oo 6.0 1 1 1 1 0 -15.00 1 o oOo 0 1 1 1 -35.50 Oo 0 1 1 1 1 1 -15.50 1 Oo 0 1 0 0 0O- -36,00 0 1 0 0 0 O 0O- -16.00 1 Oo Oo | Oo Oo 1 -36.50 oO 1 o 0 0 0 1 -16.50 1 o 0 £ Le) 1 0 -37.00 oO 1 o 0 0 1 0 -17.00 1 Oo Oo 1 oO 1 1 -37.50 io) 1 o 0 0 1 1 -17,50 1 Oo oO 1 1 0 0O- -38,00 Le} 1 Oo 60 1 0 O- -18.00 1 Oo Oo 1 1 fe) 1 -38.50 ° 1 Oo 0 1 0 1 -18.50 1 Oo 0 1 1 1 O- -39.00 Lo) 1 Oo Oo 1 1 0 -19.00 1 Oo Oo 1 1 1 1 -39.50 Lo} 1 Oo Oo f 1 1 -19.50 1 fe) 1 o 0 0 0O- -40,00 oO 1 o 1 Oo 0 0O- -20,00 1 fe) o 0 0 1 -40.50 "Msi Web Site “www.mix-sig.com” © 2005 - 2014 Mixed Signal Integration 8 ee

Product Information

MSLOSC specifications and overview.

Summary

15Hz to 64kHz All Silicon Sine Source

Description

15Hz to 64kHz All Silicon Sine Source

Source title MSLOSC Datasheet(PDF) - Mixed Signal Integration

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