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Document overview
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Technical content
Features
No response setting resistors Plastic DIP or S.O. packages available Switched Capacitor Filters 3.3 or 5 Volts Operation Operates from internal or external clock Elliptic or Butterworth responses
Applications
General Purpose Low-Pass Filters Absolute Maximum Ratings +6V Power Supply Voltage -60 to +150 C Storage Temperature 0 to 70 C Operating Temperature
Ordering Information
Part Type Package Operating Number Tempera- tures MSLE5LP Elliptic 8 Pin DIP 0 to 70C MSLE5LS Elliptic 8 PIN SOIC 0 to 70C MSLE5MP Elliptic 8 PIN DIP 0 to 70C MSLE5MS Elliptic 8 PIN SOIC 0 to 70C MSLB5LP Butterworth 8 PIN DIP 0 to 70C MSLB5LS Butterworth 8 PIN SOIC 0 to 70C MSLB5MP Butterworth 8 PIN DIP 0 to 70C MSLB5MS Butterworth 8 PIN SOIC 0 to 70C Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 1
MSLE5L/M,MSLB5L/M Switched Capacitor Gene ral Purpose Lowpass Filter Data Sheet (VDD = +5.0V, T = 25 C)o CLOCK LOW PASS FILTER FOUT FIN CLK R FO Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 2 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC Specifications Operating Voltage VDD 2.7 5.5 V Supply Current IDD L versions 100 300 1000 uA M versions 0.5 1.0 2.0 mA AC Specifications Gain Av -1 0 1 dB Maximum Corner Frequency fo max L versions 3 5 kHz M versions 10 20 kHz Clock Feedthrough - Filter Output Pedestal to Pedestal 10 mV (p-p) Clock to Corner fCLK/fo FO = LOW 99 100 101 Hz/Hz FO = HIGH 49 50 51 Hz/Hz Offset Voltage -10 10 mV Output Voltage Swing 4.0 4.5 Vp-p Level Shift Threshold VTL-to-VTH 1.6 2.0 2.4 V VTH-to-VTL 2.2 3.0 3.7 V VTL-to-VTH VDD = 2.7V 0.6 1.0 1.25 V VTH-to-VTL VDD = 2.7V 1.4 1.75 2.08 V
MSLE5L/M,MSLB5L/M Switched Capacitor Gene ral Purpose Lowpass Filte r Data Shee t Pin Description Pin Configuration
1 CLK Clock Input
2 R Connection for the Clock Resistor
( N C when using external clock)
3 FO Clock to Corner Select Pin, CMOS level
( NC is FO = HIGH)
4 VSS Negative Power Supply, Typically
- 2 . 5 V for Split Supplies, 0V for S i n g l e Supply
5 GND Ground Pin 0V for Split Supplies
Typically 2.5V for Single Supply
6 FOUT Filter Output
7 VDD Positive Power Supply, Typically
2.5V for Split Supplies, 5V for S i n g l e Supply
8 FIN Filter Input
Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 3 FIN VDD GND CLK R FO VSS FOUT
MSLE5L/M,MSLB5L/M Switched Capacitor Gene ral Purpose Lowpass Filter Data Sheet Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 4 MSLE5L/MSLE5M Frequency Response -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 250 500 750 1000 1250 1500 1750 2000 2250 2500 2750 3000 Frequency Gain MSLE5L/MSLE5M Group Delay 0.00E+00 5.00E-04 1.00E-03 1.50E-03 2.00E-03 2.50E-03 3.00E-03 3.50E-03 4.00E-03 250 500 750 1000 1250 1500 1750 2000 2250 2500 2750 3000 Frequency Group Delay
MSLE5L/M,MSLB5L/M Switched Capacitor Gene ral Purpose Lowpass Filte r Data Shee t Web Site “www.mix-sig.com” © 2015 Mixed Signal Integration 5 Mixed Signal Integration Corporation reserves the right to to change any product or specification without notice at any time. Mixed Signal Integration products are not designed or authorized for use in life support systems. Mixed Signal Integration assumes no responsibility for errors in this docu- ment. Typical Application Circuit Schematic Using External Clock Typical Application Circuit Schematic Using On-Chip Oscillator