DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 7
Technical content
FEATURES: 100V, 10 Amp Capability Ultra Low Thermal Resistance - Junction to Case - 2.5°C/W (Each MOSFET) Self-Contained, Lowside/Highside Drive Circuitry Bootstrap High-Side Supplies Under-Voltage Lockout Capable of Switching Frequencies to 25KHz Isolated Case Allows Direct Heat Sinking Bolt-down Design Allows Superior Heat Dissipation Total Dose Hardened to 300 Krads(Si) (Method 1019.7 Condition A) DESCRIPTION: The MSK4304RH is a radiation hardened 10 Amp, 3 Phase Bridge Power Motor Drive Hybrid with a 100 volt maximum rating on the output switches. The internal components have been selected to provide total dose tolerance for military and space applications. The output switches are MOSFETs. This new power motor drive hybrid is 5.0 volt input logic compat- ible. Under-voltage lockout prevents the bridge from starting before the supply voltage rises high enough for complete turn- on of the output switches. The internal high-side bootstrap power supply derived from the +VB supply completely elimi- nates the need for 3 floating independent power supplies. TYPICAL APPLICATIONSPIN-OUT INFORMATION TYPICAL APPLICATIONS PIN-OUT INFORMATION
3 PHASE SIX STEP DC BRUSHLESS MOTOR DRIVE
OR 3 PHASE SINUSOIDAL INDUCTION MOTOR DRIVE EQUIVALENT SCHEMATIC M.S. KENNEDY CORP. H INA L INA +VCC H INB L INB COM +VDD +VB H INC L INC N/C AV- AØ N/C BV- BØ N/C CV- CØ M.S.KENNEDY CORP. 4304RH
10 AMP, 100 VOLT
MIL-PRF-38534 AND 38535 CERTIFIED FACILITY 8548-35 Rev. J 8/14 CASE=ISOLATED
-65° to +150°C 300°C -40°C to +85°C -40°C to +125°C +150°C IDS=10A IDS=10A V+ = 80V V+ = 80V V+ = 80V ID=10A, di/dt=100A/μS IS=18A, VGS=0V IF=18A di/dt<100A/us, VDD<25V +VDD=15V +VCC=15V +VCC=15V +VDD OUTPUT CHARACTERISTICS Leakage Current (Each MOSFET) Reverse Recovery Time BODY DIODE CHARACTERISTICS V SD Diode Forward Voltage TRR Reverse Recovery Time QRR Reverse Recovery Charge BIAS SUPPLY CHARACTERISTICS +VDD Bias Current INPUT SIGNAL CHARACTERISTICS Positive Trigger Threshold Voltage Negative Trigger Threshold Voltage Under-voltage Lockout +VCC Bias Current +VB Bias Current Logic Input Current Switching Loss Inductive Load +VCC=15V +VB=15V All Inputs High Voltage Supply Logic Supply Logic Input Voltage Logic Input Current Lowside Supply Highside Supply Continuous Output Current Thermal Resistance @ 125°C (Output Switches,Junction to Case) Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only. Industrial grade devices shall be tested to subgroups 1 unless otherwise specified. Space and Military grade devices ("KE & HE" suffix) shall be 100% tested to subgroups 1, 2 and 3. Subgroups 5 and 6 testing available upon request. Subgroup 1, 4 TA=TC=+25°C 2, 5 TA=TC=+125°C 3, 6 TA=TC=-40°C for 'KE' and 'HE' SUFFIXES See UVLO paragraph in the application notes section. Continuous operation at or above absolute maximum ratings may adversely effect the device performance and/or life cycle. Pre and post irradiation limits at 25°C, up to 300Krad TID, are identical unless otherwise specified. When applying power to the device, apply the low voltage followed by the high voltage or alternatively,apply both at the same time. Do not apply high voltage without low voltage present. Internal solder reflow temperature is 180°C, do not exceed. Peak Output Current Storage Temperature Range Lead Temperature Range (10 Seconds) Case Operating Temperature MSK4304RH MSK4304KE/HE RH Junction Temperature ABSOLUTE MAXIMUM RATINGS ELECTRICAL SPECIFICATIONS Parameters MSK4304KE/HE RH Min. Typ. Max. 0.8 8.0 -10 0.08 0.16 0.08 1.5 2.4 1.2 250 370 1.2 250 850 3.0 12.0 0.8 8.0 -10 0.8 0.02 0.02 4.5 2.3 1.8 -1.2 TBD TBD 0.08 1.6 370 1.2 250 850 3.0 12.0 MSK4304RH Min. Typ. Max. 1,3 1,3 1,2,3 1,2,3 1,2,3 1,2,3 1,2,3 1,2,3 0.8 1.4 0.6 0.02 0.02 4.5 2.3 1.8 -1.2 TBD TBD Ω Ω Ω volts volts volts μA μA μA nS V ns nC mA mA mA mA mA volts volts volts μA μA μJ μJ 3GROUP A SUBGROUP Test Conditions NOTES: IPK TsT TLD TC TJ +VDD V H/LIN IH/LIN +VCC +VB I OUT θJC 100V 18V VDD 10mA 18V 18V 10A 2.5°C/W UNITS Drain-Source ON Resistance (each MOSFET) (for thermal calculations only) Drain-Source Voltage (VDS(on)) (each MOSFET) VIN=+5V VIN=0V E(ON) E(OFF) 8548-35 Rev. J 8/14
8548-35 Rev. J 8/14
MSK 4304RH PIN DESCRIPTIONS +VCC - Is the low voltage supply for the lowside driv- ers. A 0.1 μF ceramic capacitor in parallel with a 10μF tantalum capacitor is the recommended bypassing from the +VCC pin to the COM pin. +VDD - Is the low voltage supply for the input logic to the hybrid. A 0.1 μF ceramic capacitor in parallel with a 4.7μF tantalum capacitor is the recommended by- passing to the COM pin. +VB - Is the connection used to provide power to the floating high-side bootstrap supplies in the gate drive circuitry. V+ - Is the high voltage positive rail connection to the tops of the three half bridges. Proper power supply bypassing must be connected from this pin to the COM pin for good filtering. This bypassing must be done as close to the hybrid as possible. +VCC, +VDD and +VB should be present and stable whenever V+ is present. H INA, H INB, H INC - Are active high logic inputs for signalling the corresponding phase high-side switch to turn on. The logic inputs are compatible with standard LSTTL/CMOS outputs. These inputs are clamped to VDD and COM, they must be limited to less than 10mA if they are allowed to exceed those limits. L INA, L INB, L INC - Are active high inputs for signal- ling the corresponding phase low-side switch to turn on. The logic inputs are compatible with standard LSTTL/CMOS outputs. These inputs are clamped to VDD and COM, they must be limited to less than 10mA if they are allowed to exceed those limits. AØ, BØ, CØ - Are the pins connecting the 3 phase bridge switch outputs. AV-, BV-, CV- - Are the connections from the bottoms of the three half bridges. These pins get connected to the COM pin. If current sensing is desired they may be connected to the COM pin through a low value sense resistor. COM - Is the connection that all hybrid power supply connections are returned to and bypassed to. Radiation performance curves for TID testing have been generated for all radiation testing performed by MS Kennedy. These curves show performance trends throughout the TID test process and can be located in the MSK4304RH radiation test report. The complete radiation test report is available in the RAD HARD PRODUCTS section on the MSK website. TOTAL DOSE RADIATION TEST PERFORMANCE http://www.mskennedy.com/store.asp?pid=9951&catid=19680 UVLO - The under voltage lockout function of the MSK4304RH prevents the device from starting before sufficient bias volt- age is available. The UVLO feature monitors the VDD supply and holds the outputs low until the voltage level rises above the threshold during start up. After start up the UVLO circuit will hold the low side switches off if VDD falls below the thresh- old but the high side switches will not be controlled by UVLO after start up. MAXIMUM DUTY CYCLE AND HIGH SIDE BIAS - The MSK4304RH uses three independent bootstrap circuits to power each of the high side switches. When the switches are turned on the high side drivers are powered by the charge in the bootstrap capacitors. The voltage on the bootstrap capacitors has an initial 1.2V drop and decays at a rate of approximately 0.5V every 100μS. The voltage can be ap- proximated by the equation: V BS = +VB - 1.2V - 5 x TON TON is the switch on time in mS VBS is the bootstrap capacitor voltage VBS should be greater than or equal to 10 volts for maxi- mum gate drive. If VBS falls too low loss of high side con- trol my result. The lowside switches must be activate every cycle or held active during static operation to provide a return path for charging the highside bootstrap capacitor and prevent loss of highside control. 8548-35 Rev. J 8/14
The MSK4304RH is designed to be used with a +28 volt high voltage bus, +15 volt low power bus and +5 volt logic signals. Proper derating should be applied when designing the MSK4304RH into a system. High frequency layout tech- niques with ground planes on a printed circuit board is the only method that should be used for circuit construction. This will prevent pulse jitter caused by excessive noise pickup on the current sense signal or the error amp signal. Ground planes for the lower power circuitry and the high power circuitry should be kept separate. The connection between the bottom of the current sense resistor, COM pin and the high power ground, AV-, BV- and CV- pins are connected at this point. This is a critical path and high currents should not be flowing between the current sense and COM. Inductance in this path should be kept to a minimum. An RC filter will filter out the current spikes and keep the detected noise for those circuits down to a minimum. In the system shown a PWM pulse by pulse current limit scheme controlled by the motor controller is implemented. When controlling the motor speed by the PWM method, it is required that the low side switches be PWM pulsed to ensure sufficient bootstrap capacitor charge to power the high side switch drives. The higher the PWM speed the higher the current load on the drive supply. 8548-35 Rev. J 8/14
ORDERING INFORMATION
S=STRAIGHT; U=BENT UP; D=BENT DOWN SCREENING BLANK=INDUSTRIAL; HE=MIL-PRF-38534 CLASS H (REDUCED TEMP); KE=MIL-PRF-38534 CLASS K (REDUCED TEMP); GENERAL PART NUMBER ESD TRIANGLE INDICATES PIN 1 WEIGHT=42 GRAMS TYPICAL ALL DIMENSIONS ARE SPECIFIED IN INCHES CONTAINS INTERNAL BeO (BERYLLIUM OXIDE) 8548-35 Rev. J 8/14
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however and assumes no liability for the use of its products. Please visit our website for the most recent version of this datasheet. M.S. Kennedy Corp. Phone (315) 701-6751 FAX (315) 701-6752 www.mskennedy.com 7 8548-35 Rev. J 8/14