MSK4301 ANAREN | Alldatasheet
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Technical content
The MSK4301 is a 3 phase MOSFET bridge plus drivers in a convenient isolated hermetic package. The hybrid is capable of 29 amps of output current and 75 volts of DC bus voltage. It has a full line of protection features, including undervoltage lockout protection of the bias voltage, cross conduction control and a user programmable dead-time control for shoot-through elimination. In addition, the bridge may be shut down by using the Enable control. The MSK4301 provides good thermal conductivity for the MOSFETs due to the electrically isolated package design that allows direct heat sinking of the device without insulators. 4301 MIL-PRF-38534 AND 38535 CERTIFIED FACILITY TYPICAL APPLICATIONS DESCRIPTION: EQUIVALENT SCHEMATIC
3 Phase Brushless DC
FEATURES:
3 Phase AC
29 AMP, 75V, 3 PHASE MOSFET
75 Volt Motor Supply Voltage
29 Amp Output Switch Capability, All N-Channel MOSFET Output Bridge
100% Duty Cycle High Side Conduction Capable Suitable for PWM Applications from DC to 100KHz Shoot-Through/Cross Conduction Protection Undervoltage Lockout Protection Programmable Dead-Time Control Low Active Enable for Bridge Shutdown Control Isolated Package Design for High Voltage Isolation Plus Good Thermal Transfer Available with Three Lead Bend Options Contact MSK for MIL-PRF-38534 Qualification Status BH BL AL AH SWR VBIAS EN CL CH GND AØ AØ BØ BØ CØ CØ RSENSE RSENSE PIN-OUT INFORMATION 8548-71 Rev. J 1/15
Undervoltage Threshold (Falling) Undervoltage Threshold (Rising) Low Level Input Voltage High Level Input Voltage Low Level Input Current High Level Input Current OUTPUT BRIDGE Drain-Source Breakdown Voltage Drain-Source Leakage Current Drain-Source On Resistance (Each FET) Drain-Source On Resistance (Each FET, For Thermal Calculations Only) SWITCHING CHARACTERISTICS Rise Time Fall Time Turn-On Prop Delay (Lower) Turn-Off Prop Delay (Lower) Turn-On Prop Delay (Upper) Turn-Off Prop Delay (Upper) Dead Time Dead Time SOURCE-DRAIN DIODE CHARACTERISTICS Forward Voltage Reverse Recovery Time High Voltage Supply Bias Supply Logic Input Voltages Continuous Output Current Peak Output Current Thermal Resistance MOSFETS @ 125°C Storage Temperature Range Lead Temperature Range (10 Seconds) Case Operating Temperature MSK4301H MSK4301 Junction Temperature -3V transient to +75V -0.3V to +16V -0.3V to VBIAS +0.3V 29A 41A -3V transient to +75V -3V transient to +3V ABSOLUTE MAXIMUM RATINGS VBIAS VIND IOUT IPK AØ, BØ, CØ RSENSE 0.8°C/W -65°C to +150°C +300°C -55°C to +125°C -40°C to +85°C +150°C θJC TST TLD TC TJ Typ. 2.5 6.6 7.1 100 120 0.5 0.5 5.0 1.0 1.05 120 mAmp mAmp Volts Volts Volts Volts µAmp µAmp V µAmp Ω nSec nSec µSec µSec µSec µSec µSec µSec Volts nSec Parameter ELECTRICAL SPECIFICATIONS Units Max. 7.6 8.1 0.8 135 250 0.022 7.0 1.2 1.30 MSK4301 Min. 5.6 6.1 2.7 3.0 0.3 Test Conditions Typ. 2.5 6.6 7.1 100 120 0.5 0.5 5.0 1.0 1.05 120 Max. 7.6 8.1 0.8 135 250 0.022 7.0 1.2 1.30 Min. 5.6 6.1 2.7 3.0 0.3 1,2,3 1,2,3 Guaranteed by design but not tested. Typical parameters are representative of actual device performance but are for reference only. Industrial devices shall be tested to subgroups 1 and 4 unless otherwise specified. Military grade devices ("H" Suffix) shall be 100% tested to Subgroups 1, 2, 3 and 4. Subgroups 5 and 6 testing available upon request. Subgroup 1, 4 TA = TC = +25°C 2, 5 TA = TC = +125°C Continuous operation at or above absolute maximum ratings may adversly effect the device performance and/or life cycle. When applying power to the device, apply the low voltage followed by the high voltage or alternatively, apply both at the same time Do not apply high voltage without low voltage present. Internal solder reflow temperature is 180°C, do not exceed. SWR Resistor=∞ SWR Resistor=∞ - Ω0.0130.013 ---- MSK4301H NOTESNOTES: All Inputs Off f=20KHz, 50% Duty Cycle VIN=0V VIN=5V ID=250µA, All Inputs Off VDS=75V ID=29A V+=28V ID=29A SWR Resistor=∞ SWR Resistor=∞ SWR =∞ SWR=12K ISD=29A ISD=29A, di/dt=100A/µS GroupA Subgroup 4 3 2 8548-71 Rev. J 1/15
AL,BL,CL - Are the lowside logic level digital inputs. These three inputs control the three lowside bridge transistors. If the highside inputs are low, then the lowside inputs will control both the lowside and the highside of the bridge, with deadtime set by the SWR re - sistor. EN will override these inputs, forcing all outputs low. These inputs can be driven by logic up to 15V (less than VBIAS). An internal pullup to VBIAS will hold each input high if the pins are not driven. MSK4301 PIN DESCRIPTIONS AH,BH,CH - Are the highside logic level digital inputs. These three inputs control the three highside bridge transistors. Unless the deadtime is disabled by connecting SWR to ground, the lowside input of each phase will override the corresponding highside input. If SWR is the lowside input of each phase will override the corre - sponding highside input. In this condition, tied to ground, deadtime is disabled and the outputs follow the inputs. In this condition, shoot-through must be avoided externally. EN will override all inputs, forcing outputs low. VBIAS - Is the positive supply for the gate drive. This pin should be decoupled to ground with at least a 22µF capacitor in parallel with a 0.1µF ceramic capcitor. GROUND - Is the return for the VBIAS supply. This pin should be connected to the return of the lowside MOSFETs or the bottom of the sense resistor at the bottom of the bridge. The gate drive current must return through this pin, so trace lengths should be kept to a minimum. All grounds should be returned to the bottom of the bridge or sense resistor in a star fashion. This will eliminate ground loops. SWR - Is the pin for controlling the deadtime between the top and bottom transistors of the bridge. By connecting a pullup resistor between this pin and VBIAS, various deadtimes can be obtained. There is and internal 100KΩ pullup resistor connected internally. By adding additional resistors in externally, reduced deadtimes can be achieved. By connecting this pin directly to ground, all deadtime is eliminated. However, care must be taken to assure that deadtime is being generated by the logic circuitry driving the inputs. Shoot- through can occur (both the top and bottom transistors on at the same time for a given phase, causing a short on the V+ supply to ground) destroying the bridge. V+ - Is the power connection for the top of the output bridge. These pins must be bypassed by a capacitor to ground of a least 10µF per amp preferrably 100µF per amp of output current mini mum, high quality high frequency bypass capacitance to help sup- press switching noise. Connect both pins for proper current sharing. AØ, BØ, CØ - Are the output pins for the three phases of power bridge. Connect both pins for proper current sharing. The size and placement of the capacitors for the main voltage bus for the motor will have an effect on the noise filtered throughout the rest of the system. Series RLC tuned circuit is being created by the inductance of the wire (about 30nH per inch), the filter capacitance, and all of the resistances (wire resistance and the capacitor ESR) of the overall power circuit. Voltage spikes from the back EMF if the motor ride on top of the bus voltage. All of this must be taken into account when laying out the system. A first capacitor of high quality and low ESR should be placed as close to the hybrid circuit as possible. Along with that, a capacitor of 5x to 10x the first value should be added (and that second capacitor should have some ESR) and/or a resistor should be added to help with the damping of the voltage spikes. Be careful of the ripple current in all the capacitors. Excessive ripple current, beyond what the capacitor is rated for, will destroy the capacitor. BUS VOLTAGE FILTER CAPACITORS It is recommended that at least 22µF of capacitance for bypassing the VBIAS voltage that supplies the drive circuitry for the MSK4301, along with 0.1µF for helping the high frequency current pulses need- ed by the gate driver. If an extremely long risetime is exhibited by the turn on of the FETs, the extra high frequency capacitance will help. BIAS SUPPLY BYPASS CAPACITORS Good high frequency PC layout techniques are a must. Traces wide enough for the current delivered, and placement of the big capacitors close to the MSK4301 are very important. The path for the RSENSE connection through any sense resistor back to the GND pins must be as short as possible. This path is the gate drive current path for all the FETs on the lower half of each phase. A short, low inductance path will aid in the switching time of those FETs. GENERAL LAYOUT When starting up the circuit utilizing the MSK4301 for the first time, it is very important to keep certain things in mind. Because of the small size of the bridge, there is no internal short circuit protection and a short circuit will destroy the bridge. Any required short circuit protection must be built outside the bridge. Current and voltage limit the power supply feeding the V+ pins to the bridge, and monitor the current for any signs of short circuiting, or shoot-through currents. If there are large current spikes at the beginning of each switching cycle, there may be shoot through. Try raising the resistor value of the SWR. This will lengthen the deadtime and stop shoot-through. LOW POWER STARTUP EN - Is the enabling input for the bridge. This digital input, when pulled low, will enable the bridge, following the inputs from AL, BL, CL and AH, BH, CH inputs. When pulled high, it will override all other inputs and disable the bridge. It is internally pulled high to VBIAS, and can be driven by logic levels up to VBIAS. RSENSE - Are the connections to the bottom of the bridge. All power flowing through the bridge will flow through this point, and can be sensed by connecting a sense resistor from here to ground. The sense resistor will develop a voltage proportional to the current flowing. Size the value and power rating of the sense resistor ac- cording to the voltage necessary. 3 volts is the maximum voltage between this point and ground, or damage to the hybrid will result. Connect both pins for proper current sharing. 8548-71 Rev. J 1/15
TYPICAL APPLICATION SCHEMATIC TYPICAL PERFORMANCE CURVES 4 8548-71 Rev. J 1/15
ORDERING INFORMATION
The above example is a Military grade hybrid with leads bent up. LEAD CONFIGURATIONS S= STRAIGHT; U= BENT UP; D= BENT DOWN SCREENING BLANK= INDUSTRIAL; H = CLASS H GENERAL PART NUMBER ESD TRIANGLE INDICATESNPIN 1 WEIGHT= 48 GRAMS TYPICAL 8548-71 Rev. J 1/15 ALL DIMENSIONS ARE SPECIFIED IN INCHES
The information contained herein is believed to be accurate at the time of printing. MSK reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. Please visit our website for the most recent revision of this datasheet. Contact MSK for MIL-PRF-38534 qualification status. MSK www.mskennedy.com 8548-71 Rev. J 1/156