MSA-0400 HP | Alldatasheet

Document overview

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Technical content

Features

  • Cascadable 50 Ω Gain Block
  • 3 dB Bandwidth: DC to 4.0 GHz
  • 8.5 dB Typical Gain at 1.0␣ GHz
  • 16.0␣ dBm Typical P1 dB at 1.0␣ GHz MSA-0400 Chip Outline[1]

Description

The MSA-0400 is a high perfor- mance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 Ω gain block. Typical applications include narrow and broad band IF and RF amplifiers in commercial, industrial and military applications. Typical Biasing Configuration Note: 1. Refer to the APPLICATIONS section “Silicon MMIC Chip Use” for additional information. C block C block R bias VCC > 10 V Vd = 6.3 V RFC (Optional) IN OUT MSA The MSA-series is fabricated using HP’s 10 GHz fT, 25␣ GHz fMAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metalli- zation to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire. See APPLICATIONS section, “Chip Use”. 5965-9572E

Parameter Absolute Maximum [1] Device Current 120 mA Power Dissipation[2,3] 850 mW RF Input Power +13 dBm Junction Temperature 200 °C Storage Temperature –65 to 200 °C Thermal Resistance[2,4]: θjc = 35°C/W Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. T Mounting Surface (TMS) = 25°C. 3. Derate at 28.6 mW/°C for TMS␣> ␣1 7 0°C. 4. The small spot size of this tech- nique results in a higher, though more accurate determination of θ jc than do alternate methods. See MEASUREMENTS section “Thermal Resistance” for more information. GP Power Gain (|S21|2) f = 0.1 GHz dB 8.5 ΔGP Gain Flatness f = 0.1 to 2.5 GHz dB ± 0.6 f3 dB 3 dB Bandwidth GHz 4.3 Input VSWR f = 0.1 to 2.5 GHz 1.7:1 Output VSWR f = 0.1 to 2.5 GHz 1.8:1 NF 50 Ω Noise Figure f = 1.0 GHz dB 6.5 Output Power at 1 dB Gain Compression f = 1.0 GHz, I d = 50 mA dBm 12.5 Output Power at 1 dB Gain Compression f = 1.0 GHz, I d = 90 mA dBm 16.0 IP3 Third Order Intercept Point f = 1.0 GHz dBm 30.0 tD Group Delay f = 1.0 GHz psec 140 Vd Device Voltage V 5.7 6.3 6.9 dV/dT Device Voltage Temperature Coefficient mV/ °C –8.0 Notes: 1. The recommended operating current range for this device is 40 to 110 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer in a dual ground configuration. Electrical Specifications[1], TA = 25°C Symbol Parameters and Test Conditions [2]: Id = 90 mA, ZO = 50 Ω Units Min. Typ. Max. VSWR P1 dB Typical Scattering Parameters[1] (ZO = 50 Ω , TA = 25°C, Id = 50 mA) Freq. GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang k Note: 1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE MODELS section. S11 S21 S12 S22 Part Number Ordering Information Part Number Devices Per Tray MSA-0400-GP4 100

  1. S-parameters are de-embedded from 200 mil BeO package measured data using the package model found in the

Figure 1. Typical Power Gain vs. Frequency, TA = 25°C, Id = 90 mA. Figure 2. Power Gain vs. Current.G p (dB) Figure 3. Output Power at 1 dB Gain Compression, NF and Power Gain vs. Figure 4. Output Power at 1 dB Gain Figure 5. Noise Figure vs. Frequency.

0.1 GHz

1.0 GHz

2.0 GHz

OUTPUT [1] 394 µm 15.5 mil 394 µm 15.5 mil INPUT GROUND Unless otherwise specified, tolerances are –13 µm/ –0.5 mils. Chip thickness is 114µm/4.5 mil. Bond Pads are 41 µm/1.6 mil typical on each side. Note 1: Output contact is made by die attaching the backside of the die.