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6-Channel Electronic Volume Controller REV 2 1/13 www.mosanalog.com 6-Channel Volume Controller Gain and Attenuation 16~-79dB Low Voltage, High Channel Separation

FEATURES

‧Operation range: 2.7V~6.5V ‧Low power consumption ‧Gain/Attenuation: 16dB to –79dB at 1dB/step ‧Good PSRR 2C interface ‧Pop noise free ‧Housed in SSOP20, SOP20

APPLICATIONS

‧Multimedia system ‧Hi-Fi audio system ‧Car audio ‧Portable audio equipment

DESCRIPTION

The MS6266 is a 6-channel volume controller IC with gain and attenuation. It uses CMOS technology specially for the low voltage application with low noise, rail-to-rail output. The MS6266 provide an I2C control interface with gain / attenuation range of 16dB to -79dB, 1dB/step. The initial condition is set to be maximum attenuation –79dB and mute on mode when the power is on. PIN CONFIGURATION Symbol Pin Description IN1 1 1st channel input IN2 2 2nd channel input IN3 3 3rd channel input AC2 4 Address code 2 DGND 5 Digital Ground SCL 6 I2C clock input SDA 7 I2C data input IN4 8 4th channel input IN5 9 5th channel input IN6 10 6th channel input OUT6 11 6th channel output OUT5 12 5th channel output OUT4 13 4th channel output GND 14 Analog ground VREF 15 Reference voltage = 1/2VDD VDD 16 Positive supply voltage AC1 17 Address code 1 OUT3 18 3rd channel output OUT2 19 2nd channel output OUT1 20 1st channel output

1 OUT1

Note: 1. The address codes have four types, selected by AC1and AC2.

6-Channel Electronic Volume Controller REV 2 2/13 www.mosanalog.com BLOCK DIAGRAM I2C Interface Reference source -1dB/Step -10dB/StepIN1 IN2 GND SDASCL V REF OUT1 IN6 -1dB/Step -1dB/Step OUT2 OUT6 AC1 AC2 DGND VDD VREF 2dB/Step -10dB/Step 2dB/Step -10dB/Step 2dB/Step

ORDERING INFORMATION

Package Part number Packag ing Marking Transport Media 20-Pin SOP (lead free) MS6266GTR MS6266G 1k Units Tape and Reel 20-Pin SOP (lead free) MS6266GU MS6266G 35 Units Tube 20-Pin SSOP (lead free) MS6266SSGTR MS6266G 2.5k Units Tape and Reel 20-Pin SSOP (lead free) MS6266SSGU MS6266G 50 Units Tube ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Unit VDD Supply Voltage 6.5 V VESD Electrostatic Handling -3000 to 3000 V TSTG Storage Temperature Range -65 to 150 ℃ TA Operating Ambient Temperature Range -40 to 85 ℃ TJ Maximum Junction Temperature 150 ℃ TS Soldering Temperature, 10 seconds 260 ℃ RTHJA Thermal Resistance from Junction to Ambient in Free Air SOP20 SSOP20 210 210 ℃/W OPERATING RATINGS Symbol Parameter Min Typ Max Unit VDD Supply Voltage 2.7 - 6.5 V

6-Channel Electronic Volume Controller REV 2 3/13 www.mosanalog.com 5V ELECTRICAL CHARACTERISTICS (VDD=5.0V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=0dBV, VREF Cap=10uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics IQ Quiescent current - 10.4 11 mA Max gain - 16 - dB AGA Gain/Attenuation Max attenuation - -79 - dB ASTEP Gain/Attenuation step - 1 - dB EGA Gain/Attenuation step error - 0.3 - dB EIGA Interchannel gin/attenuation error - 0.3 - dB CS Channel separation 95 105 - dB PSRR Power supply rejection ratio Cap = 10uF (100Hz) - 53 - dB MUTE Mute Attenuation Vin=0dBV - 85 - dB Rin Input Impedance 18 20 - kΩ Rout Output Impedance - 50 100 Ω AC Characteristics Vo Maximum output voltage swing (THD+N)/S < 0.1% - 4.8 - Vpp THD+N Total harmonic distortion plus noise - -69 -64 dB S/N Signal-to-noise ratio VO=4.8Vpp 95 100 - dB Bus Characteristics VIH Bus high input level - - 0.7VDD V VIL Bus low input level 0.3VDD - - V 2.7V ELECTRICAL CHARACTERISTICS (VDD=2.7V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=-3dBV, VREF Cap=10uF; unless otherwise specified) Symbol Parameter Conditions Min Typ Max Unit DC Characteristics IQ Quiescent current - 8.2 8.8 mA CS Channel separation 90 100 - dB PSRR Power supply rejection ratio Cap = 10uF (100Hz) - 51 - dB MUTE Mute Attenuation Vin=-3dBV - 80 - dB AC Characteristics Vo Maximum output voltage swing (THD+N)/S < 0.1% - 2.6 - Vpp THD+N Total harmonic distortion plus noise - -69 -64 dB S/N Signal-to-noise ratio VO=2.6Vpp 85 90 - dB

6-Channel Electronic Volume Controller REV 2 4/13 www.mosanalog.com TYPICAL PERFORMANCE CHARACTERISTICS (Ta=25℃, RL=100k, VREF Cap=10uF; unless otherwise specified) THD+N (%) OUTPUT VOLTAGE (dBV) THD+N (%) OUTPUT VOLTAGE (dBV) THD+N (%) OUTPUT VOLTAGE (dBV) THD+N vs. output voltage THD+N vs. output voltage THD+N vs. output voltage f=20kHz f=20kHz f=20kHz f=20Hz f=20Hz f=20Hz f=1kHz f=1kHz f=1kHz VDD=5V VDD=2.7V VDD=3.3V THD+N (%) FREQUENCY (Hz) CHANNEL SEPARATION (dB) FREQUENCY (Hz) QUIESCENT CURRENT (mA) SUPPLY VOLTAGE (V) THD+N vs. frequency Channel separation vs. frequency Quiescent current vs. supply voltage VDD=5V VO=0dBV VDD=3.3V VO=-3dBV VDD=2.7V VO=-3dBV VDD=3.3V VO=-3dBV VDD=2.7V VO=-3dBV VDD=5V VO=0dBV PSRR (dB) FREQUENCY (Hz) PSRR (dB) FREQUENCY (Hz) PSRR (dB) FREQUENCY (Hz) PSRR vs. frequency PSRR vs. frequency PSRR vs. frequency CAP=22uF CAP=22uF CAP=22uF CAP=10uF CAP=10uF CAP=10uF CAP=2.2uF CAP=2.2uF CAP=2.2uF VDD=5V VRR=-20dBV VDD=3.3V VRR=-20dBV VDD=2.7V VRR=-20dBV

6-Channel Electronic Volume Controller REV 2 5/13 www.mosanalog.com I2C BUS DESCRIPTION Start and stop conditions A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing diagram below. SDA SCL Start Stop SCL : Serial Clock Line, SDA : Serial Data Line Data validity A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below. SDA SCL Data line stable, Data valid Data change allowed Byte format Ev ery byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transmitted first. Acknowledge D uring the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below. SCL SDA MSB Acknowledge 12 3 789 Start The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise, the SDA line will remain at the HIGH level during the ninth (9th) clock pulse. In this case, the master transmitter can generate the STOP information in order to abort the transfer.

6-Channel Electronic Volume Controller REV 2 6/13 www.mosanalog.com Timing of SDA and SCL bus lines tf S tLOW tHD;STA tr tHD;DAT tSU;DAT tf tHIGH tHD;STA tSU;STA Sr S P tSP tSU;STO tr tBUF SDA SCL Standard mode Symbol Parameter Min Max Unit fSCL SCL clock frequency 0 100 kHz tHD:STA Hold time (repeated) START condition. After this period, the first clock pulse is generated 4.0 - us tLOW LOW period of the SCL clock 4.7 - us tHIGH HIGH period of the SCL clock 4.0 - us tSU:STA Set-up time for a repeated START condition 4.7 - us tHD:DAT Data hold time: For I2C-bus devices 0 3.45 us tSU:DAT Data-set-up time 250 - ns tr Rise time of both SDA and SCL signals - 1000 ns tf Fall time of both SDA and SCL signals - 300 ns tSU:STO Set-up time for STOP condition 4.0 - us tBUF Bus free time between a STOP and START condition 4.7 - us Cb Capacitive load for each bus line - 400 pF VnL Noise margin at the LOW level for each connected device (including hysteresis) 0.1VDD - V VnH Noise margin at the HIGH level for each connected device (including hysteresis) 0.2VDD - V

6-Channel Electronic Volume Controller REV 2 7/13 www.mosanalog.com BUS INTERFACE Data are transmitted to and from the MCU to the MS6266 via the SDA and SCL. The SDA and SCL make up the BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage. SDA (Serial Data Line) Rp Rp SCL (Serial Clock Line) Pull up resistors VDD MCU MS6266 Interface protocol The fo rmat consists of the following ‧A START condition ‧A chip address byte including the MS6266 address. (7bits) ‧The 8 th bit of the byte must be “0”.(write=0, read=1) ‧MS6266 must always acknowledge the end of each transmitted byte. ‧A data sequence (N-bytes + Acknowledge) ‧A STOP condition SCL SDA 1-7 8 9 1-7 8 9 981-7 S P ADDRESS R/ W-- ACK ACK ACK DATA DATASTART CONDITION STOP CONDITION Address code The M S6266 has four address codes, they were selected by AC1(pin17)and AC2(pin4). AC1 AC2 Address code 0 0 80H 0 1 84H 1 0 88H 1 1 8CH AC1=1, AC2=0 1000 00 10 7 bits address MS6266 address W 0: connected to GND, 1: connected to VDD

6-Channel Electronic Volume Controller REV 2 8/13 www.mosanalog.com Data bytes description Functi on bits MSB LSB Function 1 1 1 0 A3 A2 A1 A0 6 channels, -1dB/step 1 1 0 1 B3 B2 B1 B0 6 channels, -10dB/step or +2dB/step 0 0 0 1 A3 A2 A1 A0 Channel 3, -1dB/step 0 0 0 0 B3 B2 B1 B0 Channel 3, -10dB/step or +2dB/step 0 0 1 1 A3 A2 A1 A0 Channel 4, -1dB/step 0 0 1 0 B3 B2 B1 B0 Channel 4, -10dB/step or +2dB/step 0 1 0 1 A3 A2 A1 A0 Channel 2, -1dB/step 0 1 0 0 B3 B2 B1 B0 Channel 2, -10dB/step or +2dB/step 0 1 1 1 A3 A2 A1 A0 Channel 5, -1dB/step 0 1 1 0 B3 B2 B1 B0 Channel 5, -10dB/step or +2dB/step 1 0 0 1 A3 A2 A1 A0 Channel 1, -1dB/step 1 0 0 0 B3 B2 B1 B0 Channel 1, -10dB/step or +2dB/step 1 0 1 1 A3 A2 A1 A0 Channel 6, -1dB/step 1 0 1 0 B3 B2 B1 B0 Channel 6, -10dB/step or +2dB/step 0 0 0 1 Power off preparation (pop noise free) 1 0 0 1 6 channels, mute On 1 1 1 1 1 0 0 0 6 channels, mute Off Gain / Attenuation bits A3 A2 A1 A0 Gain / Attenuation value (dB) B3 B2 B1 B0 A B 0 0 0 0 0 0 0 0 0 1 -1 -10 0 0 1 0 -2 -20 0 0 1 1 -3 -30 0 1 0 0 -4 -40 0 1 0 1 -5 -50 0 1 1 0 -6 -60 0 1 1 1 -7 -70 1 0 0 0 -8 +2 1 0 0 1 -9 +4 1 0 1 0 - +6 1 0 1 1 - +8 1 1 0 0 - +10 1 1 0 1 - +12 1 1 1 0 - +14 1 1 1 1 - +16 1. Where Ax=-1dB/step, Bx=-10dB/step or +2dB/step, -10dB and +2dB should not be loaded at the same time. 2. The initial condition is set to be maximum attenuation –79dB and mute on mode when the power on. 3. The output will drop down to ground gradually when enable power off preparation. 4. Odd gain 2N-1= N*(+2dB/step) + (-1dB), where N = 1~8. Please reference to examples.

6-Channel Electronic Volume Controller REV 2 9/13 www.mosanalog.com Examples Mute off The initial condition is –79dB and mute on when power on. The first command must disable the mute function. Data byteMSB ACKS t a r t 1111 00 10 MS6266 Address 6 channels, Mute off LSB StopACK80H, 84H, 88H, 8CH Set gain of 1st channel at 0dB ACKStart MS6266 Address ACK 1000 00 00 Ch 1, -10dB/step, 0dB 1001 00 00 ACK Ch 1, -1dB/step, 0dB Stop Set attenuation of 5 th channel at -6dB ACKStart MS6266 Address ACK 0110 00 00 Ch 5, -10dB/step, 0dB 0111 10 01 ACK Ch 5, -1dB/step, -6dB Stop Set attenuation of 3rd channel at –33dB ACKStart MS6266 Address ACK 0000 11 00 Ch 3, -10dB/step, -30dB 0001 11 00 ACK Ch 3, -1dB/step, -3dB Stop Set gain of 3 rd channel at 3dB ACKStart MS6266 Address ACK 0000 01 10 Ch 3, +2dB/step, 4dB 0001 01 00 ACK Ch 3, -1dB/step, -1dB Stop Odd gain 3dB = 2*2-1 = 2*(+2dB)+(-1dB) Set power off preparation command to prevent pop noise before power is off. ACKStart MS6266 Address ACK 1 1 1 1 0 1 00 Power off preparation Stop

6-Channel Electronic Volume Controller REV 2 10/13 www.mosanalog.com

APPLICATION INFORMATION

7 SDA

15 10uF0.1uF MS6266 10uF VREF GND AC2 DGND 10k IN11 10uF Signal-1 In 10k IN22 10uF Signal-2 In 10k IN33 10uF Signal-3 In 10k OUT1 20 10uF Signal-1 Out 10k OUT2 19 10uF Signal-2 Out 10k OUT3 18 10uF Signal-3 Out 10k OUT4 13 10uF Signal-4 Out 10k OUT5 12 10uF Signal-5 Out 10k OUT6 11 10uF Signal-6 Out 10k IN48 10uF Signal-4 In 10k IN59 10uF Signal-5 In 10k IN610 10uF Signal-6 In AC1 AC1=Hi, AC2=Lo, Address=88H Basic application flow chart Volume Control volume down to -79 dB step by step Enable Mute Function mute on Power off VDD = 0V Pop Noise Free power off preparation wait 0.5 sec Procedure Of Power OffProcedure Of Power On Volume Control volume up/down step by step Initial Conditions function off (-79dB) mute on Pop Noise Free wait 1 sec Disable Mute Function mute off Power on VDD = 5V

6-Channel Electronic Volume Controller REV 2 11/13 www.mosanalog.com EXTERNAL DIMENSIONS SSOP20 AA2 D E1 E be ZD Detail A L R θ Detail A H x 45 c SOP2 0 (300mil) H D h x 45 C Detail A 0.25mm Detail A L θ E A Be Dimension in mm Dimension in inchSymbol Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 A2 1.50 0.059 b 0.20 0.30 0.008 0.012 c 0.18 0.25 0.007 0.010 e 0.635 BASIC 0.025 BASIC D 8.56 8.74 0.337 0.344 E 5.79 6.20 0.228 0.244 E1 3.81 3.99 0.150 0.157 L 0.41 1.27 0.016 0.050 h 0.25 0.50 0.010 0.020 L1 0.254 BASIC 0.010 BASIC ZD 1.4732 REF 0.058 REF R1 0.20 0.33 0.008 0.013 R 0.20 0.008 θ 0o 8 o 0 o 8 o θ1 0o 0 o θ2 5o 15 o 5 o 15 o Dimension in mm Dimension in inchSymbol Min Max Min Max A 2.35 2.65 0.0926 0.1043 A1 0.10 0.30 0.004 0.0118 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.0091 0.0125 e 1.27 BSC 0.050 BSC D 12.6 13 0.4961 0.5118 E 7.4 7.60 0.2914 0.2992 H 10.00 10.65 0.394 0.419 L 0.40 1.27 0.016 0.050 h 0.25 0.75 0.010 0.029 θ 0o 8 o 0 o 8 o

6-Channel Electronic Volume Controller REV 2 12/13 www.mosanalog.com DEMO BOARD 版面說明 1.電源輸入：AVDD及DVCC兩組電源皆使用2.7V~6.5V。 2.控制鍵： VOL+：音量控制鍵，每按一下此鍵+1dB，最大+16dB，當按下此鍵時指示燈（+）閃爍一次，音量控制達最 大（+16dB）時，則指示燈（+）保持在亮的狀態，系統啟動時之預設值為0dB。 VOL-：音量控制鍵，每按一下此鍵-1dB，最小-79dB，當壓下此鍵時指示燈（-）閃爍一次，音量控制達最 MUTE：MUTE ON/OFF 開關，系統啟動時為MUTE OFF。 CH：通道選擇鍵，作為選擇欲控制音量之通道（CH1~CH6或All Channel），選擇的通道如指示燈所示，當選 擇Channel 1則指示燈（CH1）亮，選擇All Cha nnel時指示燈CH1~CH6）同時為亮，預設值為All Channel。 RESET：MCU重置鍵，按下此鍵可重置MCU狀態，在此表示系統返回預設值。 3.輸入端：由左至右分別為IN1~IN6，請連接於訊號源。 4.輸出端：由左至右分別為OUT1~OUT6請接於後級功率放大器。 5.位址選擇：參考MS6266 Data sheet並請使用短路環決定AC1及AC2之準位以決定使用之位址，此Demo board 使用之位址為88H，如下圖所示。 H AC2 L AC1 H L 2 3

6-Channel Electronic Volume Controller REV 2 13/13 www.mosanalog.com Circu it: R15 C14 10u C17 104 CH R13 10k R17 C12 R14 10u * 12 C13 10u R19 C10 R21 1k * 8 C20 20pF C19 20pF C11 R16 R22 IN11 IN22 IN33 AC24 DGND5 SCL6 SDA7 IN48 IN59 IN610 OUT1 20 OUT2 19 OUT3 18 AC1 17 VDD 16 VREF 15 GND 14 OUT4 13 OUT5 12 OUT6 11 MS6266 +C16 10uF MUTE RESET + C15 10u R18 C18 104 R20 12M P3.7 11 RST1 P1.0 12 P3.02 P1.1 13 P3.13 P1.2 14 XTAL24 P1.3 15XTAL15 P1.4 16 P3.26 P1.5 17 P3.37 P1.6 18 P3.48 P1.7 19 P3.59 Vcc 20 GND10 AT 89C2051 J15 DVCC J14 AVDD IN1 IN2 IN3 IN4 IN5 IN6 OUT6 OUT5 OUT4 J10 OUT3 J11 OUT2 J12 OUT1 100K * 12 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 1 2 3 4 5 6 J16 AC2 AC1 D8 CH1 D7 CH2 D6 CH3 D5 CH4 D4 CH5 D3 CH6 D2 VOL+ D1 VOL-