MRFIC2401 MOTOROLA | Alldatasheet

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MRFIC2401MOTOROLA RF DEVICE DATA The MRFIC Line /C0050/C0046/C0052 /C0071/C0072/C0122 /C0071/C0097/C0065/C0115 /C0068/C0111/C0119/C0110/C0099/C0111/C0110/C0118/C0101/C0114/C0116/C0101/C0114 The MRFIC2401 is a GaAs low–noise amplifier and downmixer in a low–cost 16 lead plastic package designed for use in the 2.4 to 2.5 GHz Industrial– Scientific–Medical (ISM) band. The design is optimized for efficiency at 5.0 Volt operation at 2.45 GHz but is usable from 2.0 to 3.0 GHz in applications such as telemetry and Multichannel Multipoint Distribution System (MMDS) wireless cable TV systems. Performance is suitable for frequency hopping or direct sequence spread spectrum as well as single–frequency applications. LNA output and mixer input are available to allow image filtering.

  • Single Supply Voltage = 5.0 Volts
  • High Conversion Gain = 21 dB Typical Less Image Filter
  • Low Supply Current = 9.5 mA Typical
  • Low–Cost, Low Profile Plastic SOIC Package
  • Available in Tape and Reel by Adding R2 Suffix to Part Number. R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel.
  • Device Marking = M2401 ABSOLUTE MAXIMUM RATINGS (TA = 25/C0095C unless otherwise noted) Parameter Symbol Value Unit Supply Voltage VDD 6.0 Vdc Input Power, RF IN Ports PRF +5.0 dBm Input Power, LO IN Port PLO +5.0 dBm Ambient Operating Temperature TA –30 to +85 /C0095C Storage Temperature Tstg –65 to +125 /C0095C Bias Control Voltage STANDBY 6.0 Vdc Pin Connections and Functional Block Diagram IF OUT GND RF IN MIXER GND RF OUT LNA GND STANDBY 16 15 14 13 12 11 10 9 MIXER VDD GND LO IN GND GND RF IN LNA GND LNA VDD SLEEP 1 2 3 4 5 6 7 8 MIXER VDD Order this document by MRFIC2401/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA /C0077/C0082/C0070/C0073/C0067/C0050/C0052/C0048/C0049 CASE 751B-05 (SO-16)

2.4 GHz

 Motorola, Inc. 1995 REV 3

RECOMMENDED OPERATING CONDITIONS Parameter Symbol Value Unit Supply Voltage VDD 4.75 to 5.25 Vdc IF Frequency Range fIF 100 to 350 MHz LO Drive Power Level PLO –10 to 0 dBm LO Frequency Range fLO 2050 to 2400 MHz RF Frequency Range fRF 2400 to 2500 MHz STANDBY Mode ON STANDBY VDD Vdc STANDBY Mode OFF STANDBY 0 Vdc SLEEP Mode OFF SLEEP VDD Vdc SLEEP Mode ON SLEEP 0 Vdc ELECTRICAL CHARACTERISTICS (VDD = 5.0 Vdc, TA = 25/C0095C, RF = 2.45 GHz, LO = 2.125 GHz @ –5.0 dBm, STANDBY = 0 Vdc) Characteristic Min Typ Max Unit Conversion Gain – Downconverter (Less Image Filter Loss) 19 21 – dB Gain – LNA – 17 – dB Conversion Gain – Mixer – 4.0 – dB Noise Figure – LNA – 1.9 – dB Noise Figure – Mixer – 11 – dB Return Loss – Mixer Input, LO Input, LNA Output – 10 – dB Input Third Order Intercept – Downconverter (Less Image Filter Loss) – –18 – dBm Input Third Order Intercept – LNA – –13 – dBm Input Third Order Intercept – Mixer – 0 – dBm Reverse Isolation – Downconverter (Less Image Filter Loss) – 30 – dB Isolation – LO to RF, LO to IF – 20 – dB Supply Current – Downconverter – 9.5 11 mA SLEEP Mode Supply Current – Downconverter (No LO, STANDBY= 5 Vdc, VDD /SLEEP = 5 Vdc) – 600 – /C0109A Turn On, Turn Off Time – LNA – 1.0 – /C0109s

Figure 1. Applications Circuit Configuration

325 MHz IF:

110 MHz IF:

240 MHz IF:

Table 1. Selected Port Impedances Figure 2. Equivalent IF Output Circuit

Table 2. LNA Scattering Parameters

Figure 9. Mixer 1.0 dB Compression and Gain Figure 10. Mixer Gain versus Frequency Figure 11. Mixer Noise Figure versus Frequency Figure 12. Mixer LO Feedthrough versus

110 MHz

MRFIC2401MOTOROLA RF DEVICE DATA DESIGN AND APPLICATIONS INFORMATION The MRFIC2401 consists of a two–stage GaAs MESFET low noise amplifier and a single ended MESFET mixer. The LNA design conserves bias current through stacking of the two FETs, thus reusing the current. The mixer consists of a common gate stage driving a common source stage with the IF output being the drain of the common source stage shunted with 15 pF. The LNA output and mixer input have been separated to allow the addition of an external image fil- ter. Such a filter, usually ceramic, is useful in improving the mixer noise figure and third order intercept performance. It also provides LO rejection to reduce the amount of LO power which may leak to the antenna. Alternatively, image trapping can be implemented at the LNA input or output with discrete or distributed components. The design has been optimized for best performance from 2.4 to 2.5 GHz, but the device is usable with reduced perfor- mance from 2.0 to 3.0 GHz as shown in the performance curves. These curves were generated using the circuit shown in Figure 1 and performance above 2.5 GHz can be enhanced by rematching the LO input port. Matching circuit details are shown for IFs of 110 MHz, 240 MHz, and

325 MHz matched to 50 /C0087 and LO frequencies consistent

with an RF frequency of 2.45 GHz. Customized IF matching can be accomplished by using the Equivalent IF Output cir- cuit model shown in Figure 2. The best gain/noise figure tradeoff match is shown in the LNA input impedance column of Table 1. The LO input impedance is shown in the same table. These numbers are derived from conjugate match measurements of the applications circuit. The LNA output and mixer input are matched to 50 /C0087. As with all RF circuitry, layout is important. Controlled impedance lines should be used at all RF ports. RF bypas- sing of power supply connections as close to the part as pos- sible, while not always shown in the applications circuit, are recommended. Additional power supply “stiffening” and digi- tal transient bypassing should be accomplished with electro- lytic or tantalum capacitors. The device can be placed in a reduced current “standby” mode by applying 5.0 Vdc to the STANDBY pin and remov- ing the LO drive. Further current reduction “sleep” mode, is enabled by applying 0 Vdc to VDD /SLEEP. This sleep mode can also be used to disable the LNA under high signal level conditions and give higher input intercept point if VDD is still applied to the mixer. EVALUATION BOARDS Evaluation boards are available for RF Monolithic Inte- grated Circuits by adding a “TF” suffix to the device type. For a complete list of currently available boards and ones in development for newly introduced poduct, please con- tact your local Motorola Distributor or Sales Office.

CASE 751B–05 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 16 9 SEATING PLANE F JM R X 45/C0095 G

8 PLP–B–

–A– M0.25 (0.010) B S –T– D K C 16 PL SBM0.25 (0.010) A ST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 /C0095/C0095/C0095/C0095 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE : Motorola Literature Distribution; JAPAN : Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 INTERNET : http://Design–NET.com 51 Ting Kok R oad, Tai Po, N.T., Hong Kong. 852–26629298 MRFIC2401/D /C0042/C0077/C0082/C0070/C0073/C0067/C0050/C0052/C0048/C0049/C0047/C0068/C0042