MRF6522-70R3_08 FREESCALE | Alldatasheet
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RFPowerFieldEffectTransistor N--Channel Enhancement--Mode Lateral MOSFET Designed for GSM 900 frequency band, the high gain and broadband performance of this device make it ideal for large--signal,common source amplifier applications in 26 volt base station equipment.
- Specified Performance @ 940 MHz, 26 Volts Output Power, P1dB — 80 Watts (Typ) Power Gain @ P1dB — 16 dB (Typ) Efficiency @ P1dB — 58% (Typ)
- Capable of Handling 5:1 VSWR, @ 26 Vdc, 945 MHz, 50 Watts CW Output Power
- RoHS Compliant
- In Tape and Reel. R3 Suffix = 250 Units per 32 mm, 13 inch Reel. Table1.MaximumRatings Rating Symbol Value Unit Drain--Source Voltage VDSS --0.5, +65 Vdc Gate--Source Voltage VGS ±20 Vdc Drain Current — Continuous ID 7 Adc Total Device Dissipation @ TC = 25°C Derate above 25°C PD 159 0.9 W W/°C Storage Temperature Range Tstg --65 to +150 °C Case Operating Temperature TC 150 °C Operating Junction Temperature TJ 200 °C Table2.ThermalCharacteristics Characteristic Symbol Value Unit Thermal Resistance, Junction to Case RθJC 1.1 °C/W NOTE --CAUTION -- MOS devices are susceptible to damage from electrostaticcharge. Reasonable precautions in handling and packaging MOS devices should be observed. Document Number: MRF6522--70 Rev. 9, 10/2008 FreescaleSemiconductor Technical Data MRF6522--70R3 920--960MHz,70W,26V LATERALN--CHANNEL RFPOWERMOSFET CASE465D--05, STYLE1 NI--600 LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09 Freescale Semiconductor, Inc., 2008. All rights reserved.
Table3.ElectricalCharacteristics(TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OffCharacteristics Drain--Source Breakdown Voltage (VGS = 0 Vdc, ID = 20µAdc) V(BR)DSS 65 — — Vdc Zero Gate Voltage Drain Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 10 µAdc Gate--Source Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) IGSS — — 1 µAdc OnCharacteristics Gate Threshold Voltage (VDS = 10 Vdc, ID = 300µAdc) VGS(th) 2 3 4 Vdc Gate Quiescent Voltage (VDS = 26 Vdc, ID = 400 mAdc) VGS(Q) 3 4 5 Vdc Drain--Source On--Voltage (VGS = 10 Vdc, ID = 1 Adc) VDS(on) — 0.15 0.6 Vdc Forward Transconductance (VDS = 10 Vdc, ID = 2 Adc) gfs 2 3 — S DynamicCharacteristics Input Capacitance(1) (VDS = 26 Vdc, VGS = 0, f = 1 MHz) C iss — 130 — pF Output Capacitance (VDS = 26 Vdc, VGS = 0, f = 1 MHz) C oss 41 47 52 pF Reverse Transfer Capacitance (VDS = 26 Vdc, VGS = 0, f = 1 MHz) C rss 2.4 3 3.4 pF Functional Tests(In Freescale Test Fixture) Output Power (VDD = 26 Vdc, IDQ = 400 mA, f = 940 MHz) P1dB 73 80 — W Common--Source Amplifier Power Gain @ P1dB (Min) (VDD = 26 Vdc, IDQ = 400 mA, f = 940 MHz) Gps 14 16 18 dB Drain Efficiency @ Pout= 50 W (VDD = 26 Vdc, IDQ = 400 mA, f = 940 MHz) η1 47 51 — % Drain Efficiency @ P1dB (VDD = 26 Vdc, IDQ = 400 mA, f = 940 MHz) η2 — 58 — % Input Return Loss @ Pout= 50 W (VDD = 26 Vdc, IDQ = 400 mA, f = 940 MHz) IRL — — --15 dB 1. Value excludes the input matching. LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09
Figure1.MRF6522--70TestCircuitSchematic C13 C11C9C8 C14 C10 VSUPPLY RF Output C12C3 RF Input C1VBIAS Vreg Gnd Vin Vout C1 1.0 µF Chip Capacitor (0805) C2 10 µF, 35 Vdc Tantalum Capacitor C3 100 nF Chip Capacitor C4, C6, C14 22 pF Chip Capacitors, ACCU--P (0805) C5 2.7 pF Chip Capacitor, ACCU--P (0805) C7, C8, C13 4.7 pF Chip Capacitors, ACCU--P (0805) C9, C10 8.2 pF Chip Capacitors, ACCU--P (0805) C11, C12 2.2 pF Chip Capacitors, ACCU--P (0805) R1 10 Ω Chip Resistor (0805) R2 1.0 k Ω Chip Resistor (0805) R3 1.2 k Ω Chip Resistor (0805) R4 2.2 k Ω Chip Resistor (0805) R5 220 Ω Chip Resistor (0805) R6 5.0 k Ω SMD Potentiometer T1 LP2951 Micro--8 T2 BC847 SOT--23 SUBSTRATE GI180 0.8 mm Figure2.MRF6522--70TestCircuitComponentLayout C5 C8 C9 C10 C11 C12 C13 STRAP VGroundV C14 MRF6522--70 SUPPLYBIAS Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor signature/logo. PCBs may have either Motorolaor Freescalemarkings duringthe transitionperiod. Thesechanges willhave no impact on form, fit or function of the current product. LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09
Pout, OUTPUT POWER (WATTS)Pout, OUTPUT POWER (WATTS) 17.5 15.0 Figure3.PowerGainversusOutputPower 15.5 16.0 Figure4.PowerGainversusOutputPower 10010 18.0 17.6 16.2 16.6 17.4 16.0 16.5 17.0 100 Gps, POWER GAIN (dB) VDS = 26 Vdc f = 921 MHz Figure5.OutputPowerversusSupplyVoltage Figure6.Outpu tPowerversusSupplyVoltage Figure7.EfficiencyandOutputPower versusInputPower 200 mA 300 mA 400 mA 500 mA IDQ = 600 mA 16.4 16.8 17.2 17.0 17.8 VDS = 26 Vdc f = 960 MHz 200 mA 300 mA 400 mA 500 mA IDQ = 600 mA Gps, POWER GAIN (dB) VDD, SUPPLY VOLTAGE (VOLTS) 115 105 Pout, OUTPUT POWER (WATTS) 20 22 24 26 IDQ = 400 mA f = 921 MHz Pin= 5.0 W 3.0 W 4.0 W 2.0 W VDD, SUPPLY VOLTAGE (VOLTS) 105 Pout, OUTPUT POWER (WATTS) 20 22 24 26 IDQ = 400 mA f = 960 MHz Pin= 5.0 W 3.0 W 4.0 W 2.0 W η Pin, INPUT POWER (WATTS) 2.0 η, EFFICIENCY(%) 0.5 1.0 1.5 VDS = 26 Vdc IDQ = 400 mA f = 921 MHz0 Pout, OUTPUT POWER (WATTS) Pout 19 21 23 25 27 2719 21 23 25 LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09
η Pin, INPUT POWER (WATTS) Figure8.EfficiencyandOutputPower versusInputPower Figure9.PowerGainandEfficiency versusInputPower Figure10.PowerGainandEfficiency versusInputPower η, EFFICIENCY(%) Gps, POWER GAIN (dB) VDS = 26 Vdc f = 921 MHz η Gps Pin, INPUT POWER (WATTS) 2.0 η, EFFICIENCY(%) 0.5 1.0 1.5 VDS = 26 Vdc IDQ = 400 mA f = 960 MHz0 Pout, OUTPUT POWER (WATTS) Pout Pin, INPUT POWER (WATTS) η, EFFICIENCY(%) Gps, POWER GAIN (dB) VDS = 26 Vdc f = 960 MHz η Gps LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09
Figure11.PerformanceinBroadbandCircuit(atSmallSignal) f, FREQUENCY (MHz) --10 --25 910 --20 --15 970 VDS = 26 Vdc IDQ = 400 mA 920 950 960 IRL, INPUT RETURN LOSS (dB) Gps, GAIN (dB) 930 940 IRL Gps LIFETIMEBUY LASTORDER3OCT08 LASTSHIP14MAY09
Figure12.SeriesEquivalentSourceandLoadImpedance f MHz Zsource Ω Zload Ω 925 940 960 2.65 -- j2.53 2.85 -- j1.87 2.67 -- j2.14 1.62 + j0.2 1.56 + j0.34 1.55 + j0.2 V SUPPLY= 26 Vdc, IBIAS= 400 mA, CW = Room Temperature Zo= 5Ω f = 925 MHz f = 925 MHz960 MHz Zsource= Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Zsource Zload Input Matching Network Device UnderTest Output Matching Network Zsource Zload
960 MHz
LASTORDER3OCT08 LASTSHIP14MAY09
D G K A C H E SEATING PLANE F NOTES: 1. INTERPRET DIMENSIONSAND TOLERANCES PER ANSIY14.5M--1994. 2. CONTROLLING DIMENSION:INCH. 3. DIMENSION H ISMEASURED 0.030 (0.762) AWAY FROM PACKAGEBODY. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 1.065 1.075 27.05 27.30 B 0.380 0.390 9.65 9.91 C 0.160 0.205 4.06 5.21 D 0.425 0.435 10.80 11.05 E 0.060 0.070 1.52 1.78 F 0.004 0.006 0.10 0.15 G 0.870 BSC 22.10 BSC H 0.096 0.106 2.44 2.69 K 0.190 0.223 4.83 5.66 M 0.594 0.606 15.09 15.39 Q 0.124 0.130 3.15 3.30 R 0.394 0.404 10.01 10.26 STYLE1: PIN 1. DRAIN 2. GATE 3. SOURCE Q2X MAMbbb B MT MAMbbb B MT B B (FLANGE) MAMccc B MT MAMbbb B MT A T N (LID) M (INSULATOR) S MAMaaa B MT (INSULATOR) R MAMccc B MT (LID) S 0.395 0.405 10.03 10.29 N 0.591 0.601 15.01 15.27 aaa 0.005 REF 0.13 REF bbb 0.010 REF 0.25 REF ccc 0.015 REF 0.38 REF
Refer to the following documents to aid your design process. EngineeringBulletins
- EB212: Using Data Sheet Impedances for RF LDMOS Devices REVISIONHISTORY The following table summarizes revisions to this document. Revision Date Description 9 Oct. 2008 • Modified data sheet to reflect RF Test Reduction described in Product and Process Change Notification number, PCN12779, p. 1, 2
- Added Product Documentation and Revision History, p. 9
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