MPXV5004 NXP | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 26
Technical content
Features
- 1.5% maximum error for 0 to 100 mm H 2O over +10 °C to +60 °C with autozero
- 2.5% maximum error for 100 to 400 mm H 2O over +10 °C to +60 °C with autozero
- 6.25% maximum error for 0 to 400 mm H 2O over 10 °C to +60 °C without autozero
- Temperature compensated over 10 °C to 60 °C
- Available in gauge surface mount (SMT) or through-hole (DIP) configurations
- Durable thermopl astic (PPS) package
Applications
- Washing machine water level
- Ideally suited for microprocessor or microcontroller-based systems
- Appliance liquid level and pressure measurement
- Respiratory equipment Top view Pinout MPXV5004 MPVZ5004 Pin 1 identification, notch on first pin or chamfered corner. DNC DNC DNC DNC DNC VS GND VOUT MPXV5004GC7U Case 98ASB17759C MPVZ5004GW7U Case 98ASA10611D Small outline packages, through-hole MPVZ5004G7U Case 98ASB17758C
2 Freescale Semiconductor, Inc.
Ordering Information
Part number Shipping Package # of Ports Pressure type Device markingNone Single Dual Gauge Differential Absolute Small outline package (MPXV5004 series) MPXV5004DP Tray 98ASA99255D • • MPXV5004DP MPXV5004GC6T1 Reel 98ASB17757C • • MPXV5004G MPXV5004GC6U Rail 98ASB17757C • • MPXV5004G MPXV5004GC7U Rail 98ASB17759C • • MPXV5004G MPXV5004GP Tray 98ASA99303D • • MPXV5004GP MPXV5004GPT1 Reel 98ASA99303D • • MPXV5004GP MPXV5004GVP Tray 98ASA99302D • • MPXV5004GVP Small outline package (Media resistant gel) (MPVZ5004 series) MPVZ5004G6T1 Reel 98ASB17756C • • MPVZ5004G MPVZ5004G6U Rail 98ASB17756C • • MPVZ5004G MPVZ5004G7U Rail 98ASB17758C • • MPVZ5004G MPVZ5004GC6U Rail 98ASB17757C • • MPVZ5004G MPVZ5004GW6U Rail 98ASA10686D • • MZ5004GW MPVZ5004GW7U Rail 98ASA10611D • • MZ5004GW MPXV5004GVP Case 98ASA99302D MPXV5004GP/GPT1 Case 98ASA99303D MPXV5004GC6T1/6U, MPVZ5004GC6U Case 98ASB17757C MPXV5004DP Case 98ASA99255D MPVZ5004G6U/6T1 Case 98ASB17756C MPVZ5004GW6U Case 98ASA10686D Small outline packages, surface mount
The MPXV5004G device features and operations are described in a variety of reference manuals, user guides, and application notes. To find the most-current versions of these documents: 1. Go to the Freescale homepage at: http://www.freescale.com/ 2. In the Keyword search box at the top of the page, enter the device number MPXV5004G. 3. In the Refine Your Result pane on the left, click on the Documentation link. MPxx5004 Sensors Freescale Semiconductor, Inc. 3
Contents
4 Freescale Semiconductor, Inc.
1 General Description
1.1 Block diagram
Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. Figure 1. Integrated pressure sensor schematic
1.2 Pinout
Figure 2. Device pinout (top view) Table 1. Pin functions 1 DNC Do not connect to external circuitry or ground. Pin 1 is notated by the notch in the lead or chamfered corner.
3 GND Ground
5 DNC Do not connect to external circuitry or ground. 6 DNC Do not connect to external circuitry or ground. 7 DNC Do not connect to external circuitry or ground. 8 DNC Do not connect to external circuitry or ground. Pins 1, 5, 6, 7, and 8 are internal device connections. Do not connect to external circuitry or ground. notch on first pin or chamfered corner.
2 Mechanical and Electr ical Specifications
2.1 Maximum ratings
2.2 Operating characteristics
Table 2. Maximum ratings(1)
- Exposure beyond the specified limits may caus e permanent damage or degradation to the device.
Table 3. Operating characteristics (VS = 5.0 VDC, TA = 25 °C unless otherwise noted, P1 > P2)
- Device is ratiometric within this specified excitation range.
- Span is defined as the algebraic difference between the output voltage at specified pressure and the output voltage at the minimum rated
- Offset (V off) is defined as the output voltage at the minimum rated pressure.
- Accuracy (error budget) consists of the following:
and from the minimum or maximum operating temperature points, with zero differential pressure applied. or maximum rated pressure, at 25 °C. TcSpan: Output deviation over the temperature range of 10 °C to 60 °C, relative to 25 °C. Variation from nominal: The variation fr om nominal values, for offset or full-scale span, as a percent of VFSS, at 25 °C.
- Autozero at factory installation: Due to the sensitivity of the MPxx5004G, external mechanical stresses and mounting position can affect the
±5 °C between autozero and measurement.
6 Freescale Semiconductor, Inc.
3 On-chip Temperature Comp ensation and Calibration
calibration and signal conditioning circuitry onto a single monolithic chip. surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the silicon diaphragm. other media, are available from the factory. Contact the factory for information regarding media tolerance in your application. microprocessor or microcontroller. Proper decoupling of the power supply is recommended. decoupling circuit shown in Figure 4. The output will saturate outside of the specified pressure range. Figure 3. Cross-sectional diagram (not to scale) Figure 4. Recommended power supply decoupling and output filtering
8 Freescale Semiconductor, Inc.
4 Package Information
4.1 Pressure (P1)/Vacuum (P2) side identification
Freescale Semiconductor designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The pressure (P1) side is the side containing silicone gel which isolates the die from the environment. The Freescale Semiconductor pressure sensor is designed to operate with positive differential pressure applied, P1 > P2. The pressure (P1) side may be identified by using the table below.
4.2 Minimum recommended footprint for surface mounted applications
layer to avoid bridging and shorting between solder pads. Figure 7. SOP footprint (case 98ASB17756C) Table 4. Pressure (P1)/Vacuum (P2) side identification table
0.060 TYP 8X
0.100 TYP 8X
0.100 TYP 6X
Freescale Semiconductor, Inc. 9
4.3 Package Dimensions
This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASB17756C.pdf. Case 98ASB17756C, small outline package, surface mount
10 Freescale Semiconductor, Inc. This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASB17757C.pdf. Case 98ASB17757C, small outline package, through-hole This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASB17758C.pdf. Case 98ASB17758C, small outline package, through-hole DIM MIN MAX MIN MAX MILLIMETERSINCHES A 10.540.4250.415 10.79 B 10.540.4250.415 10.79 C 12.700.5200.500 13.21 D 0.960.0420.038 1.07 G 0.100 BSC 2.54 BSC H 0.002 0.010 0.05 0.25 J 0.009 0.011 0.23 0.28 K 0.061 0.071 1.55 1.80 M 0 7 0 7 N 0.444 0.448 11.28 11.38 S 0.709 0.725 18.01 18.41 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. S D G 8 PL SBM0.25 (0.010) A ST –A– –B– C M J K PIN 1 IDENTIFIER H SEATING PLANE –T– N V W V 0.245 0.255 6.22 6.48 W 0.115 0.125 2.92 3.17 DIM MIN MAX MIN MAX MILLIMETERSINCHES A 10.540.4250.415 10.79 B 10.540.4250.415 10.79 C 5.330.2200.210 5.59 D 0.660.0340.026 0.864 G 0.100 BSC 2.54 BSC J 0.009 0.011 0.23 0.28 K 0.100 0.120 2.54 3.05 M 0 15 0 15 N 0.405 0.415 10.29 10.54 S 0.540 0.560 13.72 14.22 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. 6. DIMENSION S TO CENTER OF LEAD WHEN FORMED PARALLEL. PIN 1 IDENTIFIER K SEATING PLANE–T– S G –A– –B– C M J N D 8 PL SBM0.25 (0.010) A ST DETAIL X DETAIL X
Freescale Semiconductor, Inc. 11 This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASB17759C.pdf. Case 98ASB17759C, small outline package, through-hole D FREESCALE
12 Freescale Semiconductor, Inc. This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASA99255D.pdf. Case 98ASA99255D, small outline package, surface mount PAGE 1 OF 2
Freescale Semiconductor, Inc. 13 Case 98ASA99255D, small outline package, surface mount PAGE 2 OF 2
14 Freescale Semiconductor, Inc. This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASA99302D.pdf. Case 98ASA99302D, small outline package, surface mount PAGE 1 OF 3
Freescale Semiconductor, Inc. 15 Case 98ASA99302D, small outline package, surface mount PAGE 2 OF 3 PAGE 2 OF 3
16 Freescale Semiconductor, Inc. Case 98ASA99302D, small outline package, surface mount PAGE 3 OF 3 PAGE 3 OF 3
Freescale Semiconductor, Inc. 17 This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASA99303D.pdf. Case 98ASA99303D, small outline package PAGE 1 OF 2 PAGE 1 OF 2
18 Freescale Semiconductor, Inc. Case 98ASA99303D, small outline package PAGE 2 OF 2 PAGE 2 OF 2
Freescale Semiconductor, Inc. 19 This drawing is located at http://cache.freescale.com/files/shared/doc/package_info/98ASA10611D.pdf. Case 98ASA10611D, small outline package PAGE 1 OF 3
20 Freescale Semiconductor, Inc. Case 98ASA10611D, small outline package PAGE 2 OF 3
Freescale Semiconductor, Inc. 21 Case 98ASA10611D, small outline package PAGE 3 OF 3
22 Freescale Semiconductor, Inc. This drawing is available at http://cache.freescale.com/files/shared/doc/package_info/98ASA10686D.pdf Case 98ASA10686D, small outline package PAGE 1 OF 3
Freescale Semiconductor, Inc. 23 Case 98ASA10686D, small outline package PAGE 2 OF 3
24 Freescale Semiconductor, Inc. Case 98ASA10686D, small outline package PAGE 3 OF 3
5 Revision History
Table 5. Revision history
- Updated format.
- Table 3: Updated Full-scale span Typ value, was 4.0 to 3.92. Updated Linearity defintion in note 4.
- Updated package drawings with current versions.
Document Number: MPxx5004 Rev. 12.1 Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/salestermsandconditions. How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., respective owners. © 2006-2009, 2015 Freescale Semiconductor, Inc.