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MPQ8039 Rev.1.02 www.MonolithicPower.com 1 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MPQ8039 is a general purpose, high frequency half bridge power driver capable of driving a 9A load. The device integrates both top and bottom N-Channel MOSFET power switches and is fully protected from both sourcing and sinking current by a preset cycle-by-cycle current limit. It has a wide input voltage range from 7.5V to 25V. The MPQ8039 features a low-current shutdown mode, input under-voltage protection, thermal shutdown. It interfaces with standard logic signals and is available in a small SOIC8E package.
FEATURES
Guaranteed Industrial/Automotive Temp. Range Limits ±9A Peak Current Output ±4.25A Continuous Current Output Up to 1.2MHz Switching Frequency Protected Integrated Power 100mΩ Switches All Switches Current Limited Integrated Under-Voltage Protection Integrated Thermal Protection 2.5 μA Standby Mode True 2-Quadrant Operation Sources and Sinks Current Available in AEC-Q100 Qualified Grade
APPLICATIONS
Class D Audio Driver o 25W/4 Ω/10% Output Power Single Ended o 70W/4 Ω/10% Output Power Full Bridge Full or Half Bridge DC-DC Switching Regulator Motor Driver All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION SP BS SWGND DRV 1 3 SHDN PWM ENABLE PWM INPUT SIGNAL 47nF VOUT VSP
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 2 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM
ORDERING INFORMATION
Part Number Package Top Marking MPQ8039GN* SOIC8E MP8039 MPQ8039GN-AEC1** SOIC8E MP8039 * For Tape & Reel, add suffix –Z (eg. MPQ8039GN–Z) ** For Tape & Reel, add suffix –Z (eg. MPQ8039GN-AEC1–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Continuous Power Dissipation (TA = +25°C) (2) Recommended Operating Conditions (3) Operating Junction Temp. (T J). -40°C to +125°C Thermal Resistance (4) θJA θJC Notes: 1) Absolute maximum ratings are rated under room temperature unless otherwise noted. Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable c ontinuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the device will go into thermal s hutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on approximately 1” square of 1 oz copper. 5) For room temperature only. MPQ8039_PD01-SOIC8N
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 3 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM
ELECTRICAL CHARACTERISTICS
VSP = 12V, VSHDN = 0V, TJ = -40°C to +125°C, Typical value are TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units SP Operating Current 1.5 2.5 mA SP Shutdown Current V SHDN = 2V 2.5 10 μA SHDN, SP Threshold Low 1 V SHDN, SP Threshold High 2 V SHDN, SP Input Bias Current 1 μA SW On Resistance V SP = 7.5V, High-Side and Low-Side 0.1 0.25 Ω SW Current Limit (5) V PWM = 5, (Sinking) 9 A V PWM = 0, (Sourcing) 9 A SW Switching Frequency V PWM = 0 to 2V, 50% Duty Cycle 1.2 MHz SW Maximum Duty Cycle (6) VSP = 7.5V, VPWM = 2V, CSW 100nF, fSW = 3.3kHz 99.5 % SW Rise/Fall Time V PWM = 0 to 5V 20 ns PWM Pulse Width V PWM = 0 to 2V, High or Low Pulse 200 ns PWM to SW Delay Time Rising V PWM = 0 to 5V 70 ns PWM to SW Delay Time Falling V PWM = 5 to 0V 70 ns Thermal Shutdown Temperature (5) T J Rising, Hysteresis = 20°C 160 C IN UVLO Rising Edge 5.5 7.5 V DRV Voltage V DRV V SP=10V 5.1 5.6 6.0 V PWM Threshold Voltage V PWM Rising 2.4 V V PWM Falling 1.3 V Notes: 6) Not production tested. 7) SW drives low for 1.5 μs every 300μs to charge the BS to SW capacitor.
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 4 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM TYPICAL PERFORMANCE CHARACTERISTICS Circuit of Figure 4, TA = +25C, unless otherwise noted.
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 5 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM TYPICAL PERFORMANCE CHARACTERISTICS VIN=24V, RLOAD=4Ω, L=10uH, FIN=0.5MHz, TA=25ºC, Unless otherwise noted.
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 6 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM PIN FUNCTIONS Pin # Name Description 1 PWM Driver Logic Input. Drive PWM with the signal that controls the MPQ8039 output. Drive PWM high to turn on the high-side switch; drive PWM low to turn on the low-side switch. 2 SP Power Supply Input. Connect SP to the positiv e side of the input power supply. Bypass SP to GND as close to the IC as possible. 3 SW Switched Output. SW is the power output of t he MPQ8039. Connect the output LC filter to SW. SW is valid approximately 100μs after SP goes high. 4 GND Ground. (Note: Connect the exposed pad on the bottom side to Pin 4). 5 BS Bootstrap Supply. BS powers the high-si de gate of the MPQ8039. Connect a 0.1 μF or greater capacitor between BS and SW. 6 SHDN Shutdown Input. SHDN enables/disables the MP Q8039. Drive SHDN low to turn on the MPQ8039, drive it high to turn it off. If not used, connect SHDN to GND.
7 DRV
Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from SP. DRV powers the internal circuitry and in ternal MOSFET gate drives. Bypass DRV to GND with a 0.1μF to 10μF capacitor.
8 N/C
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 7 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM OPERATION The MPQ8039 is a general purpose, power driver. It takes a logic input and drives a half bridge comprised of 0.1 Ω high-side and low-side N-Channel MOSFET switches. It operates at frequencies up to 1.2MHz, can accept a DC supply voltage as high as 25V, and produce peak output current as high as 9A. Figure 1: Function Block Diagram SW Output The SW output drives the load. It is controlled by the logic input signal at PWM. When the signal at PWM is high (above 2V), the high-side switch is turned on. When the signal at PWM is low (less than 0.4V), the low-side switch is turned on. The MPQ8039 uses internal N-Channel MOSFETs for both the high-side and low-side switches. The high-side MOSFET gate drive is powered from the voltage between SW and BS, allowing BS to rise above the SP input voltage to power the high-side MOSFET. To do this a bootstrap capacitor is connected between SW and BS. When the low-side switch is on, the capacitor is internally charged from the voltage at DRV, which is also internally generated. There is a dead time region (typically 40ns) where both the upper and lower switches are off (see Figure 2). Both the high-side and low-side switches have internal current limits to prevent failure due to excessive load current. Once the current limit is reached, both output switches are turned off and the fault output is asserted (driven low). Shutdown The MPQ8039 includes a 2.5 μA shutdown mode. When SHDN is high, both output switches are turned off and the input current drops to 2.5 μA. When the MPQ8039 is shutdown, the internally generated voltage at DRV drops to 0V. If the shutdown mode is not used, connect SHDN directly to GND. HI DRIVE LO DRIVE CURRENT LIMIT & FEEDBACK BS UVLO THERMAL SHUTDOWN UVLO INTERNAL 5V REG. LOGIC 100kΩ DBS DRV PWM SHDN BS SP SW GND
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 8 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM Figure 2: Dead Time
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED MPQ8039 Rev.1.02 www.MonolithicPower.com 10 8/25/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM Figure 7: CCFL Driver Circuit MPQ8039 SPDRV BS SWSHDN PWM GND VSP ON/OFF MICRO CONTROLLER ADC1 ADC2 ADC3 I/O PWM I2C
MPQ8039 – HIGH CURRENT POWER HALF BRIGDE, AEC-Q100 QUALIFIED NOTICE: The information in this document is subject to change wi thout notice. Please contact M PS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights ar e not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ8039 Rev. 1.02 www.MonolithicPower.com 11 8/25/2016 MPS Proprietary Information. Patent Protect ed. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TM
PACKAGE INFORMATION
SOIC8N (EXPOSED PAD) SEE DETAIL "A" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) BSC 0.013(0.33) 0.020(0.51) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) TOP VIEW FRONT VIEW SIDE VIEW BOTTOM VIEW 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) RECOMMENDED LAND PATTERN 0.213(5.40) 0.063(1.60) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00)PIN 1 ID 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 0.016(0.41) 0.050(1.27)0o-8o DETAIL "A" 0.010(0.25) 0.020(0.50) x 45o 0.010(0.25) BSC GAUGE PLANE