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Programmable-Delay Supervisory Circuit AEC-Q100 Qualified MPQ6400 Rev. 1.0 www.MonolithicPower.com 1 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MPQ6400 family is the microprocessor (µP) supervisory circuit which can monitor and provide reset function for system voltages from 0.4V. When either the SENSE voltage falls below its threshold (V IT) or the voltage of manual reset ( MR ) is pulled to a logic low, the RESET signal will be asserted. The reset voltage can be factory-set for standard voltage rails from 0.9V to 5V, while the MPQ6400DG- 01 reset voltage is adjustable with an external resistor divider. When SENSE voltage and MR exceed their thresholds, RESETis driven to a logic high after a user-programmable delay time. The MPQ6400 has a very low quiescent current of 1.6μA typically, which makes it ideal suitable for battery-powered applications. It provides a precision reference to achieve ±1% threshold accuracy. The reset delay time can be selected by a capacitor which is connected between C DELAY and GND, allowing the user to select any delay time from 2.1ms to 10s. 380ms delay time is selected by connecting the C DELAY pin to V CC, while 24ms delay time by leaving the C DELAY pin float. MPQ6400 is available in 2mm×2mm 6-pin QFN package.
FEATURES
Guaranteed Industrial/Automotive Temp Range Limits Fixed Threshold Voltages for Standard Voltage Rails From 0.9V to 5V and Adjustable Voltage From 0.4V are Available Low Quiescent Current: 1.6 μA Typ Power-On Reset Generator with Adjustable Delay Time: 2.1ms to 10s High Threshold Accuracy: ±1% Typ Manual Reset ( MR ) Input Open-Drain RESET Output Immune to Short Negative SENSE Voltage Guaranteed Reset Valid to V CC=0.8V 2×2mm QFN
APPLICATIONS
DSP or Micro controller Applications Laptop/Desktop Computers PDAs/Hand-Held Products Portable/Battery-Powered Products FPGA/ASIC Applications For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION
MPQ6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT MPQ6400 Rev. 1.0 www.MonolithicPower.com 2 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TM VCC R1 VCC SENSE MR GND CDELAY CDELAY GND RESETRESETR2 Microprocessor DSP MicrocontrollerMPQ6400 C1 C2
MPQ6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT MPQ6400 Rev. 1.0 www.MonolithicPower.com 3 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TM
ORDERING INFORMATION
Part Number* Package TJ MPQ6400DG-33** QFN6 (2x2mm) -40C to +125C MPQ6400DG-33-AEC1 QFN6 (2x2mm) -40C to +125C *For Tape & Reel, add suffix –Z (e.g. MPQ6400DG–XX-Z); For RoHS compliant packaging, add suffix –LF (e.g. MPQ6400DG–XX-LF–Z). ** Check factory for availability in other options. PACKAGE REFERENCE TOP VIEW VCC SENSE CDELAY RESET GND MR QFN6 (2 x 2mm) ABSOLUTE MAXIMUM RATINGS (1) Continuous Power Dissipation (TA = +25°C) (2) Recommended Operating Conditions (3) Thermal Resistance (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J(MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)- TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board.
MPQ6400 – LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT MPQ6400 Rev. 1.0 www.MonolithicPower.com 4 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
1.8V≤VCC≤5.5V, R3 = 100kΩ, C3 = 47pF, TJ= -40°C to +125°C, Typical values are at Tj=+25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Input Supply Range V CC 1.8 5.5 V Supply Current (current into VCC pin) ICC VCC = 3.3V, RESET not asserted. MR , RESET, CDELAY open 1.6 5 µA VCC = 5.5V, RESET not asserted. MR , RESET, CDELAY open 1.85 15 µA Low-level Output Voltage V OL 1.3V ≤ VCC < 1.8V, IOL = 0.4mA 0.3 V 1.8V ≤ VCC ≤ 5.5V, IOL = 1.0mA 0.4 V Power-up Reset Voltage(5) VOL (max) = 0.2V, RESET I 15uA Trise(Vcc)≥15µs/V 0.8 V Negative-going Input Threshold Accuracy (7) VIT Hysteresis on VIT Pin V HYS 1.5 4 V IT% MR Internal Pull-up Resistance MR R 50 110 k Ω Input Current at SENSE Pin I SENSE Fixed versions VSENSE = 6V 2.4 µA RESET Leakage Current RESET V = 5.5V, RESET not asserted 500 nA MR Logic Low Input VIL 0.25V CC V MR Logic High Input VIH 0.7V CC V SENSE Maximum Transient Duration t w VIH = 1.05 VIT, VIL = 0.95 VIT 17.5 µs RESET Delay Time td CDELAY = Open 15 24 34 ms CDELAY = VCC (6) 230 380 530 ms CDELAY = 150pF 1.3 2.1 3 ms CDELAY = 10nF(6) 61 102 142 ms MR to RESET Propagation Delay tpHL1 VIH = 0.7 VCC, VIL = 0.25 VCC 160 ns High to Low Level RESET Delay, SENSE to RESET tpHL2 VIH = 1.05 VIT, VIL = 0.95 VIT 17.5 µs Note: 5) The lowest supply voltage (V CC) at which RESET becomes active. 6) Guaranteed by design. 7) VSENSE Falling Slowly
MPQ6400 -- LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT MPQ6400 Rev. 1.0 www.MonolithicPower.com 5 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TM Product Package Top Mark Nominal Supply Voltage Threshold Voltage (VIT) MPQ6400DG-33 QFN 3.3V 3.07V PIN FUNCTIONS QFN Pin # Name Description 1 V CC Supply voltage. A 0.1uF decoupling ceramic capacitor should be put close to this pin. 2 SENSE SENSE pin is connected to the monitored sy stem voltage. When the monitored voltage is below desired threshold, RESET is asserted.
3 C DELAY
Programmable reset delay time pin. When C DELAY connected to V CC through a resistor between 50kΩ and 200kΩ, a 380ms delay time is selected. When C DELAY floated, the delay time is 24ms. A capacitor bigger than 150pF connected CDELAY to GND could be used to get the user’s programmable time from 2.1ms to 10s. 4 MR The manual reset ( MR) can introduce another logic signal to control the RESET. It is internally connected to VCC through a 90kΩ resistor. 5 GND Ground.
6 RESET
RESET is an open drain signal which will be asserted when the SENSE voltage drops below a preset threshold or when the manual reset ( MR) pin drops to a logic low. The RESET delay time is programmable from 2.1ms to 10s by using external capacitors. A pull-up resistor bigger than 10k should be connected this pin to supply line, and the RESET outputting a higher voltage than VCC is allowable. DETAIL DESCRIPTION The MPQ6400 product family asserts a RESET signal when either the SENSE pin voltage is lower than VIT or the manual reset ( MR) is driven low. The MPQ6400-XX family, other than the MPQ6400DG-01, can monitor a fixed voltage from 0.9V to 5.0V. The MPQ6400DG-01 can monitor any voltage above 0.4V by adjusting the external resistor divider. After both the manual reset ( MR) and SENSE voltages exceed their thresholds, the RESET output remains asserted for a user’s programmable delay time. Two fixed RESET delay times are user-selectable: 380ms delay time by connecting the CDELAY pin to VCC, and 24ms delay time by leaving the C DELAY pin float. Any delay time from 2.1ms to 10s could be gotten by connecting a capacitor between C DELAY and GND. The wide monitor voltage and programmable reset delay time make MPQ6400 product family suitable for a broad array of applications.
MPQ6400 – LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT MPQ6400 Rev. 1.0 www.MonolithicPower.com 6 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VCC=3.3V, R3 = 100kΩ, C3 = 47pF, TA= -40°C to +125°C, Typical values are at TA=+25°C, unless otherwise noted. Normalized VIT vs. Temperature Reset Delay vs.Temperature (CDELAY=150pF Cap) Reset Delay vs.Temperature (CDELAY=VCC) RESET DELAY(ms) RESET DELAY(ms) Reset Delay Time vs. CDELAYSupply Current vs. VCC VCC(V) 0.001 0.01 0.1 100 0.0001 0.001 0.01 0.1 1 10 RESET DELAY TIME(s) Maximum SENSE Trans ient Duration vs.SENSE Threshold Overdrive Voltage Reset Delay vs.Temperature (CDELAY=open) RESET DELAY(ms) 100 01 02 03 04 05 06 0 -40 -20 0 20 40 60 80 100 120140 VCC=3.3V VCC=1.8V VCC=6V 340 360 380 400 420 440 460 480 500 -40 -20 0 20 40 60 80 100 120 140 VCC=3.3V VCC=1.8V VCC=6V 1.2 1.4 1.6 1.8 2.2 2.4 2.6 2.8 -40 -20 0 20 40 60 80 100 120140 VCC=6V VCC=1.8V VCC=3.3V IRESET vs. Low Level Reset Voltage VHYS vs. Temperature -40 -20 0 20 40 60 80 100 120 140 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 -40 -20 0 20 40 60 80 100 120140 VCC=1.8V VCC=6V VCC=3.3V 0.5 1.5 2.5 3.5 VCC=1.8V VCC=6V VCC=3.3V 0 0.2 0.4 0.6 0.8 1 LOW LEVEL RESET VOLTAGE(V) IRESET(mA) VCC=6V VCC=3.3V VCC=1.8V
MPQ6400 – LOW QUIESCENT CURRENT PROGRAMMABLE-DELAY SUPERVISORY CIRCUIT NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ6400 Rev. 1.0 www.MonolithicPower.com 10 12/5/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN6 (2 x 2mm) SIDE VIEW TOP VIEW 4 3 BOTTOM VIEW 1.90 2.10 0.65 0.85 1.90 2.10 1.25 1.45 0.65 BSC 0.20 0.30 0.80 1.00 0.00 0.05
0.20 REF
0.70 0.65 0.25 RECOMMENDED LAND PATTERN
1.90 NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VCCC. 5) DRAWING IS NOT TO SCALE. PIN 1 ID SEE DETAIL A 1.40 0.70 PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. DETAIL A 0.30 0.40 PIN 1 ID INDEX AREA