MPQ4253A

MPQ4253A MPS | Alldatasheet

Document overview

Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
PDF pages: 25

Technical content

36V, Step-Down Converter Supports One Type-A, One Type-C Dual USB Charging Ports for Automotive, AEC-Q100 Qualified MPQ4253A Rev. 1.0 www.MonolithicPower.com 1 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.

DESCRIPTION

The MPQ4253A integrates a monolithic , step- down, switch-mode converter with two USB current-limit switches and charging port identification circuit ry for each port . The MPQ4253A achieves 6A of output current, with excellent load and line regulation over a wide input supply range. The USB outputs are fixed as one Type-A port and one Type -C port. Each USB switch is current-limited. The USB1 port supports USB Type-C 5V @ 3A DFP mode. The USB2 port supports DCP schemes for battery charging specification (BC1.2), Apple divider 3 mode, and 1.2V/1.2V mode, eliminating the need for outside user interaction. The MPQ4253A buck and USB2 output is always on if EN is high. The USB1 port capability automatically changes to 1.5A when USB2 detects a device is plugged in. The step -down converter uses peak current mode control to regulate the output voltage. Under light-load conditions, it enters PFM mode to get high light-load efficiency. Full protection features include hiccup current limiting, output over-voltage protection ( OVP), and thermal shutdown. The device supports load-shedding mode for the USB1 port. When entering load-shedding, the Type-C advertised current capability changes to 1.5A. The MPQ4253A requires a minim al number of readily available, standard external components, and is available in a QFN -26 (5mmx5mm) package.

FEATURES

 All-In-One Type-C + Type-A Solution  Type-C Auto-Enters 1.5A Load Capability when the Type-A Port Detects a Device Is Plugged In  Default Frequency Spread Spectrum Based on 480kHz (FREQ = Float)  Auto-PFM/PWM Operation  Wide 6V to 36V Operating VIN Range  Selectable Output Voltage: 5.1V, 5.17V, or 5.3V  90mV Line Drop Compensation  Accurate USB1/USB2 Output Current Limit  18mΩ/15mΩ Low Internal RDS(ON) Buck Power MOSFETs  18mΩ/18mΩ Low Internal RDS(ON) USB1/USB2 Power MOSFETs  250kHz to 1MHz Adjustable Frequency  Hiccup Current Limit for Both Buck and USB  Supports DCP Schemes for BC1.2, Apple Divider 3 Mode, and 1.2V/1.2V Mode  Supports USB Type-C 5V @ 3A DFP Mode  Available in a QFN-26 (5mmx5mm) Package  Available in AEC-Q100 Grade 1

APPLICATIONS

 USB Dedicated Charging Ports (DCPs)  USB Type-C + Type-A Hybrid Charging Ports All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries.

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 2 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL APPLICATION (1) MPQ4253A PGND EN IN AGND SW USB1 OUT VIN = 12V 4.7µH VCC 220nF BST C4 220nF DM1 DP1 USB2 DM2 USB1, 3AFREQ C2A 10µF x 3 4.7µF 4.7µF + C1 100µF C1A 10µF x 4 CC1 CC2 DP2 ISENS+ ISENS- OUT_SEL VOUT = 5.17V 270µF ESR < 50mΩ 75mΩ Type-C Type-A DM2 DP2 DM2 DP2 10nF R4 51Ω R3 51Ω USB2, 3AVIN 20kΩ 5.1V FREQ OUT_SEL Note: 1) R1 and D1 must be added to power VCC before the buck output builds up. 0.8 1.6 2.4 3.2 100 0 1 2 3 4 5 6 POWER LOSS (W) EFFICIENCY (% ) LOAD CURRENT (A) Efficiency vs. Power Loss vs. Load Current VOUT = 5.17V, fSW = 480kHz with frequency spread spectrum, L = 4.7µH, DCR = 7mΩ VIN=6V VIN=12V

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 3 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number* Package Top Marking MSL Rating MPQ4253AGU-AEC1 QFN-26 (5mmx5mm) See Below 1 * For Tape & Reel, add suffix –Z (e.g. MPQ4253AGU-AEC1–Z). TOP MARKING MPS: MPS prefix YY: Year code WW: Week code MP4253A: Part number LLLLLLL: Lot number PACKAGE REFERENCE TOP VIEW PGND 5 8 9 21 20 19 DP1 PGND AGND 116

25 OUT

OUT_SELSW SW BST FREQ EN VCC DP2 DM2 ISENS- ISENS+ USB1 2 OUT 3 IN 4 IN14

15 OUT

16 USB2

QFN-26 (5mmx5mm)

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 4 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description

1 CC1

Configuration channel. CC1 is used to detect connections and configure the interface across the USB1 Type-C cables and connectors. Once a connection is established, CC1 or CC2 is reassigned to provide power over the VCONN pin of the plug. 2 USB1 USB1 output. 3, 15, 25 OUT Buck output. OUT is the input for USB1 and USB2. 4, 14 IN Supply voltage. IN is the drain of the internal power device , and provides the power supply for the entire chip. The MPQ4253A operates from a 6V to 36V input voltage. A capacitor (CIN) prevents large voltage spikes at the input. Place C IN as close to the IC as possible. 5, 13 PGND Power ground. PGND is the reference ground of the regulated output voltage. PGND requires careful consideration during PCB layout. Connect PGND with copper traces and vias. 6 AGND Analog ground. Connect AGND to PGND. 7 VCC Internal 4.6V LDO regulator output. Decouple VCC with a 220nF capacitor. This pin requires an external power supply for initial power-up. 8, 9, 26 SW Switch output. Use a wide PCB trace to make the connection. 10 BST Bootstrap. A 0.22 µF capacitor is connected between SW and BS T to form a floating supply across the high-side switch driver. 11 OUT_SEL Buck output voltage set. Setting OUT_SEL to either a low, floating, or high connection can set three different output voltages (5.1V, 5.17V, and 5.3V, respectively).

12 FREQ

Switching frequency program input. Connect a resistor from FREQ to GND to set the switching frequency. Float FREQ to achieve 480kHz with frequency spread spectrum . Connect FREQ to ground to achieve a 250kHz internal frequency. 16 USB2 USB2 output.

17 ISENS+

Current-sense input positive terminal. ISENS+ and ISENS- are used for detecting the USB2 current through an external resistor. Once the USB2 current exceeds a certain level, the USB1 port’s CC pin pull-up resistance (RP) changes to 22kΩ to indicate that its source capability has changed to 1.5A.

18 ISENS-

Current-sense input negative terminal. ISENS+ and ISENS- are used for detecting the USB2 current through an external resistor. Once the USB2 current exceeds a certain level, the USB1 port’s CC pin pull-up resistance (RP) changes to 22kΩ to indicate that its source capability has changed to 1.5A. 19 DM2 D- data line to USB2 connector. This input/output is used for handshaking with portable devices. 20 DP2 D+ data line to USB2 connector. This input/output is used for handshaking with portable devices. 21 EN On/off control input enable pin. Apply a logic high voltage to EN to enable the IC; pull EN to logic low to disable the IC. This pin cannot be floated. 22 DP1 D+ data line to USB1 connector. This input/output is used for handshaking with portable devices. 23 DM1 D- data line to USB1 connector. This input/output is used for handshaking with portable devices.

24 CC2

Configuration channel. CC2 is used to detect connections and configure the interface across the USB1 Type-C cables and connectors. Once a connection is established, CC1 or CC2 is reassigned to provide power over the VCONN pin of the plug.

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 5 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) to VIN + 0.3V (43V for <10ns) Continuous power dissipation (TA = +25°C) (3) (7) ESD Rating (4) DP1/DP2/DM1/DM2/ Recommended Operating Conditions (6) Operating junction temp (TJ) -40°C to +125°C (7) Thermal Resistance θJA θJC QFN-26 (5mmx5mm) Notes: 1) Exceeding these ratings may damage the device. 2) For details o n EN’s ABS Max rating, see the Enable ( EN) Control section on page 14. 3) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction -to- ambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperatur e is calculated by P D (MAX) = (T J (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from perma nent damage. 4) HBM, per JEDEC specification JESD22 -A114. CDM, per JEDEC specification JESD22 -C101, AEC specification AEC - Q100-011. JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. 5) HBM with regard to GND. 6) The device is not guaranteed to function outside of its operating conditions. 7) Operating devices at junction temperatures greater than 125°C is possible. Contact MPS for details. 8) Measured on EVQ4253A-U-00A, 4-layer PCB, 50mmx50mm. 9) Measured on JESD51-7, 4-layer PCB. The value of θ JA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51 -7, and simulated on a specified JEDEC b oard. They do not represent the performance obtained in an actual application.

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 6 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VIN = 12V, VEN = 5V, CC1 to ground with a 5.1kΩ resistor, TJ = -40°C to +125 °C, typical value is tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Supply current (shutdown) IIN VEN = 0V, VCC = 0V 10 μA VIN supply current (quiescent) IQ1 CC1 = 5.1kΩ, buck VOUT = 5.4V, EN = high 540 1000 μA IQ2 CC floating, buck V OUT = 5.4V, EN = high 340 700 μA EN rising threshold VEN_RISING -3% 1.235 +3% V EN hysteresis VEN_HYS 230 mV Thermal shutdown (10) TTSD 165 C Thermal hysteresis (10) TTSD_HYS 20 C VCC enable threshold VCC_EN 2.3 3 V VCC internal regulator VCC 4.3 4.6 4.9 V VCC load regulation VCC_LOG ICC = 50mA 1 3 % Step-Down Converter VIN under-voltage lockout rising threshold VIN_UVLO 4.6 5.0 5.4 V VIN under-voltage lockout threshold hysteresis VUVLO_HYS 700 mV HS switch on resistance RDSON_HS 18 40 mΩ LS switch on resistance RDSON_LS 15 30 mΩ Output voltage VOUT OUT_SEL = low -2% 5.10 +2% V OUT_SEL = float, TJ = 25°C -1% 5.17 +1% OUT_SEL = float, OUT_SEL = high -2% 5.30 +2% Output OVP VOVP_R 5.45 5.9 6.25 V Output OVP recovery VOVP_F 5.3 5.7 6.1 V Low-side current limit ILS_LIMIT -2 A Switch leakage SWLKG VEN = 0V, VSW = 36V, TJ = 25°C 1 μA VEN = 0V, VSW = 36V, TJ = -40°C to +125°C 5 High-side current limit ILIMIT VOUT = 0V 8 12 16 A Oscillator frequency fSW1 Pull RFREQ to GND 185 250 315 kHz fSW2 RFREQ = 66.5kΩ 250 350 450 Frequency spread spectrum span fSS RFREQ = float, based on 480kHz ±10 % Maximum duty cycle DMAX FREQ = 480kHz 91 95 99 % Minimum off time tOFF_MIN 110 ns Minimum on time (10) tON_MIN 130 ns Soft-start time tSS Output from 10% to 90% 0.5 1 1.7 ms

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 7 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, VEN = 5V, CC1 to ground with 5.1kΩ resistor, TJ = -40°C to +125°C, typical value is tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units USB Switch (USB1 and USB2) Under-voltage lockout rising threshold VUSB_UVR 3.7 4 4.3 V Under-voltage lockout threshold hysteresis VUSB_UVHYS 200 mV Switch on resistance RDSON_SW 18 35 mΩ USB OVP clamp VUSB_OV 5.5 5.8 6 V Current limit ILIMIT1 VOUT drops 10%, Type -C mode A ILIMIT2 VOUT drops 10%, Type-A mode Line drop compensation VDROP_COM IOUT = 2.4A, VOUT = 5.17V 40 90 140 mV VBUS1 soft-start time tSS1 Output from 10% to 90% 1 2 3 ms VBUS2 soft-start time tSS2 Output from 10% to 90% 0.5 1 1.5 ms Hiccup mode on time tHICP_ON2 OC, VOUT drops 10%, TJ = 25°C 3.5 5 6.5 ms OC, VOUT drops 10%, TJ = -40°C to +125°C 3 5 7 Hiccup mode off time tHICP_OFF VOUT connected to GND 1 2 3 s USB2 (Type-A Mode) ISENS rising threshold VISENS_R 3.75 7.5 11.25 mV ISENS falling threshold VISENS_F 1 mV ISENS falling voltage debounce timer tISENS_DEBOUNCE 2.4 3 3.6 s BC1.2 DCP Mode DP and DM short resistance RDP/DM_SHORT VDP = 0.8V, IDM = 1mA, TJ = 25°C 85 155 Ω VDP = 0.8V, IDM = 1mA, TJ = -40°C to +125°C 85 160 Divider Mode DP/DM output voltage VDP/DM_DIVIDER 2.55 2.7 2.85 V DP/DM output impedance RDP/DM_DIVIDER TJ = 25°C 14 22 30 kΩ TJ = -40°C to +125°C 14 22 34 1.2V/1.2V Mode DP/DM output voltage VDP/DM_1.2V VOUT = 5V, TJ = 25°C 1.12 1.2 1.28 V VOUT = 5V, TJ = -40°C to +125°C 1.1 1.2 1.3 DP/DM output impedance RDP/DM_1.2V TJ = 25°C 70 105 140 kΩ TJ = -40°C to +125°C 60 105 150

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 8 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, VEN = 5V, CC1 to ground with a 5.1kΩ resistor, TJ = -40°C to +125°C, typical value is tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units USB Type-C 5V @ 3A Mode – CC1, CC2 CC voltage to enable VCONN VRa 0.75 V CC voltage to enable VBUS VRd 0.9 2.45 V CC detach threshold VOPEN 2.75 V CC falling voltage debounce timer tCC_DEBOUNCE VBUS enable deglitch 100 144 200 ms CC rising voltage debounce timer tPD_DEBOUNCE VBUS disable deglitch 10 15 20 ms VCONN output power PVCONN VCONN comes from the buck output with some series resistance 100 mW Note: 10) Guaranteed by engineering sample characterization.

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 9 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, V OUT = 5.17V, fSS = spread spectrum based on 480kHz, L = 4.7µH, TA = 25°C, CC1 to ground with a 5.1kΩ resistor, unless otherwise noted. Thermal Image VIN = 12V, VOUT = 5.17V, TA = 21°C, USB1_IOUT = USB2_IOUT = 1.5A Thermal Image VIN = 12V, VOUT = 5.17V, TA = 21°C, USB1_IOUT = 1.5A, USB2_IOUT = 3A Thermal Image VIN = 12V, VOUT = 5.17V, TA = 21°C, USB1_IOUT = USB2_IOUT = 3A 100 0 1 2 3 4 5 6 EFFICIENCY (% ) LOAD CURRENT (A) Efficiency vs. Load Current VIN=6V VIN=12V 0 1 2 3 4 5 6 THERMAL RISE (℃) LOAD CURRENT (A) Case Temperature Rise vs. Load Current 100 120 0 0.5 1 1.5 2 2.5 3 LINE DROP COMPENSATION (mV) LOAD CURRENT (A) Line Drop Compensation vs. Load Current

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 10 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, V OUT = 5.17V, fSS = spread spectrum based on 480kHz, L = 4.7µH, TA = 25°C, CC1 to ground with a 5.1kΩ resistor, unless otherwise noted. Steady State USB1_IOUT = USB2_IOUT = 0A Steady State USB1_IOUT = USB2_IOUT = 3A CH1: USB1/AC CH2: USB2/AC CH3: SW CH4: IL CH1: USB1/AC CH2: USB2/AC CH3: SW CH4: IL Power Start-Up USB1_IOUT = USB2_IOUT = 0A Power Start-Up USB1_IOUT = USB2_IOUT = 3A CH1: USB1 CH2: USB2 CH3: VIN R1: USB1_IOUT CH4: USB2_IOUT CH1: USB1 CH2: USB2 CH3: VIN R1: USB1_IOUT CH4: USB2_IOUT Power Shutdown USB1_IOUT = USB2_IOUT = 0A Power Shutdown USB1_IOUT = USB2_IOUT = 3A CH1: USB1 CH2: USB2 CH3: VIN R1: USB1_IOUT CH4: USB2_IOUT CH1: USB1 CH2: USB2 CH3: VIN R1: USB1_IOUT CH4: USB2_IOUT

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 11 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, V OUT = 5.17V, fSS = spread spectrum based on 480kHz, L = 4.7µH, TA = 25°C, CC1 to ground with a 5.1kΩ resistor, unless otherwise noted. EN Start-Up EN pin disconnected from VCC, USB1_IOUT = USB2_IOUT = 0A EN Start-Up EN pin disconnected from VCC, USB1_IOUT = USB2_IOUT = 3A CH1: USB1 CH2: USB2 CH3: EN R1: USB1_IOUT CH4: USB2_IOUT CH1: USB1 CH2: USB2 CH3: EN R1: USB1_IOUT CH4: USB2_IOUT EN Shutdown EN pin disconnected from VCC, USB1_IOUT = USB2_IOUT = 0A EN Shutdown EN pin disconnected from VCC, USB1_IOUT = USB2_IOUT = 3A CH1: USB1 CH2: USB2 CH3: EN R1: USB1_IOUT CH4: USB2_IOUT CH1: USB1 CH2: USB2 CH3: EN R1: USB1_IOUT CH4: USB2_IOUT USB1 Short-to-GND Entry USB1_IOUT = USB2_IOUT = 0A USB2 Short-to-GND Entry USB1_IOUT = USB2_IOUT = 0A CH1: USB1 CH2: USB2 CH3: BUCK_VOUT CH4: USB1_IOUT CH1: USB1 CH2: USB2 CH3: BUCK_VOUT CH4: USB2_IOUT

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 12 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, V OUT = 5.17V, fSS = spread spectrum based on 480kHz, L = 4.7µH, TA = 25°C, CC1 to ground with a 5.1kΩ resistor, unless otherwise noted. Load-Shedding Entry USB1_IOUT = 3A, USB2_IOUT = 0A Load-Shedding Recovery USB1_IOUT = 3A, USB2_IOUT = 0A CH1: USB1 CH2: CC1 CH3: BUCK_VOUT CH4: USB1_IOUT CH1: USB1 CH2: CC1 CH3: BUCK_VOUT CH4: USB1_IOUT Type-C Enter 1.5A Load Capability Remove CC1-to-ground 5.1kΩ resistor, USB1 connected to mobile phone, USB2 plugs into another mobile phone Type-C Quit 1.5A Load Capability Remove CC1-to-ground 5.1kΩ resistor, USB1 connected to mobile phone, USB2 disconnects from another mobile phone CH1: USB1 CH2: USB2 CH3: CC1 CH4: USB1_IOUT CH1: USB1 CH2: USB2 CH3: CC1 CH4: USB1_IOUT Type-C Port Device Charging Test Remove CC1-to-ground 5.1kΩ resistor Type-A Port Device Charging Test CH1: USB1 CH2: DP1 CH3: DM1 CH4: USB1_IOUT CH1: USB2 CH2: DP2 CH3: DM2 CH4: USB2_IOUT

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 13 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. FUNCTIONAL BLOCK DIAGRAM Σ Bootstrap Regulator HS Driver LS Driver VCCControl Logic OscillatorVCC Regulator Reference Line Drop Compensation IN EN VCC OUT AGND BST Current-Sense Amplifier Current Limit Comparator PWM Comparator OVP Comparator Error Amplifier SW PGND Curent Sense Curent Sense Charge Pump Control Logic Thermal Sense UVLO Discharge USB1 USB2 Auto- Detect 2.7V 1.2V DP1 DM1 DP2 DM2 FREQ Current Limit SS CC1 CC2 ISENS+ VCONN from OUTVCC Type-C Control OUT_SEL RD1 RD2 FB ISENS- Control LogicEnable Circuit Figure 1: Functional Block Diagram

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 18 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ISENS+ and ISENS - exceeds 7.5mV, this means a Type-A device is attached. Then the USB1 port ’s CC pin pull -up resistance (R P) changes to 22kΩ to indicate that its source current capability is reduced to 1.5A. The MPQ4253A returns to normal mode (RP = 10kΩ) with 3 seconds when the MPQ4253A detects that there is no device plugged into the Type-A port. If the Type -C port or Type -A port works standalone, each port can provide 3A of current. Auto-Detection The MPQ4253A integrates a USB dedicated charging port (DCP) auto-detect function . The USB outputs are fixed with one Type-C port for USB1 and one Type -A port for USB2 . This function recognizes most mainstream portable devices and supports the following charging schemes:  USB Battery Charging Specification BC1.2/ Chinese Telecommunications Industry Standard YD/T 1591-2009  Apple divider 3 mode  1.2V/1.2V mode  USB Type-C 5V @ 3A DFP mode (only for USB1) The auto-detect function is a state machine that supports all of the DCP charging schemes listed above. USB Type-C Mode and VCONN For USB1 Type-C solutions, two pins (CC1 and CC2) on the connector are used to establish and manage the source-to-sink connection. The general concept for setting up a valid connection between a source and a sink is based on being able to detect terminations residing in the product being attached. To aid in defining the functional behavior of CC, a pull-up (RP) and pull- down (R D = 5.1kΩ) termination model is used based on a pull -up resistor and pull -down resistor (see Figure 11). RP RP RD RDRA RA CABLE CC Source monitors for connection Source monitors for connection Sink monitors for orientation Sink monitors for orientation Figure 11: Current Source/Pull-Down CC Model Initially, a source exposes independent RP terminations on its CC1 and CC2 pins, and a sink exposes independent RD terminations on its CC1 and CC2 pins. The source-to-sink combination of this circuit configuration represents a valid connection. To detect this, the source monitors CC1 and CC2 for a voltage below its unterminated voltage . The choice of RP is a function of the pull -up termination voltage and the source’s detection circuit. This indicates that either a sink, a powered cable, or a sink connected via a powered cable has been attached. Prior to the application of VCONN, a powered cable exposes RA (typically 1kΩ) on its VCONN pin. RA represents the load on VCONN plus any resistive elements to ground. In some cable plugs, this might be a pure resistance , and in others, it may simply be the load. The source must be able to differentiate between the presence of RD and RA to know whether there is a sink attached and where to apply VCONN. The source is not required to supply to VCONN unless RA is detected. Two special termination combinations on the CC pins (as seen by a source) are defined for directly attached accessory modes : RA/RA for audio adapter accessory mode , and RD/RD for debug accessory mode (see Figure 1 2 and Table 2).

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 19 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. VCONN VCONN RP RP Connection and Marked Cable Detection, Cold-Socket &VCONN Control VBUS CC1 CC2 GND (CC1) (CC2) VBUS Source VCC Mux CNTL PD Figure 12: CC Pin Functional Block A port that behaves as a source has the following functional characteristics: 1. The source uses a MOSFET to enable or disable the power delivery across V BUS. Initially, the source is disabled. 2. The source supplies pull-up resistors (RP) on CC1 and CC2, and monitors both to detect a sink. The presence of an RD pull-down resistor on either CC1 or CC2 indicates that a sink is being attached. The value of RP indicates the initial USB Type-C current level supported by the host. The MPQ4253A default RP value is 10kΩ, which represents a 3A current level. 3. The source uses the CC pull -down characteristic to detect and determine which CC pin is intended to supply VCONN (when RA is discovered). 4. Once a sink is detected, the source enables VBUS and VCONN. 5. The source can dynamically adjust the value of RP to indicate a change in the available USB Type-C current to a sink. For example, at high temperature s or if USB2 detects a device is attached, the MPQ4253A changes RP to 22kΩ to indicate a 1.5A current ability. 6. The source monitors the continued presence of RD to detect whether a sink is detached. When a detach event is detected, the source is removed, and VBUS and VCONN return to step 2. Load Shedding vs. Temperature The MPQ4253A monitors the die temperature , and dynamically changes the USB1 output current capability. If the die temperature exceeds 125°C, the output voltage remains unchanged, but the USB1 port’s CC pin pull-up resistance (RP) changes to 22kΩ to indicate that its source capability has changed to 1.5A. If the die temperature is below 100°C for 16 seconds, the USB1 Type-C current capability changes back to 3A ( RP = 10kΩ). The current- limit threshold remains at 3. 55A during this period. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 165°C, the USB switch shuts down . When the temperature falls below its lower threshold (typically 145°C), the chip resumes normal operation. Table 2: CC Logic Truth Table EN CC of USB1 USB2 Port Status Buck VCONN (USB1) USB1 USB2

0 X X Disabled Disabled Disabled Disabled

Enabled Disabled Disabled Enabled Debug Enabled Disabled Disabled Enabled RD, RA Enabled Enabled Enabled (11) Enabled Open Enabled Disabled Disabled Enabled Audio Unattached Enabled Disabled Disabled Enabled Debug Enabled Disabled Disabled Enabled RD, RA Enabled Enabled Enabled Enabled Open Enabled Disabled Disabled Enabled Note: 11) RP changes to 22kΩ to indicate that its source capability has changed to 1.5A. VCC

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 20 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.

APPLICATION INFORMATION

For most applications, use an inductor with a DC current rating at least 25% greater than the maximum load current. Select an inductor with a small DC resistance for optimum efficiency. For most designs , the induct ance value can be calculated with Equation (2): OUT IN OUT IN L OSC V (V V )L V I f Where ∆IL is the inductor ripple current. Choose the inductor ripple current to be approximately 30% to 50% of the maximum load current. The maximum inductor peak current can be calculated with Equation (3): III L LOAD)MAX(L  (3) Selecting Buck Input Capacitor The step -down converter has a discontinuous input current, and requires a capacitor to supply AC current while maintaining the DC input voltage. Use low -ESR capacitors for optim al performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. 100µF electrolytic and 40µF ceramic capacitors are recommended in automotive application s at a 480kHz switching frequency. Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated with Equation (4):   IN OUT IN OUTLOAD1C V V1V VII (4) The worst-case condition occurs at V IN = 2VOUT, calculated with Equation (5): II LOAD 1C  (5) For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum, or ceramic. When using an electrolytic capacitor, place two additional high-quality ceramic capacitors as close to IN as possible. Estimate the input voltage ripple caused by the capacitance with Equation (6): LOAD OUT OUT IN INSW IN I V VV1 f C1 V V Selecting Buck Output Capacitor The device requires an output capacitor (C2) to maintain the DC output voltage. Estimate the output voltage ripple with Equation (7): OUT OUT OUT ESR SW 1 IN SW VV 1V 1 R f L V 8 f C2 Where L1 is the inductance value, and RESR is the equivalent series resistance (ESR) value of the output capacitor. For an electrolytic capacitor, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be estimated with Equation (8): OUT OUT OUT ESR INSW 1 VVΔV 1 R f L V A 100μF to 270μF capacitor with an ESR below 50mΩ (e.g. polymer or tantalum capacitors) and three 10μF ceramic capacitors are recommended in application (see Table 3). Table 3: Recommended External Components fSW Inductor Input Capacitor Buck Output Capacitor 250kHz 8μH 40µF ceramic capacitor + 100µF E- capacitor 30µF ceramic capacitor + 270µF polymer capacitor 480kHz 4.7μH 40µF ceramic capacitor + 100µF E- capacitor 30µF ceramic cap + 270µF polymer capacitor ESD Protection for I/O Pins Higher ESD level s should be considered for all USB I/O pins. The MPQ4253A features high ESD protection up to ± 8kV human body model on DP 1/DP2, DM 1/DM2, USB1 , USB2, and ±6kV human body model on CC1, CC2. The

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 21 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ESD structures can withstand high ESD both in normal operation and when the device is powered off. To further extend the DP and DM pins’ ESD level for covering complicated application environments, additional resistors and capacitors can be added (see Figure 13). MPQ4253A CC2 Type-C CC Logic DCP 10Ω 22nF DM 22nF DP R2 10Ω CC1 Additional ESD D1 Additional ESD D2 1nF 1nF Figure 13: Recommended I/O Pins ESD Enhancing Similar R -C network s cannot be added on the CC1 and CC2 pins since the CC line must support a 200mA current and 300kHz signaling. Additional ESD diodes can be added on CC. PCB Layout Guidelines (12) Efficient PCB layout is critical for stable operation and thermal dissipation. For best results, refer to Figure 14 and follow the guidelines below: 1. Use short, direct, and wide traces to connect OUT. 2. Add vias under the IC. 3. Route the OUT trace on both PCB layers. 4. Place buck output ceramic capacitor s C2A and C2B on the left side , and C2C on the right side. 5. Use a large copper plane for PGND , SW, USB1, and USB2. 6. Add m ultiple vias to improve thermal dissipation. 7. Connect AGND to PGND. 8. Route the USB1 and USB2 trace on both PCB layers. 9. Place two ceramic input decoupling capacitors as close as possible to IN and PGND to improve EMI performance. 10. Place the symmetrical C IN capacitors on each side of the IC. 11. Place the BST capacitor close to BST and SW. 12. Place the VCC decoupling capacitor as close to VCC as possible. Top Layer Middle Layer 1 Vin BUCK_OUT USB1 USB2 GND MPQ4253A Place C2C at the right side C2A and C2B

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 22 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. Middle Layer 2 Bottom Layer Figure 14: Recommended Layout Note: 12) The recommended layout is based on the Typical Application Circuit (see Figure 15). Vin GND BUCK_OUT

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 23 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT MPQ4253A PGND EN IN AGND SW USB1 OUT VIN = 12V 4.7µH VCC BST C4 220nF DM1 DP1 USB2 DM2 USB1, 3AFREQ + C1 100µF C1B 10µF CC1 CC2 DP2 ISENS+ ISENS- OUT_SEL VOUT = 5.17V NS 4,14 6 5,13 3,15,25 8,9,26 C1C 10µF C1D 10µF 2.2µH C1A 10µF Optional Input Filter for Improving Conduction EMI 75mΩ Type-C Type-A DM2 DP2 DM2 DP2 10nF 51Ω 51Ω R3 USB2, 3A C1F 0.1µF C1G 0.1µF C1E 10µF 4.7µF 4.7µF C2B 10µF C2C 10µF C2A 10µF + C2 270µF ESR < 50mΩ 220nF VIN R1 20kΩ 5.1V VIN Figure 15: Type-C 5V/3A DFP Port plus Type-A 5V/3A Port Schematic (13) Note: 13) See Figure 13 for the I/O pins’ ESD protection enhancing details.

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 MPQ4253A Rev. 1.0 www.MonolithicPower.com 24 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved.

PACKAGE INFORMATION

QFN-26 (5mmx5mm) PACKAGE OUTLINE DRAWING FOR 26L FCQFN (5X5MM) -3 MF-PO-D-0284 revision 0.0 SIDE VIEW BOTTOM VIEW NOTE: 1) LAND PATTERNS OF PINS 2 TO 4 AND 14 TO 16 HAVE THE SAME LENGTH AND WIDTH. 2) LAND PATTERNS OF PIN 5 AND PIN 13 HAVE THE SAME LENGTH AND WIDTH. 3) ALL DIMENSIONS ARE IN MILLIMETERS. 4) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 5) REFERENCEIS MO-220. 6) DRAWING IS NOT TO SCALE. PIN 1 ID MARKING TOP VIEW PIN 1 ID INDEX AREA RECOMMENDED LAND PATTERN 0.25X45º PIN 1 ID

MPQ4253A – STEP-DOWN CONVERTER W/ TYPE-A/TYPE-C USB PORTS, AEC-Q100 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ4253A Rev. 1.0 www.MonolithicPower.com 25 4/8/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. CARRIER INFORMATION Part Number Package Description Quantity/Reel Quantity/Tube Reel Diameter Carrier Tape Width Carrier Tape Pitch MPQ4253AGU-AEC1–Z QFN-26 (5mmx5mm) 5000 N/A 13in 12mm 8mm

Summary

36V, Step-Down Converter Supports One Type-A, One Type-C Dual USB Charging Ports for Automotive, AEC-Q100 Qualified 4/8/2020 Rev. 1.0

Description