MPQ3425DL

MPQ3425 MPS | Alldatasheet

Document overview

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Technical content

3A, 55V Boost Converter with Programmable Switching Frequency, AEC-Q100 Qualified MPQ3425 Rev. 1.1 www.MonolithicPower.com 1 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

DESCRIPTION

The MPQ3425 is a current control mode, step-up converter with a 3.5A, 90mΩ internal MOSFET that provides fast transient response. It operates with an input voltage as low as 3.1V, and can generate up to 55V. The MPQ3425 features a configurable switching frequency of up to 2MHz for easy filtering and low noise. An external compensation pin allows the user to flexibly set loop dynamics and operates with small, l ow- ESR ceramic output capacitors. The s oft start feature provides a small inrush current and can be programmed with an external capacitor. Full protection features include u nder-voltage lockout (UVLO), current limiting , and thermal shutdown. The MPQ3425 is available in low-profile QFN- 14 ( 3mmx4mm) and QFN-14 (4mmx4mm) packages with an exposed pad. The QFN -14 (4mmx4mm) package is availabl e in a wettable flank package.

FEATURES

Wide 3.1V to 22V BIAS Supply Voltage Range
Wide 3V to 50V Input Voltage Range
3.5A, 90mΩ, Power MOSFET
Output Voltage up to 55V
Programmable 300kHz to 2MHz fSW
Programmable Under-Voltage Lockout (UVLO), Soft Start, UVLO Hysteresis
Micropower Shutdown <1μA
Thermal Shutdown OTP (160°C)
Available in QFN-14 (3mmx4mm) and QFN- 14 (4mmx4mm) Packages
QFN-14 (4mmx4mm) Package Is Available in a Wettable Flank Package
Available in AEC-Q100 Grade 1

APPLICATIONS

Automotive Systems
Boost Converter and Single-Ended Primary- Inductance Converter (SEPIC) Topologies
Pre-Boost Applications
Microphones and Tuner Bias All MPS parts are lead -free and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance . “MPS”, the MPS logo, and “Simple, Easy Solutions ” are registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries. TYPICAL APPLICATION MPQ3425 VDD SW 100k 43.2k EN FSET SS AGND PGND FB COMP BIAS 22V 35.7k 33nF 20k 5.6nF 22µF 22µF 0.1µF 15µH 169k 10k 5 4 VIN PGND PGND EP 9 1011 15 SW SW 1µF D1L1 VOUT

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 2 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number Package ** Top Marking MSL Rating MPQ3425DL* QFN-14 (3mmx4mm) See Below 1 MPQ3425DL-AEC1** QFN-14 (3mmx4mm) See Below 1 MPQ3425GRE-AEC1 QFN-14 (4mmx4mm) See Below 1 * For Tape & Reel, add suffix -Z (e.g. MPQ3425DL-LF-Z). ** For RoHS-compliant-packaging, add suffix -LF (e.g. MPQ3425DL-AEC1-LF-Z). TOP MARKING (MPQ3425DL) MPYW 3425 LLL MP: MPS prefix Y: Year code W: Week code 3425: Part number LLL: Lot number TOP MARKING (MPQ3425GRE) MP: MPS prefix Y: Year code W: Week code 3425: Part number LLL: Lot number

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 3 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PACKAGE REFERENCE TOP VIEW TOP VIEW EXPOSED PAD 1 14 8 7 TOP VIEW EN BIAS COMP SW SW SW VDD FSET FB SS AGND PGND PGND PGND EXPOSED PAD ON BACKSIDE CONNECTED TO GND EXPOSED PAD 1 14 8 7 EN BIAS COMP SW SW SW VDD FSET FB SS AGND PGND PGND PGND EXPOSED PAD ON BACKSIDE CONNECTED TO GND QFN-14 (3mmx4mm) QFN-14 (4mmx4mm)

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 4 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 COMP Compensation. Connect a capacitor and resistor in series from COMP to AGND for loop stability. 2 EN Regulator on/off control input . Pull EN high to turn the converter on; pull EN low to turn it off. When not in use, connect EN to the (external or internal) input source through a 100kΩ pull-up resistor for automatic start-up if VIN > 6V. EN can also be used to program VIN UVLO. Do not leave EN floating. 3 BIAS Internal LDO supply. BIAS must be bypassed locally. 4, 5, 6 SW Power switch output . SW is the drain of the intern al MOSFET switch. Connect the power inductor and output rectifier to SW. 7 VDD LDO output. 8, 9, 10, exposed pad PGND Power ground. The bottom exposed pad is the power ground. For best thermal resistance, solder the exposed pad to the underlying PCB. 11 AGND Analog ground. Connect AGND to the ground plane through the exposed pad. 12 SS Soft-start control. Connect a soft -start capacitor (CSS) to the SS pin. CSS is charged with a constant current of 5μA. Leave SS disconnected if soft start functionality is not needed. 13 FB Feedback input. The reference voltage is 1.25V. Connect a resistor divider to FB.

14 FSET

Frequency programming. Connect a resistor from FSET to AGND. The voltage on FSET is regul ated internally to 0.5V. The current flowing out of FSET sets the operation frequency linearly. ABSOLUTE MAXIMUM RATINGS (1) Continuous power dissipation (TA = 25°C) (2) ESD Ratings Recommended Operating Conditions (3) Operating junction temp (TJ) .... -40°C to +125°C Thermal Resistance θJA θJC Notes: 1) Absolute maximum ratings are rated under room temperature unless otherwise noted. Exceeding these r atings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction -to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipa tion at any ambient temperature is calculated by P D (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can produce an excessive die temperature, which may cause the regulator to go into thermal shutdown. Internal thermal shutd own circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions.

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 5 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VBIAS = VIN = VEN = 5V, T J = -40°C to +125°C, typical values are at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Operating supply voltage VBIAS 3.1 22 V Under-voltage lockout (UVLO) threshold VBIAS rising TJ = 25°C 2.8 3.1 V TJ = -40°C to +125°C 2.75 3.15 UVLO hysteresis 250 mV VDD voltage gate driver voltage supply VVDD C = 10nF 6 V Shutdown supply current IIN_SD VEN = 0V 1 μA Quiescent supply current IIN VFB = 1.35V TJ = 25°C 650 900 μA TJ = -40°C to +125°C 950 Switching frequency fSW FSET = 84.5kΩ 0.44 0.55 0.66 MHz Minimum off time tOFF VFB = 0V 40 ns Minimum on time (4) tON VFB = 1.35V 100 ns EN high threshold VEN rising (switching) EN high threshold VEN rising (micropower) 1.0 V EN low threshold TJ = 25°C 0.5 V TJ = -40°C to +125°C 0.45 EN input bias current VEN = 0V, 5V 0.1 1 μA UVLO hysteresis current into EN 1V < EN < 1.4V 4 μA Soft-start current ISS 6 μA FB input bias current -200 -100 nA Error amplifier (EA) voltage gain (4) AVEA 300 V/V EA transconductance (4) GEA 160 μA/V EA output current (4) 20 μA Current-sense gain (4) GCS ISW / VCOMP 9 A/V SW on resistance RDS(ON) 90 mΩ SW current limit ILIMIT Duty cycle = 0% TJ = 25°C 3.5 5 A TJ =-40°C to +125°C 3 Thermal shutdown (4) TSD 160 C Note: 4) Guaranteed by design. Not tested in production.

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 6 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS VIN = 12V, VOUT = 48V, COUT = 4.7μF, fSW = 300kHz, TA = 25°C, unless otherwise noted.

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 7 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. 0 20 40 60 80 100 CURRENT LIMIT (A) DUTY CYCLE (%) Current vs. Duty Cycle 25 45 65 85 105 125 145 VFSET (%) TEMPERATURE ( C) VFSET vs Temperature 10 100 1000 10000 EFFICIENCY (%) LOAD CURRENT (mA) Efficiency vs. Load Current VOUT = 15V, fSW = 400kHz VIN=3.3V VIN=5V VIN=8V VIN=11V 100 2 4 6 8 10 12 EFFICIENCY (%) INPUT VOLTAGE (V) Efficiency vs. Input Voltage VOUT = 15V fSW = 400kHz IOUT=0.32A IOUT=0.85A -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 10 100 1000 10000 LOAD REGULATION (%) LOAD CURRENT (mA) Load Regulation VOUT = 15V, fSW = 400kHz VIN=3.3V VIN=5V VIN=8V VIN=11V -2.0 -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 2.0 2 4 6 8 10 12 LINE REGULATION (%) INPUT VOLTAGE (V) Line Regulation VOUT = 15V, fSW = 400kHz IOUT=0.32A IOUT=0.85A

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 8 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. 10 100 1,000 10,000 EFFICIENCY (%) LOAD CURRENT (mA) Efficiency vs. Load Current VOUT = 10V, VIN = 5V 0.8MHz 0.4MHz -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 LOAD REGULATION (%) LOAD CURRENT (A) Load Regulation VIN = 5V, VOUT = 10V 0.8MHz 0.4MHz -180 -120 -60 120 180 -80 -60 -40 -20 100 1000 10000 100000 1000000 GAIN (dB) FREQUENCY (Hz) Bode Plot VIN = 10V, VOUT = 15V, IOUT = 0.5A, fSW = 0.4MHz Gain Phase Phase ( ) -180 -120 -60 120 180 -80 -60 -40 -20 100 1000 10000 100000 1000000 GAIN (dB) FREQUENCY (Hz) Bode Plot VIN = 5V, VOUT = 15V, IOUT = 0.5A, fSW = 0.4MHz Gain Phase Phase ( )

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 9 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. Steady State VIN = 5V, IOUT = 0.1A Steady State VIN = 5V, IOUT = 0.6A CH1: VIN CH2: VSW CH3: VOUT CH4: IL CH1: VIN CH2: VSW CH3: VOUT CH4: IL Steady State VIN = 12V, IOUT = 0.1A Steady State VIN = 12V, IOUT = 1.8A CH1: VIN CH2: VSW CH3: VOUT CH4: IL CH1: VIN CH2: VSW CH3: VOUT CH4: IL Steady State VIN = 5V, VOUT = 10V, IOUT = 0.2A Steady State VIN = 5V, VOUT = 10V, IOUT = 1A CH1: VIN CH2: VSW CH3: VOUT CH4: IL CH1: VIN CH2: VSW CH3: VOUT CH4: IL

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 10 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. Start-Up through VIN VIN = 5V, VOUT = 12V, IOUT = 0.5A Shutdown through VIN VIN = 5V, VOUT = 12V, IOUT = 0.5A CH1: VIN CH2: VSW CH3: VOUT CH4: IL CH1: VIN CH2: VSW CH3: VOUT CH4: IL Start-Up through VIN VIN = 5V, IOUT = 0.55A Shutdown through VIN VIN = 5V, IOUT = 0.55A CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT Start-Up through VIN VIN = 10V, IOUT = 1A Shutdown through VIN VIN = 10V, IOUT = 1A CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 11 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. Start-Up through EN VIN = 5V, VOUT = 12V, IOUT = 1A Shutdown through EN VIN = 5V, VOUT = 12V, IOUT = 1A CH1: VEN CH2: VSW CH3: VOUT CH4: IL CH1: VEN CH2: VSW CH3: VOUT CH4: IL Start-Up through EN VIN = 5V, IOUT = 0.5A Shutdown through EN VIN = 5V, IOUT = 0.5A CH1: VEN CH2: VSW CH3: VOUT CH4: IOUT CH1: VEN CH2: VSW CH3: VOUT CH4: IOUT Start-Up through EN VIN = 10V, IOUT = 1A Shutdown through EN VIN = 10V, IOUT = 1A CH1: VEN CH2: VSW CH3: VOUT CH4: IOUT CH1: VEN CH2: VSW CH3: VOUT CH4: IOUT

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 12 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT = 15V, L = 6.2μH, fSW = 400kHz, COUT = 22μF, TA = 25°C, unless otherwise noted. Ripple VIN = 5V, IOUT = 1A Ripple VIN = 10V, IOUT = 1A CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT Load Transient VIN = 5V, IOUT = 0.2A to 1A, IRAMP = 2.5A/µs Load Transient VIN = 10V, IOUT = 0.2A to 1A, IRAMP = 2.5A/µs CH1: VIN CH3: VOUT CH4: IOUT CH1: VIN CH3: VOUT CH4: IOUT Over-Current Protection VIN = 5V, IOUT = 0A to 3A Over-Current Protection Recovery VIN = 5V, IOUT = 3A to 0A CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT CH1: VIN CH2: VSW CH3: VOUT CH4: IOUT

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 13 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. FUNCTIONAL BLOCK DIAGRAM FB MPQ3425 GND BIAS PWM Control Logic Oscillator RSENSE Regulator Enable SW GM EN Driver Current-Sense Amplifier 1.225V SS 5µA FSET COMP Figure 1: Functional Block Diagram

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 14 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. OPERATION The MPQ3425 uses a constant-frequency, peak current control mode boost regulation architecture to regulate the feedback voltage (VFB). Figure 1 on page 13 shows operation details for the MPQ3425. At the beginning of each cycle, the N -channel MOSFET turns on, forcing the inductor current (IL) to rise. The current a t the source of the MOSFET is measured internally and converted to a voltage by the current -sense amplifier. The current-sense amplifier voltage is compared to the error voltage at COMP. The output voltage (VOUT) of the error amplifier (EA) is an amplified version of the difference between th e 1.2 25V reference voltage (VREF) and VFB. When VREF and VFB are equal, the PWM comparator turns off the MOSFET. IL flows to the output capacitor (COUT) through the external rectifier diode. This causes IL to decrease. The peak inductor current is controlled by the COMP voltage (VCOMP), which is controlled by VOUT. VOUT is regulated by IL to satisfy the load . Current mode regulation i mproves tra nsient response and control loop stability.

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 15 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

APPLICATION INFORMATION

Selecting the Switching Frequency The switching frequency (fSW) is set by R5 , and can be calculated with Equation (1): ( ) 0.86 SWf 23 R5 −= (1) Where R5 is in kΩ. Table 1 shows more frequency options. Table 1: Frequency Selection R5 (kΩ) Frequency (MHz) 180 0.26 160 0.29 150 0.31 143 0.32 66.5 0.62 35.7 1.06 25 1.44 18 1.91 16 2.12 14 2.37 UVLO Hysteresis The MPQ3425 features a programmable UVLO hysteresis (see Figure 2) . When VIN powers up, a 4µA current sink is applied to the resistor divider attached to EN. Therefore, VIN must increase by a set amount to overcome the current sink. This amount i s the current sink times the resistor from VIN to EN. Once EN reaches 1.5V , the current sink turn s off to create the reverse hysteresis for VIN falling. Figure 2: UVLO Hysteresis The UVLO hysteresis can be calculated with Equation (2): μ= TOPUVLO Hysteresis 4 A R (2) Selecting the Soft-Start Capacitor The MPQ3425 uses a soft-start (SS) timer that limits VCOMP during start-up to prevent excessive current at the input. This prevents premature termination of the source voltage at start-up due to an input current (IIN) overshoot. When power is applied to the MPQ3425 and the EN pin is asserted, a 5µA internal current source charges the external SS capacitor (CSS). As CSS is charged, the SS voltage (VSS) rises. When VSS reaches 250mV, the MPQ3425 begins switching at a quarter of the programmed fr equency. This is known as frequency foldback mode. At 800mV, fSW becomes the programmed value. Soft start ends when VSS reaches 2.5V. This limits IL at start -up, forcing IIN to rise slowly to the current required to regulate VOUT. The soft -start time (t SS) is determined with Equation (3): SS SS C 10 2.5Vt 6μA −= (3) Where CSS (nF) is the soft -start capacitor from SS to GND. Setting the Output Voltage VOUT is sensed through two sensing resistors in series (R2 and R3) . VFB is typically 1.225V. VOUT can be calculated with Equation (4): OUT REF Where R2 is the top feedback resistor, R3 is the bottom fe edback resistor , and VREF is the reference voltage (typically 1.225V). Select feedback resistors in the 10 kΩ range or higher for optimum efficiency. Selecting the Input Capacitor An input capacitor is required to supply AC ripple current to the inductor wh ile limiting noise at the input source. A low-ESR capacitor is required to keep noise minimal. Ceramic capacitors are recommended, but tantalum or low-ESR electrolytic capacitors are also sufficient. Use an input capacitor with a value greater than 4.7µF. The capacitor can be electrolytic, tantalum, or ceramic. However , since the MPQ3425

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 16 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. capacitor absorbs the input switching current , it requires an adequate ripple current rating. Use a capacitor with a n RMS current rating greater than the inductor ripple current . See the Selecting the Inductor section to determine the inductor ripple current. To ensure stable operation , place the input capacitor as close to the IC as possible. Alternately, a smaller , high-quality, 0.1µF ceramic capacitor may be p laced closer to the IC with the larger capacitor placed further away. If using this technique, the larger capacitor should be tantalum or electrolytic. All ceramic capacitors should be placed close to the MPQ3425. Selecting the Output Capacitor The output capacitor must maintain the DC output voltage. Low-ESR capacitors are recommended to keep the output voltage ripple low. The characteristic s of the output capacitor also affect the stability of the regulation contro l system. Ceramic, tantalum, or low -ESR electrolytic capacitors are recommended . With ceramic capacitors, the capacitance dominates the impedance at the switching frequency , so the output voltage ripple is independent of the ESR. The output voltage ripple (VRIPPLE) can be estimated with Equation (5): IN LOAD OUT RIPPLE OUT SW V(1 ) IVV Cf   (5) Where V IN and V OUT are the DC input and output voltages respectively, I LOAD is the load current, fSW is the switching frequency, and COUT is the capacitance of the output capacitor. With tantalum or low -ESR electrolytic capacitors, the ESR dominates the impedance at the switching frequency . Estimate the output voltage ripple (VRIPPLE) with Equation (6): IN LOAD OUT LOAD ESR OUT RIPPLE OUT SW IN V(1 ) IV I R VV C f V Where RESR is the equivalent series resistance of the output capacitor. Choose an output capacitor that satisfies the output ripple and load transient requirements of the design. A 4.7µF to 22µF ceramic capacitor is suitable for most applications. Selecting the Inductor A larger-value inductor results in less ripple current and a lower peak inductor current, reducing stress on the internal N -channel switch. However, a larger-value inductor also has a larger physical size, higher series resistance, and lower saturation current. Allow the peak -to-peak ripple current to be approximately 30 % to 50% of the maximum input current. Ensure that the peak inductor current is below 75% of the current limit at the operating duty cycle to prevent regulation loss caused by the current limit. The inductor must not saturate under the worst-case load transient and start -up conditions. Calculate the required inductance with Equation (7): IN OUT IN OUT SW V (V V )L V f I (7) Where ΔI is the peak -to-peak inductor ripple current, ΔI = (30% to 50%) x ILOAD_MAX. Calculate the max input current (I IN_MAX) with Equation (8): OUT LOAD_ MAX IN_ MAX IN VII V =  (8) Where ILOAD_MAX is the maximum load current, and ŋ is the efficiency. Selecting the Diode The output rectifier diode supplies current to the inductor when the internal MOSFET is off. Use a Schottky diode to reduce losses caused by the diode forwa rd voltage and recovery time . The diode should be treated for a reverse voltage equal to or greater than VOUT. The average current rating must be greater than the maximum load current, and the peak current rating must be greater than the peak inductor current. Compensation The output of the transconductance error amplifier (COMP) is used to compensate for the regulation control system. The system uses two poles (FP1 and FP2) and one zero (FZ1) to stabilize the control loop. FP1 is set by the

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 17 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. output capacitor (COUT) and the load resistance (RLOAD). FP2 is set by the compensation capacitor (CCOMP). F Z1 is set by the compensation resistor (RCOMP) and CCOMP. These poles are determined by Equation (9), Equation (10), and Equation (11), respectively: LOAD OUT 1F 2 Π RC=    (Hz) (9) EA VEA COMP GF 2 Π AC=    (Hz) (10) COMP COMP 1F 2 Π RC=    (Hz) (11) Where R LOAD is the load resistance, G EA is the error amplifier transconductance, and A VEA is the error amplifier voltage gain. The DC loop gain can be calculated with Equation (12): VEA IN LOAD FB CS VDC 2 OUT A V R V GA 0.5 V (V/V) (12) Where GCS is the compensation voltage to the inductor current gain, and the V FB is the feedback regulation threshold. There is also a right half-plane zero ( RHPZ) that exists in continuous conduction mode in step-up converters, where IL does not drop to zero in each cycle. The RHPZ frequency (fRHP) can be calculated with Equation (13): 2LOAD IN RHP OUT R Vf ( ) 2 L V=  (Hz) (13) Table 2 lists the recommended compensa tion components for different input voltages, output voltages, and capacitances of the most frequently used output ceramic capacitors. Ceramic capacitors have extremely low ESR values, so a second compensation capacitor from COMP to GND is not required. For a faster control loop and better transient response, set capacitor C7 to the recommended value in Table 2 . Then slowly increase the resistance of R6 and check the load step response on a bench to ensure that the ringing and overshoot on V OUT at the edge of the load steps is minimal. Finally, check the compensation by calculating the DC loop gain and the crossover frequency. The crossover frequency where the loop gain drops to 0dB (a gain of 1) can be obtained visually by placing a -20dB/decade slope at each pole, and a +20dB/decade slope at each zero. The crossover frequency should be at least one decade below fRHP at the maximum output load current to obtain a high enough phase margin for stability. Table 2: Component Selection VIN (V) VOUT (V) COUT (µF) RCOMP (kΩ) CCOMP (nF) Switching Frequency (kHz) Inductor (µH) 3 12 4.7 10 6.8 600 8.2 3 12 10 15 6.8 600 8.2 5 12 10 12 4.7 600 6.8 5 12 22 25 4.7 600 6.8 5 18 4.7 12 4.7 600 10 5 18 10 25 4.7 600 10 12 22 4.7 10 6.8 600 10 12 22 10 20 6.8 600 10 12 24 22 40 6.8 600 10 12 48 4.7 30 4.7 600 33

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 18 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PCB Layout Guidelines Efficient PCB layout is critical for stable operation and lo w noise. For best results, refer to Figure 3 and follow the guidelines below: 1. Place all components as close to the IC as possible. 2. Keep the path between L1, D1, and C OUT as short as possible to minimize noise and ringing. 3. Place CIN close to IN for the best decoupling results. 4. Keep all feedback components close to FB to prevent noise injections on the FB trace. 5. Tie the ground return of C IN and COUT close to GND. 1 2 2 1 2 1 2 1 + - CIN+ VINSENSE CIN- BIAS EN VINSGND VIN GND VOUT SW VOUTSENSE VOUTSGND Figure 3: Recommended PCB Layout

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 20 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) VIN 10µF 50V 15µH D13.5V to 36V, >6V Start-Up Output MPQ3425 COMP 1 EN2 BIAS SWVDD 7 PGND SS12 FBFSET14 150k 33nF 3.3nF 680pF 10k 100nF 100k EN GND 10k 3 5 6SW SW 1115108 9 EP PGND PGND AGND 22µF 104k 270pF NS GND GND GND GND GND GND GND GND GND GND GND 12V/1.5A 5.6V NPN C11 50V/3A 15µH GND GND 10µF C12 51K C10 10µF GND 1µF 50V 1µF 50V GND 1µF Figure 6: Typical Application for SEPIC Topology (BIAS with NPN Plus 5.6V Zener Diode) Table 3: VIN Supply Current for Different fSW fSW (MHz) VIN Supply Current (mA) 0.5 3 1 4 2 7

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 21 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) VIN 15µH D13.5V to 36V, >6V Start-Up Output MPQ3425 COMP 1 EN2 SWVDD 7 PGND SS12 FBFSET14 150k 33nF 3.3nF 680pF 10k 100nF 100K EN 1µF GND 10k 3 5 6SW SW 1115108 9 EP PGND PGND AGND 22µF 104k 270pF NS GND GND GND GND GND GND GND GND GND GND 12V/1.5AC13 50V/3A 15µH GND C10 GND 10µF C12 C11 10µF GND 1µF 50V 1µF 50V 2.2k BIAS GND GND CA 10µF 50V Figure 7: Typical Application for SEPIC Topology (Start-Up through BIAS and VOUT) (5)

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 22 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) VIN 10µF 50V 15µH D13.5V to 36V, >6V Start-Up C12 Output MPQ3425 COMP 1 EN2 SWVDD 7 PGND SS12 FBFSET14 150k 33nF 3.3nF 680pF 10k 100nF 100k EN 1µF GND 10k 3 5 6SW SW 1115108 9 EP PGND PGND AGND 22µF 04Ω 270pF NS GND GND GND GND GND GND GND GND GND GND GND 12V/1.5AC8 50V/3A 15µH GND C10 GND 10µF C9 C11 10µF GND 1µF 50V 1µF 50V MPQ2013 BIAS GND CA Figure 8: Typical Application for SEPIC Topology (Start-Up through LDO) (5)

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 23 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) VIN 10µF 50V 15µH D13.5V to 36V, >6V Start-Up Output MPQ3425 COMP 1 EN2 SWVDD 7 PGND SS12 FBFSET14 150k 33nF 3.3nF 680pF 10k 100nF 100k EN 1µF GND 10k 3 5 6SW SW 1115108 9 EP PGND PGND AGND 22µF 104k C12 270pF NS GND GND GND GND GND GND GND GND GND GND GND 12V/1.5AC7 50V/3A 15µH GND C10 GND 10µF C8 C11 10µF GND 1µF 50V 1µF 50V VBIAS BIAS 5V to 10V Figure 9: Typical Application for SEPIC Topology (Start-Up through BIAS) (5) Note: 5) See Table 3 on page 20 for the VIN Supply Current for Different fSW.

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 24 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

PACKAGE INFORMATION

QFN-14 (3mmx4mm) SIDE VIEW TOP VIEW 114 8 7 BOTTOM VIEW 2.90 3.10 1.65 1.75 3.90 4.10 3.25 3.35 0.50 BSC 0.20 0.30 0.80 1.00 0.00 0.05

0.20 REF

1.70 0.50 0.25 RECOMMENDED LAND PATTERN

2.90 NOTE:

1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5. 5) DRAWING IS NOT TO SCALE. PIN 1 ID SEE DETAIL A 3.30 0.70 PIN 1 ID OPTION B R0.20 TYP. PIN 1 ID OPTION A 0.30x45º TYP. DETAIL A 0.35 0.45 PIN 1 ID INDEX AREA

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 25 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. PACKAGE INFORMATION (continued) QFN-14 (4mmx4mm) Wettable Flank SIDE VIEW BOTTOM VIEW PIN 1 ID MARKING TOP VIEW PIN 1 ID INDEX AREA SECTION A-A NOTE: 1) THE LEAD SIDE IS WETTABLE. 2) ALL DIMENSIONS ARE IN MILLIMETERS. 3) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 4) LEAD COPLANARITY SHALL BE 0.08 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO -220. 6) DRAWING IS NOT TO SCALE. PIN 1 ID 0.30X45° TYP RECOMMENDED LAND PATTERN

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.1 www.MonolithicPower.com 26 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. CARRIER INFORMATION Pin1 1 1 1 1 ABCD ABCD ABCD ABCD Feed Direction Part Number Package (3mmx4mm) 5000 N/A N/A 13in 12mm 8mm MPQ3425GRE- AEC1-Z QFN-14 (4mmx4mm) 5000 N/A N/A 13in 12mm 8mm

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 MPQ3425 Rev. 1.0 www.MonolithicPower.com 27 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved.

REVISION HISTORY

Revision # Revision Date Description Pages Updated 1.0 05/24/2016 Initial Release - 1.01 6/6/2022 Updated the MSL Rating, and Top Marking, in the Ordering Information section 2 Updated the ESD Ratings section 3 Updated Package Information section 19 Formatting updates 14–16, 20 Updated footnote formatting All 1.1 7/6/2023

Added the QFN-14 (4mmx4mm) and wettable flank package information to the Description section
Updated the Features section: o Updated “Input Voltage Range” to “ BIAS Supply Voltage Range” o Added the “Wide 3V to 50V Input Voltage Range” bullet point o Added thermal shutdown threshold (160°C) o Added the QFN-14 (4mmx4mm) and wettable flank
Updated the Applications section: o Added the “ Boost Converter and Single -Ended Primary-Inductance Converter (SEPIC) Topologies ” bullet point o Added the “Pre-Boost Applications” bullet point
Updated the name of pin 3 to “BIAS” in the Typical Application schematic Added the new part number (MPQ3425GRE-AEC1) information and QFN-14 (4mmx4mm) package information to the Ordering Information section; added the Top Marking section for the new part number (MPQ3425GRE) Updated the name of pin 3 to “BIAS” in the QFN -14 (3mmx4mm) package reference; a dded the QFN -14 (4mmx4mm) package reference
Updated the name of pin 3 to “BIAS” in the Pin Functions section
Updated the SW range from “-0.5V to +22V” to “-0.5V to +55V” in the Absolute Maximum Ratings section
Updated the V OUT range from “ 3.1V to 22V” to “ 3.1V to 55V” in the Recommended Operating Conditions section
Updated the Thermal Resistance section: o Updated the first line to “QFN-14 (3mmx4mm)” o Added the QFN-14 (4mmx4mm) package information Updated the Electrical Characteristics conditions to “ VBIAS = VIN = V EN = 5V ”; updated the “Operating input voltage” parameter to “Operating supply voltage”; updated the “V IN” symbol to “V BIAS”; updated “V IN” to “V BIAS” in the U VLO threshold parameter conditions Updated VOUT condition to “48V” in the Typical Characteristics section 6 Updated Figure 1 13 Updated Figure 1 page reference 14

MPQ3425 – 3A, 55V BOOST CONVERTER WITH CONFIGURABLE fSW, AEC-Q100 Notice: The information in this document is subject to change without notice. Users should warrant and guarantee that third - party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ3425 Rev. 1.1 www.MonolithicPower.com 28 7/6/2023 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2023 MPS. All Rights Reserved. REVISION HISTORY (continued) Revision # Revision Date Description Pages Updated 1.1 7/6/2023 Updated the reference to Table 3; updated Table 2 17 Updated “MPQ3452” to “MPQ3425” in the headers 17–21 Updated Figure 4 and Figure 5 19 Added Table 3 20 Added Figures 6–9 20–23 Added the QFN-14 (4mmx4mm) package information to the Package Reference section 25–26 Added the new part number ( MPQ3425GRE-AEC1-Z) information to the Carrier Information section 27 Updated “22V” to “55V” in the headers All

Summary

3A, 55V Boost Converter with Programmable Switching Frequency, AEC-Q100 Qualified Rev. 1.1 7/6/2023

Description