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MPQ20051 Low Noise, High PSRR, 1A Linear Regulator AEC-Q100 Qualified MPQ20051 Rev.1.01 www.MonolithicPower.com 1 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MPQ20051 is a low-dropout linear regulator that supplies up to 1A current with a 140mV dropout voltage. The externally-adjustable output voltage has a range of 0.8V to 5V from an input voltage of 2.5V to 5.5V. An internal PMOS pass element allows for a low 130μA ground current, making the MPQ20051 suitable for battery-powered devices. Other features include low-power shutdown, and short- circuit and thermal protection. The MPQ20051 is available in 3mm x 3mm 8-pin QFN package.
FEATURES
Guaranteed Industrial/Automotive Temp Range Limits Up to 1A Output Current Low 140mV Dropout at 1A Low 130 μA Ground Current Output Voltage Available from 0.8V to 5V Low Noise: 13 μVRMS typical (10Hz to 100kHz) 63dB PSRR @1kHz Stable with Ceramic Capacitor Excellent Load/Line Transient Response Current Limiting and Thermal Protection Available in 3mm x 3mm 8-pin QFN Package Available in AEC-Q100 Qualified Grade 1
APPLICATIONS
Automotive/Industrial Power System Notebook Computers Cordless Telephones Cellular Phones Wireless Communication Equipments All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithi c Power Systems, Inc. TYPICAL APPLICATION VIN MPQ20051 4.7 F VOUTVIN EN FB GND 2. 2 F CIN VEN COUT OUT
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 2 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number Package Top Marking MPQ20051DQ-AEC1* QFN-8(3mmx3mm) See Below MPQ20051DQ** QFN-8(3mmx3mm) * For Tape & Reel, add suffix -Z (e.g. MPQ20051DQ-AEC1-Z) For RoHS compliant packaging, add suffix –LF (e.g. MPQ20051DQ-AEC1-LF-Z). ** For Tape & Reel, add suffix -Z (e.g. MPQ20051DQ-Z) For RoHS compliant packaging, add suffix –LF (e.g. MPQ20051DQ-LF-Z). TOP MARKING ABR: product code Y: year code LLL: lot number PACKAGE REFERENCE TOP VIEW OUT OUT FB GND IN IN NC EN EXPOSED PAD ON BACKSIDE CONNECT TO GND QFN8 (3 x 3mm)
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 3 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) ESD SUSCEPTIBILITY(3) Recommended Operating Conditions (4) Operating Junction Temp. (T J). -40°C to +125°C Thermal Resistance (5) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Devices are ESD sensitive. Handling precaution recommended. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB.
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 4 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN=VOUT+0.5V or VIN=2.5V, EN=VIN, TJ=-40ºC to +125ºC Typical values are at TJ=25°C, unless otherwise specified Parameter Condition Min Typ Max Units Input Voltage 2.5 5.5 V Input Under Voltage Lockout V IN rising 1.95 2.3 V Hysteresis of UVLO 160 mV FB Voltage V OUT=0.8V, IOUT=1mA TJ=25°C 0.784 0.8 0.816 V -40 ≤TJ ≤125°C 0.776 0.8 0.824 Output Voltage Accuracy IOUT=1mA, TJ=25°C -2 2 % IOUT=1mA, -40≤TJ≤125°C -3 3 Maximum Output Current Continuous, V IN≥2.5V, VOUT=2.5V 1 A Short-Circuit Current Limit V OUT=0, VIN≥2.5V 1.2 1.6 2.3 A In-Regulation Current Limit VOUT=2.5V, VOUT within 4% of normal output voltage VIN=5.5V 1.4 2.2 3.0 A Ground Current IOUT=0.1mA, VOUT=2.5V 130 200 μA IOUT=1A, VOUT=2.5V 400 700 Dropout Voltage(6) IOUT=1A, VOUT=2.5V 140 280 mV IOUT=750mA, VOUT=2.5V 105 210 IOUT=500mA, VOUT=2.5V 70 140 Line Regulation(7) VOUT=2.5V, VIN from VOUT+0.5V to 5.5V, IOUT=100mA, -0.15 0.15 %/V Load Regulation (8) I OUT from 100mA to 1A, VOUT=2.5V -0.5 0.5 % Output Voltage Noise (9) IOUT=100mA, f ranges from 10Hz to 100kHz VOUT=1.1V 13 μVRMS VOUT=3.3V 35 VOUT=5V 55 PSRR (9) VIN = 2.5V, VOUT = 1.1V, IOUT = 1A f=100Hz 65 dB f=1kHz 63 f=10kHz 63 f=1MHz 33 Shutdown Supply Current V IN=+5.5V TJ=25°C 0.1 0.3 μA -40 ≤TJ ≤125°C 30 EN Pin Current , Enabled V IN=VEN=+5.5V 0.1 0.3 μA Feedback Pin Current V IN=+5.5V, VFB=6V 0.1 0.3 μA Startup Time VOUT(NOM)=2.5V, COUT=4.7μF, VOUT=10% to 90%VOUT(NOM) 45 100 μs EN PIN Threshold EN Logic High 1.5 V EN Logic Low 0.4 Thermal Shutdown Temperature (9) Typical thermal hysteresis =20°C 150 °C Notes: 6) Dropout Voltage is defined as the input to output different ial when the output voltage drops 100mV below its nominal value. 7) Line Regulation= IN(MAX) IN(MIN)OUT V OUT V IN(MIN) OUT(NOM)IN MAX VV (% / V) VVV 8) Load Regulation= OUT(MAX) OUT(MIN)OUT I OUT I OUT NOM VV (%)V 9) Design guarantee, not production test.
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 5 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 6 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued)
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 7 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VOUT 500mV/div. VIN 1V/div. IOUT 1A/div. VOUT 500mV/div. VEN 1V/div. IOUT 1A/div. VOUT 1V/div. VIN 2V/div. IIN 2A/div. VOUT 10mV/div. VIN 2V/div. IOUT 1A/div. VOUT 10mV/div. IOUT 500mA/div. VOUT 1V/div. VIN 2V/div. IIN 2A/div. VOUT 500mV/div. VIN 1V/div. IOUT 1A/div. VOUT 500mV/div. VEN 1V/div. IOUT 1A/div. VOUT 500mV/div. VIN 1V/div.
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 8 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Pin Function 1, 2 VOUT Regulator output. Bypass with a standard 4.7 μF ceramic capacitor to GND. Connect all the pins together externally. 3 FB Feedback Input. Connect FB to the center poi nt of the external resistor divider. The feedback threshold voltage is 0.8V.
4 GND
Exposed pad Ground. Connect exposed pad to GND plane for optimal thermal performance. 5 EN Regulator Enable Control Input. Drive EN abov e 1.5V to turn on the MPQ20051. Drive EN below 0.4V to turn it off. Do not float the EN pin. 6 NC No Connection. Leave this NC pin open. 7, 8 VIN These pins must be externally connected for pr oper operation even if they are internally connected.
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 9 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. FUNCTIONAL BLOCK DIAGRAM UVLO Vreference EA VIN EN VOUT FBGND Figure 1—Functional Block Diagram
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 10 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. OPERATION The MPQ20051 is a low-dropout linear regulator that can supply up to 1A current, which makes it suitable for very low voltage, low quiescent, low noise, and high PSRR applications such as wireless LAN transceivers, notebook computers, smartphones, and other low-power electronics. The MPQ20051 uses an internal PMOS as the pass element and includes both thermal shutdown and an internal current-limiting circuit. Dropout Voltage Dropout voltage is the minimum input to output differential voltage required for the regulator to maintain an output voltage within 100mV of its nominal value. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage of MPQ20051 is only 140mV. Shutdown The MPQ20051 can be switched ON or OFF by a logic input at the EN pin: Logic high turns the regulator on and logic low turns it off. Tie the EN pin to VIN if the application does not require the shutdown feature. Do not float the EN pin. Current Limit The MPQ20051 includes a current limit structure that monitors and controls the PMOS gate voltage to limit the guaranteed maximum output current to 1.6A. Thermal Protection Thermal protection turns off the PMOS when the junction temperature exceeds 150°C, allowing the IC to cool. When the IC’s junction temperature drops by 20 °C, the PMOS will turn on again. Thermal protection limits total power dissipation in the MPQ20051. For reliable operation, limit the junction temperature to a maximum of 125°C. Load-Transient Considerations The output response of the load-transient consists of a transient response and DC shift— the MPQ20051’s excellent load regulation effectively limits the DC shift. The output voltage transient depends on the output capacitor’s value and ESR. Increasing the capacitance and decreasing the ESR will improve the transient response.
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED MPQ20051 Rev.1.01 www.MonolithicPower.com 11 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.
APPLICATION INFORMATION
Setting the Output Voltage The MPQ20051 has an externally-set output voltage with a range of 0.8V to 5V given a 2.5V to 5.5V input. Set the output voltage using a resistive voltage divider from the output voltage to the FB pin. The result of the voltage divider at the FB pin is: 2R1R 2RVV OUTFB Where VFB is the feedback threshold voltage (V FB = 0.8V), and V OUT is the output voltage. Thus the output voltage is: R2R18.0VOUT R2 can go as high as 100k Ω, but typical applications use 10k Ω. After selecting R2, R1 is determined by: FB FBOUT V VV2R1R For example, for a 1.1V output voltage, R2 is 10kΩ, and R1 is 3.75k Ω. You can select a standard 3.75kΩ (±1%) resistor for R1. Power Dissipation The power dissipation for any package depends on the thermal resistance of the case and circuit board, the temperature differential between the junction and ambient air, and the rate of air flow. The power dissipation across the device can be represented by the equation: The allowable power dissipation can be calculated using the following equation: JAAmbientJunction(MAX) TTP / Where (T Junction − T Ambient) is the temperature differential between the junction and the surrounding environment, θ JA is the thermal resistance from the junction to the ambient environment. Connecting the exposed GND pad to a large ground pad or plane helps to channel away heat. Output Capacitor Selection The MPQ20051 is specifically designed to work with a standard ceramic output capacitor to save space and improve performance. Use a 4.7µF ceramic capacitor for most applications. Larger output capacitors will improve load transient response and reduce noise at the cost of increased size. PCB Layout Guide PCB layout is very important to achieve good regulation, ripple rejection, transient response and thermal performance. It is highly recommended to duplicate EVB layout for optimum performance. If change is necessary, please follow these guidelines and take Figure 2 for reference. 1) Input and output bypass ceramic capacitors are suggested to be put close to the IN Pin and OUT Pin respectively. 2) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 3) Connect IN, OUT and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long- term reliability. Top Layer Bottom Layer Figure 2: PCB Layout GND IN OUT GND IN OUT
MPQ20051 – LOW NOISE HIGH PSRR 1A LINEAR REGULATOR, AEC-Q100 QUALIFIED NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ20051 Rev.1.01 www.MonolithicPower.com 13 10/10/2017 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN-8 (3mm×3mm) SIDE VIEW TOP VIEW 5 4 BOTTOM VIEW 2.90 3.10 1.45 1.752.90 3.10 2.25 2.55 0.65 BSC 0.20 0.30 0.80 1.00 0.00 0.05
0.20 REF
1.70 0.65 0.25 RECOMMENDED LAND PATTERN
2.90 NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VEEC-2. 5) DRAWING IS NOT TO SCALE. PIN 1 ID SEE DETAIL A 2.50 0.70 PIN 1 ID OPTION B R0.20 TYP. PIN 1 ID OPTION A 0.30x45º TYP. DETAIL A 0.30 0.50 PIN 1 ID INDEX AREA