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18V 6A Step-Down Power Module in 12x12x4mm QFN MPM3680 Rev. 1.02 www.MonolithicPower.com 1 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MPM3680 is an easy-to-use fully integrated 6A step-down DC/DC power module. It integrates the DC/DC converter, power inductor, input/output capacitors and the necessary resistors/capacitors in a compact QFN 12mmX12mmX4mm package. This total power solution needs as few as two external components (one resistor and one capacitor) to work. MPM3680 can deliver 6A output current over a wide input supply voltage range with excellent load and line regulation. The MPM3680 uses Constant-On-Time (COT) control to provide fast transient response and ease the loop stabilization. The default under voltage lockout threshold is internally set around 4.1V, but a resistor network on the enable pin can increase this threshold. The MPM3680 has an internal LDO to power the control circuits and the integrated power devices. This LDO can be disabled by an external 5V to boost the efficiency. The MPM3680 has an internal about 3ms soft start (SS) timer. It can be increased with an extra SS capacitor. An open drain power good signal indicates that the output voltage is within nominal voltage range. The MPM3680 has fully integrated protection features that include over-current protection, over-voltage protection and thermal shutdown.
FEATURES
Complete 6A DC-to-DC Solution Wide Input Voltage Range from 2.5V: -- 2.5V to 18V with External 5V Bias -- 4.5V to 18V with Internal Bias 1% Reference Voltage Over 0˚ C to 70˚C Junction Temperature Range Adaptive COT Control for Ultrafast Transient Response Programmable Switching Frequency from 200KHz to 1MHz Support Pre-Bias Start Up Programmable Soft-Start Time with Default 3ms Non-latch OCP, OVP and Thermal Shutdown Output Adjustable from 0.65V to 5V QFN-57 (12mm x 12mm x 4mm) package
APPLICATIONS
Telecom and Networking Systems Base Stations Servers Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Qualit y Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 2 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL APPLICATION
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 3 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking MPM3680GRE QFN-57 (12mmx12mmx4mm) See Below TOP MARKING MP3680: product code of MPM3680GRE; MPS: MPS prefix; YY: year code; WW: week code: LLL: lot number; M: module; PACKAGE REFERENCE TOP VIEW
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 4 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) Continuous Power Dissipation (TA=+25) (2) Recommended Operating Conditions (3) Thermal Resistance (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation will cause excessive die temperature. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. 5) Need to get some test data from 1st sample for calibration and evaluation for MSL Level 2.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 5 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 12V, VOUT = 1.2V, Rtrim =10kΩ, Ctrim =560pF, TJ = 25C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Input Voltage Range Input Voltage Range VIN 5V External VCC 2.5 18 V 4.5 18 V Output Voltage Output Voltage Range (6) V OUT RANGE 0.65 5 V Output Voltage Accuracy (Load Regulation) (6) VOUT_DC_Load COUT =5X47μF Ceramic, IOUT =0A to 6A ±0.5 %Vout Output Voltage Accuracy (Line Regulation) (6) VOUT_DC_Line COUT =5X47μF Ceramic, VIN =4.5V to 18V, IOUT =5A ±0.4 %Vout Quiescent Current Quiescent Current IIN V EN =2V, VFB=0.65V 700 860 1000 uA Current Limit Output Current Limit ILIM 12 15 19 A Switching Frequency (6) Switching Frequency fSW I OUT=5A 400 500 600 kHz Over-voltage and Under-voltage Protection OVP Non-latch Threshold (7) VOVP_NON- LATCH With negative current limit 117% 120% 123% V FB OVP Threshold (6) V OVP TH No negative current limit 127% 130% 133% V FB UVP Threshold (6) V UVP 47% 50% 53% V FB Reference And Soft Start Reference Voltage (8) VREF TJ = 0C to +70C 608 611 614 mV TJ = 0C to +120C 605 611 617 mV TJ = -40C to +125C 602 611 620 mV Soft Start Time tSS 2 2.8 3.6 ms Timer (6) Minimum ON Time TON MIN 20 30 40 ns Minimum OFF Time TOFF MIN 200 360 420 ns
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 6 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. VIN = 12V, VOUT = 1.2V, Rtrim =10kΩ, Ctrim =560pF, TJ = 25C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Power Good Power Good Rising Threshold (7) PG Vth-Hi 87% 91% 94% VFB Power Good Falling Threshold (7) PG Vth-Lo 80% VFB Power Good Low to High Delay (7) PG Td 2.5 ms Power Good Sink Current Capability (7) IOL V OL=600mV 12 mA Power Good Leakage Current (7) I PG LEAK VPG=3.3V 0.01 uA PG Low-Level Output Voltage VOL_100 VIN=0V, Pull PGood up to 3.3V through a 100KΩ resistor. 500 550 600 mV VOL_10 VIN=0V, Pull PGood up to 3.3V through a 10KΩ resistor. 600 650 700 mV Enable (7) Enable Input Low Voltage VIL EN 1.1 1.3 1.5 V Enable Hysteresis VEN-HYS 250 mV Enable Input Current IEN V EN = 2V 0 μA VCC Regulator (7) VCC Under Voltage Lockout Threshold Rising VCCVth 3.8 V VCC Under Voltage Lockout Threshold Hysteresis VCC HYS 500 mV VCC Regulator VCC 4.8 V VCC Load Regulation ICC=5mA 0.5 % Thermal Protection (6) Thermal Shutdown TSD 150 °C Thermal Shutdown Hysteresis 25 °C Notes: 6) Guaranteed by design 7) 100% tested for internal IC prior to module assembly 8) Guaranteed by production test and/or characteriza tion for internal IC prior to module assembly
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 7 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1, 2, 47, 50, 52 AGND Analog/Signal Ground. It needs to be connected to GND on PCB layout. 3 >DC_trim Output Voltage DC Trimming. Connect this pin to pin DC_trim> first, and then to the output voltage sense point through a resist or. The resistor value can be chosen based on equation 1. 4, 6, 20, 26, 27, 37 N/C Not connected. Keep these pins floating. 5 AC_trim Output Voltage AC Trimming. Connect these pins to the output through a capacitor. The capacitor value can be chosen based on equation 2. 7- 19, 53, 54 SW Switch Output. Keep them floating. 21-25, 55 VOUT Module voltage output node. 28- 36, 56 GND System Power Ground. Reference ground of the regulated output voltage. PCB layout requires extra care. Connect using wide PCB traces. 38-41, 57 VIN Supply Voltage. Supply power to the internal MOSFET and regulator. The MPM3680 operates from a +2.5V to +18V input rail with 5V external bias and from a +4.5V to +18V input rail with internal bias. It requires input decoupling capacitors. Connect using wide PCB traces and multiple vias. 42 >FREQ Frequency Set In. An internal 430K frequency set resistor is used if connecting this pin to Pin FREQ<. Keep this pin floating if values other than 300K are needed. 43 EN Enable. Digital input that turns the regula tor on or off. Drive EN high to turn on the regulator, drive it low to turn it off. Connect EN to IN through a pull-up resistor or a resistive voltage divider for automatic startup. Do not float this pin.
44 FREQ>
Frequency Set Out. An internal 430K frequency set resistor is used if connecting this pin to Pin FREQ>. If values other th an 430K are needed, connect the resistor between this pin and pin VIN.
45 DC_trim>
Output Voltage DC Trimming. Connect this pin to pin >DC_trim first, and then to the output voltage sense point through a resist or. The resistor value can be chosen based on equation 1. 46 SS Soft Start. Floating this pin has the de fault 3ms SS time. The SS time can be extended by connecting an external capacitor between SS and AGND pins. 48 PG Power Good. The output is an open drain signal. Require a pull-up resistor to a DC voltage to indicate high if the output voltage exceeds 91% of the nominal voltage. There is a 2.5ms delay from FB ≥ 91% to PG goes high. 49 VCC Internal 4.8V LDO Output. Power the driver and control circuits. Keep this pin floating. Applying a 5V external bias can disable the internal LDO to boost the efficiency. 51 BST Bootstrap. Keep this pin floating.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 8 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS VIN=12V, VOUT=1.2V, TA=25˚C, unless otherwise noted.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 9 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS (continued) VIN=12V, VOUT=1.2V, TA=25˚C, unless otherwise noted. Power Up Through Input Power Up Through Input Output Ripple Output Ripple Over Current Protection Recovery Over Current Protection OCP VOUT/AC 50mV/div. IOUT 2.5A/div. Load Transient Response VOUT 500mV/div. VEN 5V/div. VPG 5V/div. IOUT 10A/div. VOUT 500mV/div. VIN 5V/div. VPG 5V/div. IOUT 10A/div. VOUT 500mV/div. VIN 5V/div. VPG 5V/div. VOUT 500mV/div. VPG 2V/div. IOUT 5A/div. IOUT 10A/div. VOUT 500mV/div. VPG 2V/div. IOUT 10A/div. VOUT 500mV/div. VEN 5V/div. VPG 5V/div. IOUT 5A/div. Power Up Through EN Power Up Through EN VOUT/AC 20mV/div. VOUT/AC 20mV/div.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 10 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. BLOCK DIAGRAM
10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. external small capacitor to operate. table 1. The default switching frequency FREQUENCY SETTING” on Page 12. The MPM3680 utilizes constant-on-time control. smooth-out the output voltage during start-up. regulates the output voltage to the desired level. FET ON avoids shoot-through. FET turns on until the next period. fairly constant and is also called PWM mode.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 13 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Table 1 shows the switching frequency with different common output voltages: Vo (V) fs(KHz) 1 400 1.2 500 1.5 600 1.8 700 Table 1 If a switching frequency other than those listed in Table 1 is desired, an external frequency set resistor can be connected as shown in figure 5: Figure 5 The switching frequency can be estimated through equation (4) as follows: SW FREQ IN DELAY IN OUT 10F( k H z ) 6.1 R (k ) V( V ) T( n s )V( V ) 0 . 4 V ( V ) (4) Where T DELAY is the comparator delay of about 5ns. Typically, the MPM3680 is set to 200kHz to 1MHz applications. Thanks to its monolithic structure, the MPM3680 is optimized to operate at high switching frequencies at high efficiency. High switching frequencies allow for physically smaller LC filter components to reduce the PCB footprint. Configuring the EN Control The power module turns on when EN goes high; conversely it turns off when EN goes low. Do not float the pin. For automatic start-up, pull the EN pin up to input voltage through a resistive voltage divider. Choose the values of the pull-up resistor (R UP from the IN pin to the EN pin) and the pull-down resistor (R DOWN from the EN pin to GND) to determine the automatic start-up voltage: UP DOWN IN START DOWN (R R )V1 . 5 ( V ) R (5) For example, for R UP=100kΩ and R DOWN=51kΩ, the VIN-START is set at 4.44V. To reduce noise, add a 10nF ceramic capacitor from EN to GND. An internal zener diode on the EN pin clamps the EN pin voltage to prevent running away. The maximum pull up current (assuming the worst case 6V for the internal zener clamp) should be limited to 1mA or less. Therefore, when driving EN with an external logic signal, the driving voltage should be less than 6V. When connecting EN to IN through a pull-up resistor or a resistive voltage divider, select a resistance that ensures a maximum pull-up current of 1mA. If using a resistive voltage divider and V IN exceeds 6V, then the minimum resistance for the pull-up resistor RUP should meet: IN UP DOWN V6 V 6V 1m ARR (6) With only R UP (the pull-down resistor, R DOWN, is not connected), then the VCC UVLO threshold determines V IN-START, so the minimum resistor value is: IN UP V6 VR( ) 1m A (7) A typical pull-up resistor is 100kΩ. VCC Power Supply The MPM3680 has an internal VCC LDO to supply the power to the internal circuits and drives the power devices. This VCC LDO is derived from the input supply. To ensure proper operation, the minimum input voltage should be 4.5V. An external 5V VCC bias can disable the internal LDO. In this case, Vin can be as low as 2.5V. The efficiency can be higher with external 5V VCC bias. Figure 6 shows the comparison.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 14 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Figure 6 Soft Start The MPM3680 employs a soft start (SS) mechanism to ensure a smooth output during power-up. When the EN pin goes high, an internal current source (20 μA) charges the SS capacitor. The SS capacitor voltage takes over the REF voltage to the PWM comparator. The output voltage smoothly ramps up with the SS voltage. Once the SS voltage reaches the REF voltage, it continues ramping up while V REF takes over the PWM comparator. At this point, soft start finishes and the device enters steady state operation. An internal 100nF SS capacitor is used. So the default (with SS pin floating) SS time can be estimated as: REF SS SS 100(nF) V (V)T( m s ) I( u A ) (8) So the default SS time is about 3ms. If longer SS time is needed, an external SS capacitor can be added between SS pin and AGND pin. The external capacitor value can be determined as follows: SS SS SS REF T( m s )I( u A )C (nF) 100(nF)V( V ) (9) Pre-Bias Startup The MPM3680 has been designed for monotonic startup into pre-biased loads. If the output is pre- biased to a certain voltage during startup, the IC will disable switching for both high-side and low- side switches until the voltage on the soft-start capacitor exceeds the sensed output voltage at the FB pin. Power Good (PG) The MPM3680 has a power-good (PG) output. The PG pin is the open drain of a MOSFET. Connect it to VCC or some other voltage source that measures less than 5.5V through a pull-up resistor (typically 100kΩ). After applying the input voltage, the MOSFET turns on so that the PG pin is pulled to GND before the SS is ready. After the FB voltage reaches 91% of the REF voltage, the PG pin is pulled high after a 2.5ms delay. When the FB voltage drops to 80% of the REF voltage or exceeds 120% of the nominal REF voltage, the PG pin is pulled low. If the input supply fails to power the MPM3680, the PG pin is also pulled low even though this pin is tied to an external DC source through a pull-up resistor. Over-Current Protection (OCP) The MPM3680 features two current limit levels for over-current conditions: low-side valley current limit and low-side negative current limit. Low-Side Valley Current Limit : The device monitors the inductor current during the LS-FET ON state. If the LS-FET sourcing current is higher than the internal positive-valley-current limit, the HS-FET remains OFF and the LS-FET remains ON for the next ON time. When the LS- FET sourcing current drops below the valley current limit, then the LS-FET turns off and the HS-FET turns on again. The MPM3680 enters OCP non-latch protection mode if the LS-FET sourcing valley current keeps exceeding the valley current limit for a certain period of time. During OCP, the device tries to recover from the over-current fault with hiccup mode: the chip disables the output power stage, discharges the soft-start capacitor and then automatically retries soft-start. The device repeats this operation cycle as long as the over- current condition still exists. When the over- current condition disappears, the MPM3680 initiates a new SS to rise back to regulation level.
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 15 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Low-Side Negative Current Limit : If the sensed LS-FET negative current exceeds the negative current limit, the LS-FET turns off immediately and stays OFF for the remainder of the OFF period. In this situation, both MOSFETs are OFF until the end of a fixed interval. The HS-FET body diode conducts the inductor current for the fixed time. Over -Voltage Protection (OVP) The MPM3680 monitors the output voltage using the FB pin connected to the tap of a resistor divider to detect over-voltage. It provides non- latch OVP mode. If the FB voltage exceeds the nominal REF voltage but remains lower than 120% of the REF voltage (0.611V), both MOSFETs are off. If the FB voltage exceeds 120% of the REF voltage but remains below 130%, the LS-FET turns on while the HS-FET remains off. The LS- FET remains on until the FB voltage drops below 110% of the REF voltage or the low-side negative current limit is hit. If the FB voltage exceeds 130% of the REF voltage, it enters a non-latch mode. The LS-FET remains on until the FB voltage drops below 110% of the REF voltage, and the MPM3680 initiates a new SS to rise back to regulation level and operates normally again. UVLO protection The MPM3680 has under-voltage lock-out protection (UVLO). When the VCC voltage exceeds the UVLO rising threshold, the MPM3680 powers up. It shuts off when the VCC voltage falls below the UVLO falling threshold voltage. This is non-latch protection. The MPM3680 is disabled when the VCC voltage falls below 3.3 V. If an application requires a higher UVLO threshold, use the two external resistors connected to the EN pin as shown in Figure 9 to adjust the startup input voltage. For best results, use the enable resistors to set the input voltage falling threshold (V STOP) above 3.6 V. Set the rising threshold (V START) to provide enough hysteresis to account for any input supply variations. EN ComparatorRUP RDOWN IN EN Figure 7—Adjustable UVLO Threshold Thermal Shutdown The MPM3680 has thermal shutdown. The IC internally monitors the junction temperature. If the junction temperature exceeds the threshold value (minimum 150ºC), the converter shuts off. This is a non-latch protection. There is about 25ºC hysteresis. Once the junction temperature drops to about 125ºC, it initiates a soft startup.
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APPLICATION INFORMATION
Setting the Output Voltage-Small ESR Capacitors When the output capacitors are all ceramic capacitors or capacitors with small ESR, external RAMP is injected through the R/C network across the inductor. The circuit connection is as follows: Figure 8 Here is the procedure to find the values for Ctrim and Rtrim: a) Determine the Ton FREQ ON IN (10) b) Determine Ctrim. Choose a V RAMP around 10mV-30mV for most of the applications. ) ns ( T) V ( V ) K ( R ) V ( V ) V ( V) pF ( C ON RAMP OUTIN TRIM (11) c) Find the average feedback voltage VFB RAMP FB _ AVG REF d) Calculate Rtrim to get the desired output voltage: ) K ( )) V ( V ) V ( V( ) K ( R AVG _ FB OUT O TRIM O (14) Setting the Output Voltage-Large ESR Capacitors If one or more piece of the output capacitors have large ESR, then there is no need of external RAMP. Otherwise, it’ll generate group pulses at light load conditions. The Ctrim is still recommended to boost the phase margin of the system. A value between 100pF and 2.2nF is recommended. The circuit connection can be made as the following: MPM3680 300K 402 SW FB 402 10K
402 AGND
DC_trim>AC_trim VOUT >DC_trim RtrimCtrim L Cout Figure 9 The Rtrim can be determined as follows to obtain the desired output voltage: OUT REF TRIM REF VVR( K ) 1 0V (15) Input Capacitor The input current to the step-down power module is discontinuous, and therefore, it requires a capacitor to supply the AC current to the step- down power module while maintaining the DC input voltage. Use ceramic capacitors for best performance. During layout, Place the input capacitors as close to the IN and GND pins as possible. The capacitance can vary significantly with temperature. Use capacitors with X5R or X7R ceramic dielectrics because they are fairly stable over a wide temperature range. The capacitors must also have a ripple current rating that exceeds the converter’s maximum input ripple current. Estimate the input ripple current as follows: V1 (V VI I IN OUT IN OUT OUTCIN (16) The worst-case condition occurs at V IN = 2V OUT, where: II OUT CIN (17)
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 17 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. For simplification, choose an input capacitor with an RMS current rating that exceeds half the maximum load current. The input capacitance value determines the converter input voltage ripple. Select a capacitor value that meets any input voltage ripple requirements. Estimate the input voltage ripple as follows: V1 (V V C F IV IN OUT IN OUT INSW OUT The worst-case condition occurs at V IN = 2V OUT, where: INSW OUT IN C F I 1V (19) PCB Layout Recommendations 1. Place the input/output capacitors on the same side of the MPM3680, and as close to the MPM3680 package as possible. 2. A solid system ground layer is required to be placed immediately below the surface layer with the MPM3680. 3. Thermal VIAs (18 mil diameter and 8 mil hole size) are required to be placed underneath the GND, IN and VOUT pads, as well as the edges of the MPM3680 and the input/output capacitors. 4. Keep the DC_trim traces as short as possible. VIN AC_trim PG VCC AGND SW GND SS GND VIN GND GND GND GND GND GND SW SW SW SW SW AGND AGND AGND EN >FERQ VIN DCtrim> N/C VOUT SW FREQ> SW PGND VIN N/C >DC_trim VOUT SW AGND N/C SW VIN BST N/C N/C CIN1 CIN2 COUT1 COUT2 RtrimCtrim COUT3 CIN3 SW SW SW SW SW VOUT VOUT VOUT VOUT NC GND Figure 10
MPM3680 – 18V 6A STEP-DOWN POWER MODULE MPM3680 Rev. 1.02 www.MonolithicPower.com 18 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Typical Design Parameter Table The following table (Table 2) includes the recommended component values for typical designs. Ref Vin (V) Vout (V) Rtrim (KΩ) Ctrim (pF) Rfreq (KΩ) fs (KHz) Cout (uF) Ripple (mV) 1 12 1 6.49 560 NS 400 5X47 11.6 2 12 1 6.49 560 NS 400 3X47 16.4 3 12 1 6.49 560 300 600 5X47 5.0 4 12 1 6.49 560 300 600 3X47 7.6 5 12 1 6.49 220 178 1000 3X47 3.8 6 12 1 6.49 330 178 1000 5X47 2.2 7 12 1.2 10 560 649 300 5X47 24.0 8 12 1.2 10 560 649 300 3X47 38.4 9 12 1.2 10 560 NS 500 5X47 11.2 10 12 1.2 10 560 NS 500 3X47 14.8 11 12 1.2 10 270 200 1000 5X47 3.2 12 12 1.2 10 270 200 1000 3X47 4.6 13 12 1.5 15 680 806 300 5X47 32.8 14 12 1.5 15 680 806 300 3X47 46.0 15 12 1.5 15 560 NS 600 5X47 8.4 16 12 1.5 15 560 NS 600 3X47 11.6 17 12 1.5 15.8 330 243 1000 5X47 5.8 18 12 1.5 15.8 330 243 1000 3X47 7.0 19 12 1.8 21 560 750 400 5X47 25.4 20 12 1.8 21 560 750 400 3X47 49.6 21 12 1.8 21 560 NS 750 5X47 7.6 22 12 1.8 21 560 NS 750 3X47 9.4 23 12 1.8 21 470 301 1000 5X47 8.8 24 12 1.8 21 330 301 1000 3X47 12.4 25 12 2.5 34 680 1000 400 5X47 34.2 26 12 2.5 34 680 1000 400 3X47 46.4 27 12 2.5 35.7 680 698 600 5X47 18.8 28 12 2.5 35.7 680 698 600 3X47 25.2 29 12 2.5 34 330 432 1000 5X47 9.8 30 12 2.5 34 270 432 1000 3X47 13.0 33 12 3.3 49.9 330 909 600 5X47 31.6 34 12 3.3 49.9 330 909 600 7X47 21.2 35 12 3.3 49.9 270 549 1000 5X47 6.0 36 12 3.3 49.9 270 549 1000 3X47 10.2 39 12 5 90.9 390 1350 600 5X47 49.2 40 12 5 90.9 390 1350 600 7X47 36.0 41 12 5 90.9 180 909 1000 5X47 20.8 42 12 5 90.9 150 909 1000 3X47 28.8 Table 2: Typical Design Examples
MPM3680 – 18V 6A STEP-DOWN POWER MODULE NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPM3680 Rev. 1.02 www.MonolithicPower.com 19 10/13/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN-57 (12mmx12mmx4mm)