MPM3650 MPS | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 22
Technical content
2.75 to 17V, 6A, 1.2MHz, Synchronous, Step-Down Power Module with Discontinuous Conduction Mode MPM3650 Rev. 1.1 MonolithicPower.com 1 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved.
DESCRIPTION
The MPM3650 is a fully integrated high - frequency, synchronous , rectified, step -down power module with an internal inductor. It offers a highly compact solution to achieve 6A of continuous output current (IOUT) across a wide input voltage (VIN) range, with excellent load and line regulation. The MPM3650 offers synchronous mode for high efficiency across the entire output current load range. Constant-on-time (COT) control provides fast transient response, easy loop design , and tight output regulation. Full protection features include short-circuit protection (SCP), over-current protection (OCP), under-voltage protection (UVP), and thermal shutdown. The MPM3650 requires a minimal number of readily available, standard external components, and is available in a space -saving QFN -24 (4mmx6mm) package.
FEATURES
Wide 2.75V to 17V Operating Input Voltage (VIN) Range Output Current (IOUT): o 0.6V to 1.8V, 6A IOUT o Above 1.8V, 5A IOUT Internal Power MOSFETs Adjustable Output from 0.6V High-Efficiency Synchronous Mode Discontinuous Conduction Mode (DCM) for High Efficiency at Light-Loads Continuous Conduction Mode (CCM) at Heavy Loads Supports Pre-Biased Start-Up 1200kHz Fixed Switching Frequency (fSW) Configurable External Soft-Start Time (tSS) Enable (EN) and Power Good (PG) for Power Sequencing Over-Current Protection (OCP) with Hiccup Mode Thermal Shutdown Available in a QFN-24 (4mmx6mmx1.6mm) Package
APPLICATIONS
Field-Programmable Gate Array (FPGA) Power Systems Optical Modules Telecommunications Networking Industrial Equipment All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 2 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL APPLICATION VIN VCC PG EN AGND FB SS PGND SWBST VOUT = C2R1 20kΩ 30kΩ 1V/6A MPM3650 2.75V to 17V VOUT Efficiency vs. Load Current vs. Power Loss VIN = 12V -0.3 0.2 0.7 1.2 1.7 2.2 0 1 2 3 4 5 6 POWER LOSS (W) EFFICIENCY (%) LOAD CURRENT (A) VOUT = 1V VOUT=1.8V VOUT=3.3V VOUT=1V Ploss VOUT=1.8V Ploss VOUT=3.3V Ploss
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 3 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking MSL Rating MPM3650GQW QFN-24 (4mmx6mmx1.6mm) See Below 3 * For Tape & Reel, add suffix -Z (e.g. MPM3650GQW-Z). TOP MARKING MPS: MPS prefix Y: Year code WW: Week code MP3650: First six digits of the part number LLLLLL: Lot number M: Module PACKAGE REFERENCE TOP VIEW SW PACKAGE TOP VIEW BST EN VIN SW PG PGND PGND PGND OUT OUT OUT OUT SW 10 11 PGND PG 9 12 2223 QFN-24 (4mmx6mmx1.6mm)
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 4 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1, 2, 3, 4, 5, 24 PGND System ground. The PGND pin is the regulated output voltage ’s (V OUT’s) reference ground. Careful consideration must be taken when designing the PCB layout. Connect PGND to ground with multiple copper pours and vias. 6 VCC Internal bias supply output. 7, 8, 13, 14, 23 SW Switch output. Float the SW pins. 9, 10, 11, 12 OUT Output pin. Connect the OUT pin to the output capacitor (COUT). 15 BST Bootstrap. Float the BST pin. 16 EN Enable. Pull the EN pin high to turn the part on; float EN to turn it off. EN is pulled to AGND via an internal 1.2MΩ pull-down resistor (REN_PD). 17 FB Feedback. To set VOUT, connect the FB pin to the tap of an external resistor divider connected between the output and AGND. 18 AGND Signal ground. The AGND pin is not connected internally to the system ground. When designing the PCB layout, ensure that AGND is connected to the system ground. 19 SS Soft start. Connect a capacitor between the SS pin and AGND to set the soft -start time (tSS) and to avoid start-up inrush current. SS has an internal 22nF capacitor (CSS). 20, 21 PG Power good output. The PG pin is an open-drain output. PG’s state changes if one of the following protections is triggered: under-voltage protection (UVP), over-current protection (OCP), or over-temperature protection (OTP). PG’s state also changes if an over-voltage (OV) condition occurs.
22 VIN
Supply voltage. The MPM3650 operates from a 2.75V to 17V input rail. Use a 0.1μF input capacitor (CIN) in a 0402 package to decouple the input rail. Use wide PCB traces to make the connection. ABSOLUTE MAXIMUM RATINGS (1) - 0.3V (-5V < 10ns) to VIN + 0.7V (23V < 10ns) Continuous power dissipation (TA = 25°C) (2) ESD Ratings Recommended Operating Conditions (3) 0.6V to VIN х DMAX or 12V maximum (4) Operating junction temp (TJ) .... -40° C to +125° C Thermal Resistance θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature , TJ (MAX), the junction -to- ambient thermal resistance, θJA, and the ambient temperature, TA. The maximum allowable continuous power dissipation on the EVM3650-QW-00A evaluation board at any ambient temperature is calculated by P D (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation can cause excessive die temperature, and the device may go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) The operation voltage after VOUT is regulated to a 0.6V or higher voltage. 5) Measured on EVM3650-QW-00A, 4-layer PCB.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 5 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 5V, TJ = -40°C to +125°C (6), typical values are tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Input voltage VIN 2.75 17 V Supply Current Shutdown current ISD VEN = 0V 2 5 µA Quiescent current IQ VEN = 2V, VFB = 0.65V 100 150 µA MOSFET Switch leakage ISW_LKG VEN = 0V, VSW = 7V 5 µA Current Limit Valley current limit ILIMIT_VALLEY 6 7 A Short hiccup duty cycle (7) DHICCUP 10 % Switching Frequency and Minimum On/Off Timer Switching frequency fSW 0.9 1.2 1.6 MHz Minimum on time (7) tON_MIN 50 ns Minimum off time (7) tOFF_MIN 100 ns Reference and Soft Start (SS) Feedback (FB) voltage VFB TJ = 25°C 594 600 606 mV TJ = -40° C to +125° C 591 600 609 mV FB current IFB VFB = 700mV 10 50 nA Soft-start current ISS 4 6 8 µA Enable (EN) and Under-Voltage Lockout (UVLO) EN rising threshold VEN_RISING 1.19 1.23 1.27 V EN falling threshold VEN_FALLING 0.96 1 1.04 V EN pull-down resistor REN_PD 1.2 MΩ VCC VCC UVLO rising threshold VCC_UVLO_RISING 2.4 2.5 2.6 V VCC UVLO threshold hysteresis VCC_UVLO_HYS 200 mV VCC regulator voltage VCC VIN = 5V 3.5 V VCC load regulation REGVCC ICC = 5mA 3 % Power Good (PG) PG under-voltage (UV) rising threshold VPG_UV_RISING 0.85 0.9 0.95 VFB PG UV falling threshold VPG_UV_FALLING 0.75 0.8 0.85 VFB PG over-voltage (OV) rising threshold VPG_OV_RISING 1.15 1.2 1.25 VFB PG OV falling threshold VPG_OV_FALLING 1.05 1.1 1.15 VFB PG delay tDELAY_PG Both edges 50 µs PG sink current capability VPG_SINK 4mA sink 0.4 V PG leakage current IPG_LEAK VPG = 5V 10 μA Thermal Protection Thermal shutdown (7) TSD 150 °C Thermal hysteresis (7) TSD_HYS 20 °C Notes: 6) Not tested in production. Guaranteed by over-temperature correlation. 7) Guaranteed by design and characterization testing.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 6 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. Efficiency vs. Load Current VOUT = 1V Efficiency vs. Load Current VOUT = 1.8V Efficiency vs. Load Current VOUT = 3.3V Line Regulation VOUT = 1V Line Regulation VOUT = 1.8V Line Regulation VOUT = 3.3V 100 0 1 2 3 4 5 6 EFFICIENCY (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V 100 0 1 2 3 4 5 6 EFFICIENCY (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V 100 0 1 2 3 4 5 EFFICIENCY (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 3 5 7 9 11 13 15 17 LINE REGULATION (% ) INPUT VOLTAGE (V) Iout=0.01A Iout=3A -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 3 5 7 9 11 13 15 17 LINE REGULATION (% ) INPUT VOLTAGE (V) Iout=0.01A Iout=3A -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 3 5 7 9 11 13 15 17 LINE REGULATION (% ) INPUT VOLTAGE (V) Iout=0.01A Iout=2.5A
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 7 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. Load Regulation VOUT = 1V Load Regulation VOUT = 1.8V Load Regulation VOUT = 3.3V Temperature vs. Load Current VOUT = 1.8V Temperature vs. Load Current VOUT = 1V, TA = 15°C Temperature vs. Load Current VOUT = 3.3V -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 0 1 2 3 4 5 6 LOAD REGULATION (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 0 1 2 3 4 5 6 LOAD REGULATION (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.2 0.3 0.4 0.5 0 1 2 3 4 5 LOAD REGULATION (% ) LOAD CURRENT (A) VIN=5V VIN=12V VIN=17V 1 2 3 4 5 6 CASE TEMPERATURE (°C) LOAD CURRENT (A) Vin=5V Vin=12V Vin=17V 1 2 3 4 5 6 CASE TEMPERATURE (°C) LOAD CURRENT (A) Vin=5V Vin=12V Vin=17V 1 2 3 4 5 6 CASE TEMPERATURE (°C) LOAD CURRENT (A) Vin=5V Vin=12V Vin=17V
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 8 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. Thermal Derating VIN = 12V, without airflow Thermal Derating VIN = 12V, with airflow Thermal Derating VIN = 5V, without airflow Thermal Derating VIN = 5V, with airflow 0 10 20 30 40 50 60 70 80 90 100110120 LOAD CURRENT (A) AMBIENT TEMPERATURE (°C) Vin=12V,Vout=1V Vin=12V,Vout=1.8V Vin=12V,Vout=3.3V 0 10 20 30 40 50 60 70 80 90 100110120 LOAD CURRENT (A) AMBIENT TEMPERATURE (°C) Vin=12V,Vout=1V Vin=12V,Vout=1.8V Vin=12V,Vout=3.3V 0 10 20 30 40 50 60 70 80 90 100110120 LOAD CURRENT (A) AMBIENT TEMPERATURE (°C) Vin=5V,Vout=1V Vin=5V,Vout=1.8V Vin=5V,Vout=3.3V 0 10 20 30 40 50 60 70 80 90 100110120 LOAD CURRENT (A) AMBIENT TEMPERATURE (°C) Vin=5V,Vout=1V Vin=5V,Vout=1.8V Vin=5V,Vout=3.3V
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 9 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. VOUT Ripple IOUT = 0A VOUT Ripple IOUT = 6A CH1: VOUT / AC 20mV/div. CH1: VOUT / AC 5mV/div. 20ms/div. 400ns/div. Load Transient IOUT = 0A to 3A Load Transient IOUT = 3A to 6A CH1: VOUT / AC 50mV/div. CH4: IOUT 2A/div. CH1: VOUT / AC 20mV/div. CH4: IOUT 5A/div. 100μs/div. 100μs/div. Start-Up through VIN IOUT = 0A Start-Up through VIN IOUT = 6A CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VIN 5V/div. CH4: IOUT 5A/div. CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VIN 5V/div. CH4: IOUT 5A/div. 10ms/div. 10ms/div.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 10 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. Shutdown through VIN IOUT = 0A Shutdown through VIN IOUT = 6A CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VIN 5V/div. CH4: IOUT 5A/div. CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VIN 5V/div. CH4: IOUT 5A/div. 10ms/div. 10ms/div. Start-Up through EN IOUT = 0A Start-Up through EN IOUT = 6A CH1: VOUT 1V/div. CH2: VSW 10V/div. CH3: VEN 2V/div. CH4: IOUT 5A/div. CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VEN 2V/div. CH4: IOUT 5A/div. 10ms/div. 10ms/div. Shutdown through EN IOUT = 0A Shutdown through EN IOUT = 6A CH1: VOUT 1V/div. CH2: VSW 10V/div. CH3: VEN 2V/div. CH4: IOUT 5A/div. CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VEN 2V/div. CH4: IOUT 5A/div. 10ms/div. 10ms/div.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 11 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VOUT = 1V, COUT = 4 x 22μF, fSW = 1200kHz, TA = 25°C, unless otherwise noted. SCP Steady State SCP Entry and Recovery CH1: VOUT 1V/div. CH2: VSW 5V/div. CH3: VIN 5V/div. CH4: IOUT 10A/div. CH1: VOUT 1V/div. CH4: IOUT 2A/div. 20ms/div. 200ms/div.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 12 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. FUNCTIONAL BLOCK DIAGRAM BUF GND SS VCC LDO HS-FET Driver LS-FET Driver Current Modulator On Timer SW BST VIN VCC PG EN FB 90% of VREF Rising EA FB+RAMP Logic Control Main Switch (NCH) Synchronous Rectifier (NCH) Bootstrap Regulator Ramp PWM ISS 80% of VREF Falling Current-Sense Amplifier AGND 1.2MΩ VOUT 0.5μH 110% of VREF Rising 120% of VREF Falling 22nF EAO Bias and Reference Voltage Figure 1: Functional Block Diagram
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 14 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. Once VIN exceeds the UVLO rising threshold, the MPM3650 starts up. If VIN drops below the UVLO falling threshold, the device shuts. UVLO is a non-latch protection. Soft Start (SS) The MPM3650 employs soft start (SS) to ensure that the output ramps up smoothly during start- up. If the EN pin goes high, an internal current source (6μA) charges the SS capacitor (CSS). As the device starts up, the SS voltage (VSS) takes over VREF to the PWM comparator . VOUT ramps up smoothly with VSS. Once VSS exceeds VREF, VSS continues to ramp up until VREF takes over. Then SS finishes, and the device enters steady state operation. The SS capacitance (CSS) can be calculated with Equation (1): SS SS SS REF t (ms) I ( μA)C (nF) 0.83 V (V) (1) It is recommended that CSS be an internal 22nF capacitor. If the output capacitor (COUT) has a large capacitance, it is not recommended to set the soft-start time (tSS) too s hort, or else the device could too easily reach the current limit during SS. Power Good (PG) Indicator The PG pin is the open drain of a MOSFET that connects to VCC or a voltage source via a resistor (e.g. 100kΩ). If VIN is applied and the PG pin is pulled to PGND before SS completes, then the MOSFET turns on. Once VFB reaches 90% of VREF, PG is pulled high after a 50μs delay. Once VFB drops below 80% of VREF, PG is pulled low. If UVLO or over-temperature protection ( OTP) occurs, PG is pulled low. If an over-current (OC) condition occurs and V FB drops below 80% of VREF, PG is pulled low after a 0.05ms delay. If an over-voltage (OV) condition occurs and V FB exceeds 120% of V REF, PG is pulled low after a 0.05ms delay. If VFB drops below 110% of V REF, PG is pulled high after a 0.05ms delay. If the input supply fails to power the MPM3650, PG is clamped low, even if PG is tied to an external DC source via a pull-up resistor. Figure 4 shows the relationship between the PG voltage (VPG) and the pull-up current. Figure 4: Clamped VPG vs. Pull-Up Current Over-Current Protection (OCP) and Short - Circuit Protection (SCP) The MPM3650 offers valley limit control. The LS-FET monitors the current flow ing through itself. The HS-FET waits until the valley current limit is not triggered before turning on again. VOUT decreases until V FB drops below the under- voltage (UV) threshold (typically 50% below VREF). Once a UV fault occurs, the MPM3650 enters hiccup mode to periodically restart the part. During over-current protection (OCP), the device tries to recover from the OC fault using hiccup mode. The MPM3650 disables the output power stage, discharges CSS, and initiates a SS. If the OC condition remains after SS is complete , the device repeats this operation until the OC condition disappears, and the output rises back to its regulation level. OCP is a non-latch protection. Pre-Biased Start-Up The MPM3650 is designed for monotonic start - up into pre -biased loads. If the output is pre - biased to a certain voltage during start -up, and the bootstrap (BST) voltage (VBST) is refreshed and charged, then the VSS is also charged. If VBST exceeds its rising threshold and VSS exceeds the sensed VOUT at the FB pin , the part resumes normal operation. 0.2 0.4 0.6 0.8 1.2 0 1 2 3 4 5 PG CLAMPED VOLTAGE (V) PULL-UP CURRENT (mA)
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 15 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. If the silicon die temperature exceeds 1 50° C, the MPM3650 shuts down . Once the temperature drops below its lower threshold (typically 130° C), the chip starts up again. Start-Up and Shutdown Circuit If both VIN and the EN voltage (VEN) exceed their respective thresholds, the chip starts up. The reference block starts up first to generate a stable VREF and current s. Then the internal regulator starts up to provide a stable supply for the remaining circuits. Three events can shut down the chip: EN going low, VIN going low, and thermal shutdown. The shutdown procedure first block s the signaling path to avoid any fault triggering, then the internal supply rail is pulled down to 0V.
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 17 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. With POSCAP capacitors, the ESR dominates the impedance at fSW. For simplification, ∆VOUT can be calculated with Equation (9): OUT OUT OUT ESR SW IN VVV (1 ) Rf L V (9) In addition to accounting for the output ripple, a larger-value COUT provides better load transient response. However, if COUT is too large, VOUT is unable to reach the design value during the soft- start time (tSS), and the device will fail to regulate. The maximum output capacitor value (CO_MAX) can be estimated with Equation (10): OUT _MAX LIM_ AVG OUT SS OUTC (I I ) t / V (10) Where ILIM_AVG is the average start-up current during the soft-start period. PCB Layout Guidelines (8) Efficient PCB layout is critical for stable operation. A 4-layer layout is recommended to improve thermal performance. For the best results, refer to Figure 6 and follow the guidelines below: 1. Keep the power loop as small as possible. 2. Connect a large ground plane directly to PGND. If the bottom layer is a ground plane, add multiple vias near PGND. 3. Place the ceramic input capacitor, especially the small package size (0402) input bypass capacitor, as close to the VIN and PGND pins as possible to minimize high -frequency noise. 4. Keep the paths between CIN and VIN as short and wide as possible. 5. Place the VCC capacitor as close to the VCC pin and AGND as possible. 6. Connect VIN, VOUT , and PGND to a large copper area to improve thermal performance and long-term reliability. 7. Connect the PGND area to the internal layers and the bottom layer with multiple vias. 8. Use an integrated PGND on the internal layer or bottom layer. 9. Connect the power planes to the internal layers with multiple vias. VOUTVIN GND GND Via Top Layer Pads Figure 6: Recommended PCB Layout Note: 8) The recommended layout is based on Figure 9 (see the Typical Application Circuits section on page 18).
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 19 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUITS (continued) 22μF x 2 499kΩ 100kΩ 1μF AGND AGND 22μF x 4 20kΩ 4.42kΩ AGND 39pF AGND GND NS GND 0.1μF 0.1μF VOUT = 3.3V VCC SW BSTOUT PGND EN FB AGND SS PG VIN MPM3650 VIN = 2.75V to 17V GND 15 9, 10, 11, 12 1-5,24 20, 21 7, 8, 13, 14, 23 C5 (optional) Figure 9: Typical Application Circuits (3.3V Output)
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 20 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN-24 (4mmx6mmx1.6mm) PACKAGE OUTLINE DRAWING FOR 24L FCMQFN (4X6MM) MF-PO-D-0441 revision 0.0 SIDE VIEW BOTTOM VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) LEAD COPLANARITY SHALL BE 0.08 MILLIMETERS MAX. 3) JEDEC REFERENCE IS MO-220. 4) DRAWING IS NOT TO SCALE. PIN 1 ID MARKING TOP VIEW PIN 1 ID INDEX AREA RECOMMENDED LAND PATTERN PIN 1 ID 0.25X45º TYP 0.25X45º
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM MPM3650 Rev. 1.1 MonolithicPower.com 21 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. CARRIER INFORMATION Part Number Package Description Quantity/ Reel Quantity/ Tube Reel Diameter Carrier Tape Width Carrier Tape Pitch MPM3650GQW-Z QFN-24 (4mmx6mmx1.6mm) 2500 N/A 13in 12mm 8mm Pin1 1 1 1 1 ABCD ABCD ABCD ABCD Feed Direction
MPM3650 – 6A, 17V, 6A, 1.2MHz, STEP-DOWN POWER MODULE WITH DCM Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third -party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPM3650 Rev. 1.1 MonolithicPower.com 22 9/17/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved.
REVISION HISTORY
Revision # Revision Date Description Pages Updated 1.0 6/3/2020 Initial Release - 1.1 9/17/2021 Updated the efficiency curve 1 Updated “ –Z” to “ -Z” in the Ordering Information and Carrier Information sections 2, 20 Updated the symbols in the Electrical Characteristics section 4 Updated the Temperature vs. IOUT curve titles to “Temperature vs. Load Current” 6 Updated the step numbers in the PCB Layout Guidelines section 16 Updated the VIN and PGND pin numbers 17–18 Updated page footer 21 Grammar and formatting updates; updated pagination; updated page headers; added technical abbreviations and shorthand (e.g. VOUT, VREF, CSS, ∆VIN, fSW, etc.); updated the EN resistor’s pull-down resistance All