MP7533 EXAR | Alldatasheet

Document overview

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Technical content

Rev. 2.00

FEATURES

  • 10-Bit Resolution
  • Non-Linearity: 1/2 LSB to 2 LSB
  • Nonlinearity Tempco: 0.2 ppm of FSR/°C, Max.
  • Low Power Dissipation: 20 mW
  • Current Settling Time: 500 ns
  • Feedthrough Error: 1 mV p-p @ 10 kHz, Max.
  • TTL/CMOS Compatible
  • Latch-Up Free
  • Improved Replacement for AD7533

15 V CMOS

Digital-to-Analog Converter BENEFITS

  • Accurate Converter at Low Cost
  • Can be used in Reverse Mode (Voltage Out)
  • Flexible Design

APPLICATIONS

  • Digital/Analog Multiplication
  • Character Generation
  • Programmable Power Supplies
  • Gain Controlled Circuits GENERAL DESCRIPTION The MP7533 is a low cost, 10-bit multiplying Digital-to-Analog Converter. This device uses EXAR’s patented advanced thin film resistor and CMOS technologies, providing up to 10-bit ac- curacies with TTL/CMOS compatibility. Pin and functional equivalent to the industry standard MP7520, the MP7533 is recommended as a lower cost alterna- tive for old MP7520 sockets or new 10-bit DAC designs. The MP7533 applications include: digital-to-analog multipli- cation, CRT character generation, programmable power sup- plies, digitally controlled gain circuits, etc. SIMPLIFIED BLOCK DIAGRAM R 2 to 3 Decoder MSB LSB 4R 4R 4R 4R 4R 4R 2R2R Switch Drivers & Switches

3 Segment D/A Converter with Termination to DGND

Logical “1” at Digital Input Steers Current to IOUT1 BIT 10 R = 10k BIT 1 R FB IOUT1 IOUT2 VREF VDD

Rev. 2.00

ORDERING INFORMATION

Range Part No. Ceramic Dip MP7533AD Ceramic Dip MP7533BD Ceramic Dip MP7533CD Ceramic Dip MP7533SD* Ceramic Dip MP7533TD* Ceramic Dip MP7533UD* Plastic Dip MP7533JN –40 to +85°C –40 to +85°C –40 to +85°C –55 to +125°C –55 to +125°C –55 to +125°C Plastic Dip MP7533KN Plastic Dip MP7533LN SOIC MP7533JS SOIC MP7533KS SOIC MP7533LS +1/2 +1/2 +1/2 +1/2 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C –40 to +85°C INL (LSB) Gain Error (% FSR) DNL (LSB) *Contact factory for non-compliant military processing PIN CONFIGURATIONS GND (MSB) BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 10 (LSB) BIT 9 BIT 8 BIT 7 BIT 6 16 Pin CDIP, PDIP (0.300”) D16, N16 IOUT1 IOUT2 R FB VREF VDD 161 16 Pin SOIC (Jedec, 0.300”) S16 See Pin Out at Left See Packaging Section for Package Dimensions PIN OUT DEFINITIONS PIN NO. NAME DESCRIPTION 1I OUT1 Current Output 1 2I OUT2 Current Output 2

3 GND Ground

4 BIT 1 Data Input Bit 1 (MSB)

5 BIT 2 Data Input Bit 2

6 BIT 3 Data Input Bit 3

7 BIT 4 Data Input Bit 4

8 BIT 5 Data Input Bit 5

PIN NO. NAME DESCRIPTION

9 BIT 6 Data Input Bit 6

10 BIT 7 Data Input Bit 7

11 BIT 8 Data Input Bit 8

12 BIT 9 Data Input Bit 9

13 BIT 10 Data Input Bit 10 (LSB)

15 V REF Reference Input Voltage

16 R FB Internal Feedback Resistor

Rev. 2.00

ELECTRICAL CHARACTERISTICS

(VDD = + 15 V, VREF = +10 V unless otherwise noted) 25°C Tmin to Tmax Parameter Symbol Min Typ Max Min Max Units Test Conditions/Comments STATIC PERFORMANCE 1 FSR = Full Scale Range Resolution (All Grades) N 10 10 Bits Integral Non-Linearity INL LSB Best Fit Straight Line Spec. (Relative Accuracy) (Max INL – Min INL) / 2 A, S, J + 2+ 2 B, T, K + 1+ 1 Differential Non-Linearity DNL LSB A, S, J + 1+ 1 B, T, K + 1+ 1 C, U, L + 1+ 1 Gain Error GE + 0.4 + 1.5 + 1.5 % FSR Using Internal R FB Gain Temperature Coefficient2 TC GE +2 ppm/ °C ΔGain/ΔTemperature Power Supply Rejection Ratio PSRR + 30 + 50 + 50 ppm/% |ΔGain/ΔVDD | ΔVDD = + 5% Output Leakage Current I OUT +50 + 200 nA REFERENCE INPUT Input Resistance R IN 5 10 20 5 20 k Ω DIGITAL INPUTS3 Logical “1” Voltage V IH 3.0 2.4 3.0 V Logical “0” Voltage V IL 0.8 0.8 V Input Leakage Current I LKG +1+ 1 µA ANALOG OUTPUTS Output Capacitance2 C OUT1 52 pF DAC Inputs all 1’s C OUT1 26 pF DAC Inputs all 0’s C OUT2 13 pF DAC Inputs all 1’s C OUT2 45 pF DAC Inputs all 0’s POWER SUPPLY 4 Functional Voltage Range2 VDD 4.5 15 4.5 15 V Supply Current I DD 2 2 mA All digital inputs = 0 or all = 5 V Total Dissipation 20 mW NOTES: 1 Full Scale Range (FSR) is 10V for unipolar mode.

2 Guaranteed but not production tested

3 Digital Input levels should not go below ground or exceed the positive supply voltage, otherwise damage may occur. 4 Specified values guarantee functionality. Refer to other parameters for accuracy. Specifications are subject to change without notice

Rev. 2.00 ABSOLUTE MAXIMUM RATINGS (T A = +25°C unless otherwise noted)1, 2 Package Power Dissipation Rating to 75°C NOTES: 1 Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation at or above this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2 Any input pin which can see a value outside the absolute maximum ratings should be protected by Schottky diode clamps (HP5082-2835) from input pin to the supplies. All inputs have protection diodes which will protect the device from short transients outside the supplies of less than 20mA for less than 100µs. APPLICATION NOTES Refer to Section 8 for Applications Information

Rev. 2.00 b 0.014 0.023 0.356 0.584 –– b 0.038 0.065 0.965 1.65 2 c 0.008 0.015 0.203 0.381 –– E 0.220 0.310 5.59 7.87 4 E 0.290 0.320 7.37 8.13 7 e 0.100 BSC 2.54 BSC 5 L 0.125 0.200 3.18 5.08 –– Q 0.015 0.060 0.381 1.52 3 α 0° 15° 0° 15° –– D b e

16 LEAD CERAMIC DUAL-IN-LINE

(300 MIL CDIP) D16 SYMBOL MIN MAX MIN MAX NOTES INCHES MILLIMETERS S 1 S NOTES 1. Index area; a notch or a lead one identification mark is located adjacent to lead one and is within the shaded area shown. 2. The minimum limit for dimension b1 may be 0.023 (0.58 mm) for all four corner leads only. 3. Dimension Q shall be measured from the seating plane to the base plane. 4. This dimension allows for off-center lid, meniscus and glass overrun. 5. The basic lead spacing is 0.100 inch (2.54 mm) be- tween centerlines. 6. Applies to all four corners. 7. This is measured to outside of lead, not center. 9See Note 1 E α c A L Q Seating Plane Base Plane

Rev. 2.00

16 LEAD PLASTIC DUAL-IN-LINE

(300 MIL PDIP) N16 D e B 1 A 1 α C E A L B Q 1 Seating Plane SYMBOL MIN MAX MIN MAX INCHES A –– 0.200 –– 5.08 B 0.014 0.023 0.356 0.584 B1 (1) 0.038 0.065 0.965 1.65 C 0.008 0.015 0.203 0.381 D 0.745 0.785 18.92 19.94 E 0.295 0.325 7.49 8.26 E 1 0.220 0.310 5.59 7.87 e 0.100 BSC 2.54 BSC L 0.115 0.150 2.92 3.81 α 0° 15° 0° 15° Q 1 0.055 0.070 1.40 1.78 S 0.020 0.080 0.51 2.03 MILLIMETERS Note: (1) The minimum limit for dimensions B1 may be 0.023” (0.58 mm) for all four corner leads only. S

Rev. 2.00 SYMBOL MIN MAX MIN MAX A 0.097 0.104 2.46 2.64 A1 0.0050 0.0115 0.127 0.292 B 0.014 0.019 0.356 0.482 C 0.0091 0.0125 0.231 0.318 D 0.402 0.412 10.21 10.46 E 0.292 0.299 7.42 7.59 e 0.050 BSC 1.27 BSC H 0.400 0.410 10.16 10.41 h 0.010 0.016 0.254 0.406 L 0.016 0.035 0.406 0.889 α 0° 8° 0° 8° INCHES MILLIMETERS

16 LEAD SMALL OUTLINE

(300 MIL JEDEC SOIC) S16 e 16 9 D E H B A L C A 1 Seating Plane α h x 45°

Rev. 2.00 NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im- prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de- scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contains here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum- stances. Copyright EXAR Corporation Datasheet April 1995 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.