MP5001 MPS | Alldatasheet

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5V, 1A- 5A Programmable Current Limit Switch MP5001 Rev.0.94 www.MonolithicPower.com 1 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. The Future of Analog IC Technology

DESCRIPTION

The MP5001 is a protection device designed to protect circuitry on the output (source) from transients on input (V CC). It also protects VCC from undesired shorts and transients coming from the source. At start up, inrush current is limited by limiting the slew rate at the source. The slew rate is controlled by a small capacitor at the dv/dt pin. The dv/dt pin has an internal circuit that allows the customer to float this pin (no connect) and still receive a 1.1ms ramp time at the source. The max load at the output (source) is current limited. This is accomplished by utilizing a sense FET topology. The magnitude of the current limit is controlled by an external resistor from the I- Limit pin to the Source pin. An internal charge pump drives the gate of the power device, allowing a very low on-resistance DMOS power FET of just 44mΩ. The source is protected from the V CC input being too low or too high. Under Voltage Lockout (UVLO) assures that V CC is above the minimum operating threshold, before the power device is turned on. If V CC goes above the high output threshold, the source voltage will be limited.

FEATURES

  • Integrated 44m Ω Power FET withstand 20V
  • Enable/Fault Pin
  • Adjustable Slew Rate for Output Voltage
  • Adjustable Current Limit
  • Thermal Protection
  • Over Voltage Limit

APPLICATIONS

  • Hot Swap
  • PC Cards
  • Cell Phones
  • Laptops TYPICAL APPLICATION MP5001 N/C I-Limit Enable/Fault Source Source Source Source Source VCC dv/dt GND VIN VOUT Cdv/dt RLIMIT EN “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc.

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 2 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number* Package Top Marking Free Air Temperature (TA) MP5001DQ QFN10 (3x3) W5 -40°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP5001DQ–Z) For RoHS Compliant Packaging, add suffix –LF (e.g. MP5001DQ–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Junction Temperature………….-40 °C to +150°C Continuous Power Dissipation (TA = +25°C)(2) Recommended Operating Conditions Input Voltage Operating Range……….4V to 10V Operating Junct. Temp (TJ)…….-40 °C to +125°C Thermal Resistance (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J(MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)- TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer board.

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 3 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VCC = 5V, RLIMIT=22Ω, COUT= 10μF, TJ=25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Power FET Delay Time tDLY Enabling of chip to ID=100mA with a 12 Ω resistive load 0.2 ms ON Resistance (4) R DSon TJ=25°C 44 82 mΩ Note 4, TJ=80°C 95 Off State Output Voltage VOFF VCC=18V, Enable=0V, RL=500Ω 120 mV Continuous Current ID 0.5 in2 pad, TJ=25°C 4.2 A minimum copper, TJ=80°C 2.3 Thermal Latch Shutdown Temperature TSD 175 °C Under/Over Voltage Protection Output Clamping Voltage VCLAMP Overvoltage Protection V CC=8V 5.95 6.65 7.35 V Under Voltage Lockout VUVLO Turn on, Voltage going high 3.2 3.6 4.0 V Under Voltage Lockout (UVLO) Hysteresis V HYST 0.1 V Current Limit Hold Current (4) ILIM-SS R LIMIT=22Ω 1.5 2.1 2.8 A Trip Current ILIM-OL R LIMIT=22Ω 3.3 A dv/dt Circuit Rise Time Tr Float dv/dt pin, Note 5 0.64 1.1 2.0 ms Enable/Fault Low Level Input Voltage VIL Output Disabled 0.5 V Intermediate Level Input Voltage V I (INT) Thermal Fault, Output Disabled 0.82 1.6 2.0 V High Level Input Voltage VIH Output Enabled 2.5 V High State Maximum Voltage V I (MAX) 4.8 V Low Level Input Current (Sink) I IL V ENABLE=0V -28 -50 μA Maximum Fanout for Fault Signal Total number of chips that can be connected for simultaneous shutdown

3 Units

Maximum Voltage on Enable Pin V MAX Note 6 VCC V Total Device Bias Current IBIAS Device Operational 1.5 2.0 mA Thermal Shutdown 0.4 Minimum Operating Voltage for UVLO V MIN Enable<0.5V 3.0 V Notes: 4) Guaranteed by design. 5) Measured from 10% to 90%.

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 4 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1-5 SOURCE This pin is the source of the internal power FET and the output terminal of the IC. 6 N/C DO NOT CONNECT, Pin must be left floating.

7 I-Limit A resistor between this pin and the Source pin sets the overload and short circuit

current limit levels.

8 Enable/Fault

The Enable/Fault pin is a tri-state, bi-directional interface. It can be used to enable the output of the device by floating the pin, or disable the chip by pulling it to ground (using an open drain or open collector device). If a thermal fault occurs, the voltage on this pin will go to an intermediate state to signal a monitoring circuit that the device is in thermal shutdown. 9 dv/dt The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has an internal capacitor that allows it to ramp up over the period of 1.1ms. An external capacitor can be added to this pin to increase the ramp time. If an additional time delay is not required, this pin should be left open. 10 GND Negative Input Voltage to the Device. This is used as the internal reference for the IC. 11 V CC Positive input voltage to the device (Exposed Pad).

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 5 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS VIN = 5V, VEN =3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted. 0 5 10 15 20 25 30 35 40 Current Limit Response vs. Peak Currrent no COUT Hold Current vs. Input Voltage 2.02 2.04 2.06 3.5 4 4.5 5 5.5 6 Input Voltage(V) HOLD CURRENT (A) 2.2 2.6 3.4 3 . 54 4 . 55 5 . 56 Input Voltage(V) TRIP CURRENT (A) Trip Current vs. Input Voltage Peak Current(A) RESPONSE TIME ( RLIMIT( ) TRIP CURRENT & HOLD CURRE NT(A) Hold Current Trip Current Trip and Hold Current vs. Temperature CURRENT(A) -50 0 50 100 150 Input to Output Voltage vs. Load Current 100 120 140 0 0.5 1 1.5 2 2.5 3 Load Current(A) INPUT-TO-OUTPUT VOLTAGE (mV) Static Drain-Source On-State Resisitance vs. Input Voltage IOUT=0.5A Rds_O N(m ) Input Voltage(V) 310 320 330 340 350 3.5 4 4.5 5 5.5 6 Input Voltage(V) SUPPLY CURRENT (uA) Supply Current,Output Disabled vs. Input Voltage VEN=0 Supply Current,Output Enabled vs. Input Voltage no load 1.04 1.08 1.12 1.16 1.2 1.24 3.5 4 4.5 5 5.5 6 Input Voltage(V) SUPPLY CURRENT (mA) Trip Current Hold Current VIN=4V VIN=4.5V VIN=5V VIN=5.5V Trip and Hold Current vs. RLIMIT 0 1 02 03 04 05 06 07 08 09 0 1 0 0

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 6 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VEN =3.3V, RLIMIT =22Ω, COUT =10uF, Cdv/dt=1nF, TA =25°C, unless otherwise noted. VOUT 2V/div IOUT 1A/div 4ms/div Trip Current with Ramped Load on Enabled Device 2200uF 1000uF 470uF EN 2V/div IOUT 1A/div 2ms/div Turn on Delay and Rise Time with 1uF Load COUT=1uF,no load VOUT 2V/div EN 2V/div 4ms/div Turn on Delay and Rise Time with 1uF Load,no Cdv/dt COUT=1uF,no load VOUT 2V/div EN 2V/div 400us/div Turn off Delay and Fall Time with 1uF Load COUT=1uF,no load VOUT 2V/div EN 2V/div 1ms/div VOUT 2V/div EN 2V/div 4ms/div VOUT 2V/div EN 2V/div 400us/div Short Circuit Current,Device Enabled into Short EN 2V/div IOUT 1A/div 100us/div IOUT 1A/div 100ms/div Short Circuit Current,Device Enabled into Short, and Thermal Shut down EN floating EN 2V/div

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 7 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 5V, VEN =3.3V, RLIMIT =22Ω, COUT =10uF, Cdv/dt=1nF, TA =25°C, unless otherwise noted. VOUT 2V/div IOUT 0.5A/div 200ms/div Trip Current=2.11A Hold Current=0.81A Thermal Shutdown VOUT 2V/div IOUT 1A/div 100ms/div Trip Current=3.1A Hold Current=2.1A Thermal Shutdown VOUT 2V/div IOUT 2A/div 40us/div VOUT 2V/div 40us/div IOUT 5A/div

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 8 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. BLOCK DIAGRAM Vcc GND I-LimitCurrent Limit Source dv/dt Control UVLO Thermal Shutdown Voltage Clamp dv/dt Enable/ Fault Enable Charge Pump Figure 1—Function Block Diagram

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 9 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. CURRENT LIMIT The desired current limit is a function of the external current limit resistor. Table 1—Current Limit vs. Current Limit Resistor (VCC=5V) Current Limit Resistor (Ω) 22 50 100 Trip Current (A) 3.3 2.1 1.75 Hold Current (A) 2.1 1 0.6 When the part is active, if load reaches trip current (minimum threshold current triggering overcurrent protection) or a short is present, the part switches into to a constant-current (hold current) mode. Part will be shutdown only if the overcurrent condition stays long enough to trigger thermal protection. However, when the part is powered up by V CC or EN, the load current should be smaller than hold current. Otherwise, the part can’t be fully turned on. In a typical application using a current limit resistor of 22 Ω, the trip current will be 3.3A and the hold current will be 2.1A. If the device is in its normal operating state and passing 2.1A it will need to dissipate only 194mW with the very low on resistance of 44m Ω. For the package dissipation of 50°C/Watt, the temperature rise will only be + 9.7°C. Combined with a 25°C ambient, this is only 34.7°C total package temperature. During a short circuit condition, the device now has 5V across it and the hold current clamps at 2.1A and therefore must dissipate 10.5W. At 50°C/watt, if uncontrolled, the temperature would rise above the thermal protection threshold (+175°C) and the device will shutdown to cause the temperature to drop. Proper heat sink must be used if the device is intended to supply the hold current and not shutdown. Without a heat sink, hold current should be maintained below 600mA at + 25°C and below 360mA at +85°C to prevent the device from activating the thermal shutdown feature. RISE TIME The rise time is a function of the capacitor (Cdv/dt) on the dv/dt pin. Table 2—Rise Time vs. Cdv/dt Cdv/dt none 50pF 500pF 1nF Rise Time* (TYPICAL) (ms) 1.1 2.2 12.3 23.5 * Notes: Rise Time = KRT*(50pF+Cdv/dt), KRT =22E6 The “rise time” is measured by from 10% to 90% of output voltage. U 90% 10% Rise Time t Input Output Enable Figure 2—Rise Time FAULT AND ENABLE PIN The Enable/Fault Pin is a Bi-Directional three levels I/O with a weak pull up current (25uA typical). The three levels are low, mid and high. It functions to enable/disable the part and to relay Fault information. Enable pin as an input: 1. Low and mid disable the part. 2. Low, in addition to disabling the part, clears the fault flag. 3. High enables the part (if the fault flag is clear). Enable pin as an output: 1. The pull up current may (if not over ridden) allow a “wired nor” pull up to enable the part. 2. An under voltage will cause a low on the enable pin, and will clear the fault flag. 3. A thermal fault will cause a mid level on the enable pin, and will set the fault flag. The Enable/Fault line must be above the mid level for the output to be turned on.

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 10 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. The fault flag is a internal flip-flop that can be set or reset under various conditions: 1. Thermal Shutdown: set fault flag 2. Under Voltage: reset fault flag 3. Low voltage on Enable/Fault pin: reset fault flag 4. Mid voltage on Enable/Fault pin: no effect Under a fault, the Enable/Fault pin is driven to the mid level. There are 4 types of faults, and each fault has a direct and indirect effect on the Enable/Fault pin and the internal fault flag. In a typical application there are one or more chips in a system. The Enable/Fault lines will typically be connected together. Table 3—Fault Function Influence in Application Fault description Internal action Effect on Fault Pin Effect on Flag Effect on secondary Part Short/over current Limit current none none none Under Voltage Output is turned off Internally drives Enable/Fault pin to Logic low Flag is reset Secondary part output is disabled, and fault flag is reset. Over Voltage Limit output voltage None None None Thermal Shutdown Shutdown part. The part is latched off until a UVLO or externally driven to ground. Internally drives Enable/Fault pin to mid level Flag is Set Secondary part output is disabled. UNDER VOLTAGE LOCK OUT OPERATION If the supply (input) is below the UVLO threshold, the output is disabled, and the fault line is driven low. When the supply goes above the UVLO threshold, the output is enabled and the fault line is released. When the fault line is released it will be pulled high by a 25uA current source. No external pull up resistor is required. In addition, the pull up voltage is limited to 5 volts. THERMAL PROTECTION When thermal protection is triggered, the output is disabled and the fault line is driven to the mid level. The thermal fault condition is latched (meaning the fault flag is set), and the part will remain latched off until the fault (enable) line is brought low. Cycling the power below the UVLO threshold will also reset the fault flag.

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH MP5001 Rev.0.94 www.MonolithicPower.com 11 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. PCB LAYOUT PCB layout is very important to achieve stable operation. Please follow these guidelines and take below figure for reference. Place Rlimit close to I_limit pin, Cdv/dt close to dv/dt pin and input cap close to VCC (Exposed Pad). Keep the N/C pin float. Put vias in thermal pad and ensure enough copper area near V CC and source to achieve better thermal performance. SOURCE EN/ FAULT dv /dt I_LIMIT N/ C GND GND VIN VOUT SOURCE SOURCE SOURCE SOURCE EN/ FAULT VCC Cdv/dt RLIMIT VIN Top Layer Bottom Layer Figure 3—PCB Layout

MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP5001 Rev. 0.94 www.MonolithicPower.com 12 9/2/2014 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved.

PACKAGE INFORMATION

QFN10 (3mm x 3mm) SIDE VIEW TOP VIEW 110 6 5 BOTTOM VIEW 2.90 3.10 1.45 1.752.90 3.10 2.25 2.55 0.50 BSC 0.18 0.30 0.80 1.00 0.00 0.05

0.20 REF

1.70 0.50 0.25 RECOMMENDED LAND PATTERN

2.90 NOTE:

1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5. 5) DRAWING IS NOT TO SCALE. PIN 1 ID SEE DETAIL A 2.50 0.70 PIN 1 ID OPTION B R0.20 TYP. PIN 1 ID OPTION A R0.20 TYP. DETAIL A 0.30 0.50PIN 1 ID INDEX AREA