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MP3430 Rev 1.11 www.MonolithicPower.com 1 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MP3430 is a monolithic step-up converter that integrates a power switch and a biased avalanche photodiode (APD) current monitor. The device can double the output voltage through the APD optical receivers. The MP3430 can provide up to 90V output. The MP3430 uses a current-mode, fixed- frequency architecture to regulate the output voltage, which provides a fast transient response and cycle-by-cycle current limiting. The MP3430 features two accurate APD current monitoring outputs with 1:10 and 1:2 ratios, respectively. Resistor-adjustable current limiting protects the APD from optical power transients. The MP3430 includes over-current and thermal- overload protection to prevent damage in the event of an output overload. The MP3430 is available in a small 3mm×3mm QFN16 package.
FEATURES
2.7V-to-5.5V Input Voltage 100V/1 Ω NFET with 0.9A Limit Up to 90V Output Voltage 50ns APD Current Monitoring Response Speed 1.3MHz Fixed Switching Frequency Internal Compensation and Soft-Start High-Side APD Current Monitor with less than ±5% Tolerance. 1:10 and 1:2 Ratio Outputs for APD Current Monitoring Thermal-Shutdown Protection Programmable APD Over-Current Limit and Protection 3×3mm QFN16 Package
APPLICATIONS
APD Biasing PIN Diode Biasing Optical Receivers and Modules Fiber-Optic–Network Equipment All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 2 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. **ORDERING INFORMATION Part Number* Package Top Marking MP3430GQ QFN16 (3x3mm) ACBY MP3430HQ QFN16 (3x3mm) ACBY * For Tape & Reel, add suffix –Z (e.g. MP3430GQ–Z). For Tape & Reel, add suffix –Z (e.g. MP3430HQ–Z). For RoHS Compliant Packaging, add suffix –LF (e.g. MP3430HQ–LF–Z) **MPS is offering two different order codes, for this device we recommend MP3430HQ for our customers, both devices completely meet specifications PACKAGE REFERENCE EP 1234 12 11 10 9 PGND VIN EN NC FB NC MON2 AGNDMONIN SW SW PGND APD NC MON1 RLIM TOP VIEW QFN16 (3x3mm) ABSOLUTE MAXIMUM RATINGS (1) Continuous Power Dissipation (T A = +25°C) (2) Recommended Operating Conditions (3) Operating Junction Temp. (TJ). -40°C to +125°C Thermal Resistance (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 3 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (5) Parameters Symbol Condition Min Typ Max Units Minimum Operating Voltage V IN MIN 2.7 V Maximum Operating Voltage V IN MAX 5.5 V Under-Voltage Lockout Threshold VUVLO 2.4 2.6 2.7 V Under-Voltage Lockout Hysteresis VUVLOH 185 mV EN Threshold EN Rising 0.8 1.6 V EN Hysteresis 150 mV Feedback Voltage V FB 0.77 0.8 0.824 V Feedback Line Regulator R FBL 0.043 0.12 %/V FB-Pin Bias Current I FBB V FB=0.8V 30 100 nA FB=1V, Not switching 0.3 1.0 mA Supply Current I S VEN=0 0.1 0.5 μA Switching Frequency f S 1.0 1.3 1.55 MHz Maximum Duty Cycle D MAX 76 97 % Switch Current Limit I SLMT 0.6 0.9 1.3 A Switch RDSon VCESAT ISW=150mA 0.58 0.98 1.3 Ω Switch Leakage Current I SL SW=90V, EN=0 1.0 μA EN Pin Pull-Down Current I ENP EN=0V 0.2 μA IAPD=250nA 10V≤MONIN≤90V 0.09 0.10 0.11 APD-Current–Monitor Output1 Gain GCM1 IAPD=2.5mA 10V≤MONIN≤90V 0.095 0.10 0.105 mA/mA IAPD=250nA, 10V≤MONIN≤90V 0.45 0.5 0.55 APD;Current–Monitor Output2 Gain GCM2 IAPD=2.5mA, 10V≤MONIN≤90V 0.475 0.5 0.53 mA/mA Monitor-Output1–Voltage Clamp VMOC 250nA<I APD<2.5mA 2.2 3.5 V Monitor-Output2–Voltage Clamp V MOC 250nA<I APD<2.5mA 2.2 3.5 V APD-Monitor–Voltage Drop VADP MONIN – ADP at IAPD=1mA, MONIN=40V 1.0 1.32 2.0 V tdelay1 10μA to 1mA step APD current input 50 ns APD-Monitor-Current–Response Speed tdelay2 250nA to 10 μA step APD current input 7 μs APD-Pin Current Limit I MONINLMT APD=0V, MONIN=40V, RLIM=16.9kΩ 2.5 4.3 mA RLIM=27.2kΩ,, MONIN=10V, 2.25 3 RLIM=137kΩ ,MONIN=10V 0.375 0.625 mA RLIM=27.2kΩ,, MONIN=90V, 1.85 3 mA APD Current-Limit–Adjustment Range RLIM=137kΩ ,MONIN=90V 0.36 0.72 mA Thermal Shutdown 160 °C Thermal Shutdown Hysteresis 10 °C Notes: 5) The * denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA =+25°C. VIN=3.3V, VEN=3.3V unless otherwise noted.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 4 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1, 16 PGND Power Ground. Pins connected internally. For best performance, connect both pins to board ground. 2 V IN Input Supply. Locally bypass this pin. 3 EN Shutdown. Tie to 1.6V or higher to enabl e device; 0.6V or less to disable device. 4, 6, 11 NC Not Connected. 5 FB Feedback. Connect to t he output-resistor–divider tap. 7 MON2 Current-Monitor Output. It sources a current equal to 50% of the APD current and converts to a reference voltage through an external resistor. 8 AGND Analog Ground. 9 RLIM Current-Limit Resistor. Connect a resistor from RLIM to GND to program the APD current-limit threshold. 10 MON1 Current-Monitor Output. It sources a current equal to 10% of the APD current and converts to a reference voltage through an external resistor. 12 APD Connect to APD Cathode. 13 MONIN Current-Monitor Power Supply. Connect an external low-pass filter to further reduce supply voltage ripple. 14, 15 SW Switch. Minimize the trace length on this pin to reduce EMI. Exposed Pad GND. Solder to a large copper plane on the PCB.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 5 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 3.3V, VOUT = 50V, L = 2.2µH, TA = 25°C, unless otherwise noted.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 6 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 3.3V, VOUT = 50V, L = 2.2µH, TA = 25°C, unless otherwise noted.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 7 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 3.3V, VOUT = 50V, L = 2.2µH, TA = 25°C, unless otherwise noted.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 8 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 3.3V, VOUT = 50V, L = 2.2µH, TA = 25°C, unless otherwise noted.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 9 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. BLOCK DIAGRAM Ramp Generator R S Q 1.2MHz Oscillator APD Current Mirror VIN PWM Comparator EN FB VIN SW MONIN RLIM MON1 MON2 GND APD VIN GM FB FB Driver Error Amp L1 D1 COUT RFBB Avalanche Photo Diode RMON1 RMON2RLIM REN CEN VOUT RCOMP CCOMP800mV Reference CIN RC CC RFBT Figure 1: Functional Block Diagram
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 10 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved.
APPLICATION INFORMATION
The MP3430 step-up converter uses a constant- frequency, current-mode–control scheme to provide excellent line and load regulation. At the start of each oscillator cycle, the RS latch is set, which turns on the power switch. The output of current sense amplifier—which is proportional to the switching current—is added to a generated ramp. The resulting sum is fed into the positive terminal of the PWM comparator. The RS latch resets, turning off the power switch as soon as the positive terminal exceeds the level of negative input of PWM comparator— which is proportional to the difference between the feedback voltage and the reference voltage. As the load varies, the error amplifier sets the switching peak current necessary to supply the load and regulate the output voltage. MP3430 has an integrated high-side APD current monitor. The MON pin has an open-circuit protection feature and is internally clamped to 3V. MON1 and MON2 mirror the load current on the APD pin, and convert the currents to voltage signals through resistors R MON1 and R MON2. The current mirror ratios are set to be 1:10 and 1:2. The APD output current has over-current protection with a threshold programmed by an external resistor at the RLIM pin. APD Current-Limit Design The current limit can be adjusted from 0.5mA to 2.5mA. The current limit is linear with respect to the voltage applied to the RLIM pin, where: _RLIM _RLIMI (mA) -122 V 48 To program the voltage, connect a resistor from the RLIM pin to ground, where _RLIM APD, MAX 68R I R_RLIM units: kΩ I_RLIM units: mA EN Design Add a delay (typ. 1ms) to the EN pin so V IN can increase well beyond the UVLO value (typ. 2.6V) before the MP3430 turns on. For most applications, connect a 100kΩ resistor from V IN to EN and a 10nF capacitor from EN to GND. Soft-Start There is no need for a soft-start because V OUT rises very slowly—on the order of ms. The portion of the inductor current that actually drives up the output voltage is small due to the high conversion ratio. The inductor current limit (typ. 900mA), the output capacitor (typ. 0.1µF), and V IN limit the VOUT rise time. Component Design VOUT Programming A resistor feedback network programs the output voltage. Typically, the top resistor—from V OUT to VFB —is 1M Ω. The bottom resistor—from V FB to GND—is: FB BOTTOM TOP OUT FB VRR VV RTOP: kΩ RBOTTOM: kΩ In addition, place a series resistor and capacitor of 100kΩ and 100pF, respectively, in parallel with RTOP. This gives a phase boost for good phase margin as well as decreases the gain for good gain margin in the extreme cases of VIN and VOUT. Inductor Design There are three main considerations in inductor design: 1. Design “D3*t S” to be long enough for the reverse-inductor current to stop 2. Must always stay in discontinuous conduction mode (DCM) 3. The peak inductor current must be less than the current limit of the MP3430 and the saturation current of the inductor. Design D3×t s to be Long Enough for the Reverse-Inductor Current to Stop In DCM mode there are three modes: D1×tS: the switch is closed and current builds in the inductor, D2×tS: when the built-up current transfers to COUT
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 11 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. D3×tS: the L current reverses due to energy in the SW MOSFET capacitor followed by LC ringing. There is a “reverse current” – current going from the SW node back into VIN – during D3. VSW Negative Going Inductor Current Due to the applied high-output voltage on the switch node combined with the C DS capacitive coupling of the MP3430 FET, a significant reverse current flows through the inductor during the D 3 period. The energy stored in CDS transfers to the inductor. This negative inductor current turns the FET body diode on. V IN (combined with the negative voltage applied by the conducting body diode to the SW node) causes the inductor current to ramp up from the maximum negative going current to about 60% of that magnitude in the positive direction—where the positive current goes from V IN to the SW node, and the negative current feeds back into VIN through the inductor. Ringing current occurs after the current turns off the body diode. D 3 is always greater than the time for the current to turn off the FET body diode and to start ringing. Determine D 3 as per the following equations: MAX, REVERSE OUT 40pFIV L MAX,REVERSE Re verseCurrent IN,MIN
1.6 L It V1
OUT IN 2VKD2 . 2 1 14V 1I N OUT IN DVD VV 31 2D1 D D S3 Re verseCurrentDt t Where, SO U T OUT 2Lf IK V1 0 0 0 VOUT: V, L: µH, fS: MHz, IOUT: mA Staying in Discontinuous Conduction Mode (DCM) The system must operate in discontinuous conduction mode (DCM) to maintain stability due to the high conversion ratio from VIN to VOUT. A boost converter has a right-hand zero that can cause system instability if that zero moves into the system’s operational-frequency range. Furthermore the right hand zero moves into lower frequencies—where the system operates—as the conversion ratio increases. This right-hand zero does not exist when operating in DCM Stability therefore requires that the system operates in DCM under all conditions. To this end, a dimensionless parameter called K measures a system’s tendency to operate in DCM mode. The other parameter is K CRIT which is the DCM, CCM (continuous conduction mode) system boundary. If K<K CRIT, then the system is in DCM mode operation. ININ CRIT CCM CCM OUT OUT V2 VKDD 1 V V SO U T OUT 2Lf IK V1 0 0 0 DCM Mode: K < KCRIT: CRIT OUT SO U T K V 1000L 2f I VIN, VOUT: V L: µH f S: MHz IOUT: mA There is a size limit to the inductor that can cause the system to enter CCM mode and risk instability.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 12 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. The peak inductor current must always be less than the MP3430 current limit and the inductor saturation current. In addition, chose an inductor such that the saturation current is greater than either the IC current limit (900mA, typ.) or the worst-case calculated peak current—whichever is smaller. Generally, pick an inductor with at least 20% greater saturation current than the IC current limit, so that the minimum saturation current would be 1.08A (900mA + 180mA). To ensure that the calculated maximum current does not exceed the maximum current allowed by the MP3430. IN 1 L,PEAK S VDI9 0 0 m ALf , typical Diode Design Due to the high-output voltage combined with the diode capacitive coupling, there is a significant reverse current through the inductor. Generally, a low reverse bias capacitance equates to a low reverse inductor current. However, this is not always true though; so test the diodes prior to final selection. Two recommended diodes with relatively small reverse currents are the DFLS1150-7 (Diodes Inc, Schottky, 1A (avg), 150V) and the BAT46ZFILM (STMicroelectronics, Schottky, 150mA (avg), 100V) Also, select a diode with an RMS current rating greater than the actual RMS current. The maximum RMS current occurs when V IN is minimal (2.7V). The RMS current equation is: DIODE, RMS RMS PK DII I 3 D2 = fractional diode conduction period: 1I N OUT IN DVD VV IDIODE, IPK: mA RMON1, RMON2 Design The maximum allowed voltage on either R MON1 or RMON2 is 2.5V (typ). The maximum allowed current is 2.5mA (typ). For faster response, chose the maximum output less than the maximum allowed voltage. APD, MAX MON1 , MAX II 10 APD, MAX MON2, MAX II 2 MON1 , MAX MON1 MON1 , MAX VR I MON2, MAX MON2 MON2, MAX VR I Where: VMON1,MAX, VMON2,MAX < 2.5V RMON1,2: kΩ IMON1,2: mA COUT Design The output ripple is typically 0.1%. Use 0.1µF capacitor for most cases. Make sure that the capacitor voltage rating is at least 50% more than VOUT. The ripple equation is: APD 2 OUT,RIPPLE SO U T I( 1 D )V0 . 0 0 1 fC IAPD: mA fS: MHz COUT µF CIN Design If the C IN is not big enough, the initial current pulses will pull V IN down below UVLO during power start-up. This may cause false starts. Select a C IN of at least 10µF.
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 13 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. Recommended Values (VIN: 2.7V to 5.5V) VOUT (V) IOUT,MAX (mA) L (µH) RFB,TOP (MΩ) (VOUT to FB) RFB,BOTTOM (kΩ) (FB to GND) Diode (Schottky Small Signal) COUT (µF 100V) CIN (µF) 30 2.5 3.3 27.4 40 2.5 2.7 20.5 50 2.5 2.0 16.2 60 2.0 1.5 13.3 70 0.9 1.5 11.5 80 0.5 1.2 10.0 90 0.5 1.0 1.0 8.87 BAT46W 0.1 10 Design Example: Desired Parameters: VIN = 2.7V to 5.5V I APD,MAX = 2.5mA VIN,TYP = 3.3V V MON1,MAX = 0.5V VOUT = 50V V MON2,MAX = 0.5V VFB = 0.8V R TOP = 1MΩ fS = 1.3MHz; t S = 769ns Calculations: VOUT .MVV VRR FBOUT FB TOPBOTTOM 2168050 801 R_RLIM = 68 / IAPD,MAX = 68/2.5-= 27.2kΩ Inductor Choose L = 2.0µH First Consideration (most important) MAX,REVERSE OUTI V 40pF/L 50 40pF/ 2 H 224mA MAX,REVERSE Re verseCurrent IN,MIN 1.6 L I 1.6 2 H 224mAt 194ns V1 2 . 7 1 SO U T OUT 2Lf I 221 . 32 . 5K 0.00026V 1000 50 1000 2 2 OUT IN,MIN 2VK 0.00026 2 50D2 . 2 1 12 . 2 1 14V 4 2 . 7 0.639 IN OUT IN,MIN V 2.7D D 0.639 0.0365V V 50 2.7 31 2D 1 D D 1 0.639 0.0365 0.325
3 S Re verseCurrentD t 250ns t 194ns
So 2.0µH is good. Second Consideration IN,MIN IN,MIN2 CRIT OUT OUT CRIT,MIN OUT SO U T VVKD D ' 1 VV 2.7 2.71 0.0027650 50 K V 1000 0.00276 50 1000L2 1 H 2f I 2 1.3 2.5 KCRIT>K : 0.00276>0.00026. Third Consideration: IN,MIN 1 L,PEAK S VD 2.7 0.639I6 6 4 m A 9 0 0 m AL f 2.0 1.3 Make sure the inductor has at least 20% more capability than the saturation current DIODE D2 = diode conduction fraction of period = 0.0365 DIODE,RMS RMS PK D 0.0365I I I 664 73mA 33 Make sure diode average current rating is above this value Output Capacitor Choose COUT = 0.1µF APD 2 OUT,RIPPLE SO U T I( 1 D )V0 . 0 0 1 fC = 0.04% of VOUT ,<0.1%
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR MP3430 Rev 1.11 www.MonolithicPower.com 14 4/25/2013 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. Monitor Resistors Select VMON1 = VMON2 = 0.5V<2.5V RMON1 = VMON1 / IMON1,MAX = 0.5/0.25 = 2 kΩ RMON2 = VMON2 / IMON2,MAX = 0.5/1.25 = 400 Ω Input Capacitors Choose CIN = 10µF
MP3430 — 90V STEP-UP CONVERTER WITH APD CURRENT MONITOR NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP3430 Rev 1.11 www.MonolithicPower.com 15 4/25/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN16 (3X3mm) SIDE VIEW TOP VIEW 1613 8 5 BOTTOM VIEW 2.90 3.10 1.50 1.80 2.90 3.10 1.50 1.80 0.50 BSC 0.18 0.30 0.80 1.00 0.00 0.05
0.20 REF
1.70 0.50 0.25 RECOMMENDED LAND PATTERN
2.90 NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX . 4) DRAWING CONFORMS TO JEDEC MO -220, VARIATION VEED-4. 5) DRAWING IS NOT TO SCALE . PIN 1 ID SEE DETAIL A PIN 1 ID OPTION A 0.30x45º TYP . PIN 1 ID OPTION B R0.20 TYP. DETAIL A PIN 1 ID INDEX AREA 0.70 0.30 0.50