MP3120 MPS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 10

Technical content

1.2A, 1.1MHz Synchronous Boost Converter with Output Disconnect MP3120 Rev. 0.93 www.MonolithicPower.com 1 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. The Future of Analog IC Technology

DESCRIPTION

The MP3120 is a high efficiency synchronous, current mode step-up converter. The device can boost a single cell or two cells AA battery up to 5V. The MP3120 can start up from an input voltage as low as 0.8V and provide in-rush current limiting as well as output short circuit protection. The integrated P-Channel synchronous rectified switch provides improved efficiency and eliminates the need of an external schottky diode. The P-MOS will disconnect the output from the input when EN is low. This output disconnect feature allows the output to be completely discharged, thus allowing the part to draw less than 1uA off current in shutdown mode. The 1.1MHz switching frequency allows for smaller external components; the internal compensation and soft start minimize the external component count, all helps to produce a compact solution for a wide range of load current. The MP3120 features an integrated power MOSFET that supports up to 5V output and a typical 1.2A switch current. The device also can maintain the output voltage regulated even when the input voltage is above the output voltage. The MP3120 is offered in a 6-lead ThinSOT23 package

FEATURES

  • Up to 96% Efficiency
  • True Output Disconnect from Input
  • Inrush Current Limiting and Internal Soft- Start
  • 0.8V Low Voltage Start-Up
  • Internal Synchronous Rectifier
  • Current Mode Control with Internal Compensation
  • Short-Circuit Protection
  • 1.1MHz Fixed Frequency Switching
  • 0.8V to 5V Input Range
  • 2.5V to 5V Output Range
  • Tiny External Components
  • Small 6-lead ThinSOT Package APPLICATION
  • Single-cell, Two-cell and Three-cell Alkaline, NiCd or NiMH or single-cell Li Battery Consumer Products
  • MP3 Players
  • Wireless Mouse
  • Audio Recorders “Monolithic Power Systems”, “MPS”, and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION SW IN FB EN OUT GND VIN VOUT NC NC 3.3V ON/OFF Efficiency VOUT=3.3V EFFICIENCY (%) OUTPUT CURRENT (mA) 100 1 10 100 1000 VIN=1V VIN=2V VIN=3V VIN=4.4V

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 2 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number* Package Top Marking Free Air Temperature (TA) MP3120DJ TSOT23-6 9A -40°C to + 85°C * For Tape & Reel, add suffix –Z (eg. MP3120DJ–Z). For RoHS compliant packaging, add suffix –LF (eg. MP3120DJ–LF–Z) PACKAGE REFERENCE SW GND FB IN OUT EN TOP VIEW ABSOLUTE MAXIMUM RATINGS (1) V Continuous Power Dissipation (TA=+25°C) (2) Recommended Operating Conditions (3) Thermal Resistance (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB.

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 3 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VIN =1.8V, VOUT=5V. TA=25°C. VEN=5V, unless otherwise noted. Notes: 5) Minimum V IN operation after start-up is limited by the battery’s ability to provide the necessary power as it enters a deeply discharged state. PIN FUNCTIONS Pin # Name Pin Function 1 SW Output switch node. SW is the drain of the internal N-Channel and P-Channel MOSFETs. Connect the inductor to SW to complete the step-up converter.

2 GND Ground

3 FB Feedback input to the error amplifier. Connect resistor divider to this pin. The output voltage can be adjusted from 2.5V to 5V by: VOUT =1.2V* [1 + (R1/R2)] 4 EN Regulator on/off control input. A logic high input (VEN>0.5V) turns on the regulator. A logic low input (VEN<0.17V) turns off the regulator.

5 OUT

Output node. OUT is the source of the P-Channel MOSFET. Connect the OUT pin to the output of the converter. The output capacitor must be as close as possible to the IC and provide shortest PCB trace loop between IC OUT pin and GND pin.

6 IN Input node

Parameters Symbol Condition Min Typ Max Units Minimum Startup Voltage V ST V OUT=0V 0.7 0.85 V Minimum Operating Voltage(5) V IN V EN=VIN 0.3 0.52 V Feedback Voltage V FB 1.17 1.21 1.25 V Feedback Input Current I FB V FB=1.2V 0.9 100 nA Quiescent Current (Active) IQ Measured on V OUT , VFB=1.3V, No Switching 470 600 μA Quiescent Current(Shutdown) I Q_SHDN Measured on V IN, VOUT=0V 0.1 1 uA NMOS Switch On Resistance R N-MOS(on) 290 m Ω PMOS Switch On Resistance R P-MOS(on) 530 m Ω NMOS Switch Leakage V SW=VIN=6V 0.1 5 uA PMOS Switch Leakage V SW=0V, VOUT=6V 0.1 1 uA NMOS Current Limit I LIM(close) 1.2 A PMOS Current Limit I LIM(open) 1.2 A Maximum Duty Cycle D MAX V FB=1.1V 85 91.5 98 % Minimum On Time T (on)min 120 ns Switching Frequency f SW 865 1050 1155 kHz EN Input High V EN 0.7 V EN Input Low V EN 0.15 V Soft-Start Time T S 0.7 1.6 2.6 ms

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 4 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS C1=10μF, C2=C3=4.7μF, L1=4.7μH, TA=25°C, unless otherwise noted. Efficiency vs. Output Current VOUT=3.3V OUTPUT CURRENT(mA) EFFICIENCY(%) 40us/div 1us/div 1us/div 1us/div Steady Waveform VIN=2.5V, VOUT=3.3V, IOUT=0mA Steady Waveform VIN=4.4V, VOUT=3.3V, IOUT=0mA Steady Waveform VIN=4.4V, VOUT=3.3V, IOUT=500mA Steady Waveform VIN=2.5V, VOUT=3.3V, IOUT=500mA 100 1 10 100 1000 VIN=4.4V VIN=1V VIN=3V VIN=2V VIN 1V/div VOUT 2V/div IL 0.5V/div SW2V/div VIN 2V/div VOUT 2V/div IL 0.5V/div SW2V/div VIN 2V/div VOUT 2V/div IL 0.5V/div SW2V/divSW2V/div VIN 1V/div VOUT 2V/div IL 0.5V/div Efficiency vs. Output Current VOUT=5V OUTPUT CURRENT(mA) EFFICIENCY(%) 100 1 10 100 1000 Load Regulation vs. Output Current VOUT=3.3V OUTPUT CURRENT(mA) 1 10 100 1000 -1.4 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 LOAD REGULATION (%) VIN=1V VIN=1V VIN=2V VIN=2V VIN=4.4V VIN=3V VIN=3V Current Limit 0.4 0.6 0.8 1.2 1.4 1.6 1.8 20 25 30 35 40 45 50 55 60 65 DUTY (%) CURRENT LIMIT (A)

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 5 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) C1=10μF, C2=C3=4.7μF, L1=4.7μH, TA=25°C, unless otherwise noted. Short Circuit and Recovery VIN=3V Load Transient Waveform VIN=2.5V,VOUT=3.3V, IOUT=0mA to 200mA VIN Startup VIN=2.5V,VOUT=3.3V,IOUT=500mA VIN 2V/div SW 2V/div IL 0.5A/div VOUT 2V/div VIN 2V/div SW 2V/div IL 0.5A/div VOUT 2V/div 20ms/div 20ms/div 20ms/div Short Circuit Steady Waveform VIN=3V 200ms/div ILOAD 200mA/div VOUT/AC 50mV/div EN Startup VIN=2.5V,VOUT=3.3V,IOUT=500mA VIN Shut down VIN=2.5V,VOUT=3.3V,IOUT=500mA EN Shut down VIN=2.5V,VOUT=3.3V,IOUT=500mA VEN 5V/div SW 2V/div IL 0.5A/div VOUT 2V/div VEN 5V/div SW 2V/div IL 0.5A/div VOUT 2V/div 20ms/div VIN 2V/div SW 2V/div IL 0.5A/div VOUT 2V/div VIN 2V/div SW 2V/div IL 0.5A/div VOUT 2V/div

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 6 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. BLOCK DIAGRAM Reference Oscillator Logic Driver _ ƒ† + Current Sense Amplifier Error Amplifier EN FB IN OUT SW GND Figure 1— Function Block Diagram OPERATION The MP3120 is a 1.1MHz synchronous boost converter housed in a TSOT-23 package, it is able to operate from an input voltage as low as 0.8V. The device features fixed frequency, current mode PWM control, true output disconnection, and short circuit protection. Detailed descriptions of the different operating modes can be seen as follow. Operation can be best understood by referring to the Function Block Diagram. Low Voltage Start-Up The MP3120 includes an independent start-up oscillator designed to start up at input voltage of 0.8V.In this mode, the IC operates with about 65% duty cycle and open-loop. Once the output voltage exceeds 2.3V, the start-up circuit is disabled and normal close-loop PWM operation is initiated. In normal mode, the MP3120 is powered by V OUT instead of V IN. This feature allows the battery voltage to drop even below 0.8V without affecting the circuit operation. The only limiting factor in the application becomes the ability of the battery to supply sufficient energy to the output. Soft-start and inrush current limiting are provided during start-up as well as normal mode operation. Device Enable The device starts to work when EN is higher than 0.5V. And it shuts down when EN is lower than 0.17V. In shutdown mode, the regulator stops switching, all internal control circuit is off, and the load is disconnected from the input. Error Amp The error amplifier is an internally compensated transconductance type amplifier. The internal 1.2V reference voltage is compared with the voltage at the FB pin to generate an error signal at the output of the error amplifier.

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 7 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. Current Sensing Lossless current sensor converts the N-MOS switch current signal to a voltage signal and it is summed with the internal slope compensation. The summed signal is compared with the error amplifier output to provide a series of PWM signal. The current limit threshold is about 1.2A which is independent of input and output voltage. The switch current signal is blanked for 60ns to enhance noise rejection. Synchronous Rectifier The P-MOS synchronous rectifier is only enabled when V OUT > (VIN + 0.1V) and the FB pin is above 800mV. Thermal Shutdown An internal temperature monitor will start to reduce the peak current limit if the die temperature exceeds 125ºC. If the die temperature continues to rise and reaches to 160ºC, the part will thermally shutdown, all switches will be turned off. The part will be enabled again when the die temperature drops by about 20ºC. Output Disconnect and Inrush Current Limiting The MP3120 is designed to allow true output disconnect by eliminating body diode conduction of the internal PMOS rectifier. This allows VOUT to go to zero volts during shutdown, and drawing zero current from the input source. It also allows for inrush current limiting during start-up, minimizing surge currents from the input. Note that to obtain the advantage of output disconnect, there must be no external schottky diode connected between the SW pin and OUT pin. Board layout is extremely critical to minimize voltage spike on SW pin caused by stray inductance. Keep the output filter capacitors as close as possible to the OUT pin and use very low ESR/ESL ceramic capacitors tied to a good ground plane. Short Circuit Protection Unlike most boost converters, the MP3120 allows the output to be short circuit due to the output disconnect feature. The device incorporates internal features such as current limit feedback, thermal regulation and thermal shutdown to prevent the chip from burning out caused by excessive overload or short circuit. In the event of a short circuit, the current limit reduces to a smaller value. The thermal protection circuit also functions in addition to the current limit in case of the device temperature rise up to above 125ºC. V OUT< VIN Operation The MP3120 maintains the output voltage to be regulated even if the input voltage is above the output voltage. In this mode the P-MOS no longer acts as a low impedance switch, there will be more power dissipation within the IC. This will cause a sharp drop in the efficiency. The maximum output current should be limited in order to maintain an acceptable junction temperature.

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 8 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.

APPLICATION INFORMATION

Setting the Output Voltage The external voltage divider from OUT to GND programs the output voltage via FB from 2.5V to 5V according to the formula: OUTV= 1 . 2 V R11+R2 Setting the Inductor The inductor with 1.6A current rating and low DC resistance is recommended. The inductance value can be calculated from the following formula: V( V V )IN IN OUTL V Δif sLOUT Where ΔiL is the inductor current ripple. It is recommended the inductor current ripple to be around 30%~50% of the input current. Setting the Input Capacitor The input capacitor (C1) is required to maintain the DC input voltage. Ceramic capacitors with low ESR/ESL types are recommended. The input voltage ripple can be estimated by: VVIN INΔV( 1 ) 2IN V8f LC OUTs 1 =× − ×× × Typically, a 10 μF X7R ceramic capacitor is recommended. Setting the Output Capacitor The output current to the step-up converter is discontinuous, therefore a capacitor is essential to supply the AC current to the load. Use low ESR capacitors for the best performance. Ceramic capacitors with X7R dielectrics are highly recommended because of their low ESR and small temperature coefficient. The output voltage ripple can be estimated by: OUT OUT 2S L O U T VV OUTΔ (1 ) CfR V V =× − Typically, a 10 μF X7R ceramic capacitor is recommended. RC Snubber Circuit When the chip is used in V OUT=5V condition, a RC snubber should be added to protect the MOSFET from over voltage. The recommended parameters are R3=5.1 Ω, C5=1nF. The circuit can be seen in Figure 2. SW IN FB EN OUT GND VIN VOUT 1nF 0.8V~5V ON/OFF Figure2—V OUT=5V Typical Application Circuit

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST MP3120 Rev. 0.93 www.MonolithicPower.com 9 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved. PCB Layout PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure 3 for references. 1) The output capacitor should be placed as close as possible to IC and forms a smallest loop with IC SW and GND pins. as C4 shown in figure2. 2) Adding RC snubber circuit from SW pin to GND pin to reduce the SW spike in 5V application. 3) Route SW away from sensitive analog areas such as FB. L1C1 C2 C3R1 R3C5 Top Layer Bottom Layer Figure3—PCB Layout

MP3120-1.2A, 1.1MHz SYNCHRONOUS BOOST NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP3120 Rev. 0.93 www.MonolithicPower.com 10 9/20/2011 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2011 MPS. All Rights Reserved.

PACKAGE INFORMATION

0.30 0.50 SEATING PLANE

0.95 BSC

0.84 0.90 1.00 MAX 0.00 0.10 TOP VIEW FRONT VIEW SIDE VIEW RECOMMENDED LAND PATTERN 2.80 3.00 1.50 1.70 2.60 3.00 0.09 0.20 NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX . 5) DRAWING CONFORMS TO JEDEC MO -193, VARIATION AB . 6) DRAWING IS NOT TO SCALE . 7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK FROM LEFT TO RIGHT , (SEE EXAMPLE TOP MARK ) 0.30 0.500o-8o

0.25 BSC

2.60 TYP 1.20 TYP 0.95 BSC 0.60 TYP SEE DETAIL "A" DETAIL 揂 AAAAPIN 1 See Note 7 EXAMPLE TOP MARK