MP2176GL MPS | Alldatasheet
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Technical content
6V, 6A, High-Efficiency, Synchronous Step-Down Converter MP2176 Rev. 1.0 www.MonolithicPower.com 1 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
DESCRIPTION
The MP2176 is a monolithic, step-down, switch- mode converter with internal power MOSFETs that can achieve up to 6A of continuous output current from a 1.5V to 6V input voltage with excellent load and line regulation. The output voltage can be regulated as low as 0.61V. Constant-on-time (COT) control provides fast transient response and eases loop stabilization. Fault condition protections include cycle -by- cycle current limiting and thermal shutdown. The operating frequency is programmed by an external resistor and is compensated for variations in VIN. Full protection features, including over-current protection (OCP), short-circuit protection (SCP), over-voltage prot ection ( OVP), under-voltage protection ( UVP), and over-temperature protection ( OTP), are provided by internal comparators. The MP2176 requires a minim al number of readily available , standard, external components and is available in a QFN-14 (3mmx4mm) package.
FEATURES
1.5V to 6V Wide Input Range 3V to 6V VCC Operating Supply 6A Output Current Programmable Switching Frequency from 300kHz to 1MHz Low RDS(ON) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique 1% Reference Voltage Over -20°C to +85°C Junction Temperature Range Pre-Bias Start-Up Minimum On Time (TON_MIN = 60ns) Minimum Off Time (TOFF_MIN = 100ns) Non-Latch OCP, Non-Latch OVP, and Thermal Shutdown Output Adjustable from 0.61V to 4.5V Programmable Soft-Start Time Available in a QFN-14 (3mmx4mm) Package
APPLICATIONS
Flat-Panel Television and Monitors Telecom System Base Stations Distributed Power Systems Personal Video Recorders Networking Systems Servers All MPS parts are lead -free, halogen -free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP2176 RBST C2C4R4 VOUTL1 RFREQ VIN INFREQ BST SW FB VCC PG VCC PG ENEN SS C6 PGND AGND
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 2 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking MP2176GL QFN-14 (3mmx4mm) See Below * For Tape & Reel, add suffix –Z (e.g.: MP2176GL–Z) TOP MARKING MP: MPS prefix Y: Year code W: Week code 2176: First four digits of the part number LLL: Lot number PACKAGE REFERENCE TOP VIEW 7 8 9 101112 13 14 SW SW FREQ IN IN AGND FB SS EN VCC PG BST GND GND EXPOSED PAD ON BACKSIDE QFN-14 (3mmx4mm)
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 3 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) Continuous power dissipation (TA = +25°C) (2) Recommended Operating Conditions (3) Operating junction temp. (TJ). .. -40°C to +125°C Thermal Resistance (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J(MAX), the junction -to- ambient thermal resistance θ JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)- TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 4 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 5V, TJ = -40 to +125°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Supply current (shutdown) IIN VEN = 0V 1 2 μA Supply current (quiescent) IIN VEN = 2V, VFB = 1V 0.6 1.05 1.3 mA High-side switch on resistance HSRDS(ON) TJ = 25°C 19.8 mΩ Low-side switch on resistance LSRDS(ON) TJ = 25°C 15.3 mΩ Switch leakage SWLKG VEN = 0V, VSW = 0V or 5V 0.01 3 μA High-side current limit ILIMIT 9.5 12 14.5 A One-shot on time tON RFREQ = 165kΩ, VOUT = 1.2V 200 ns Minimum off time tOFF 50 100 150 ns Foldback timer (5) tFOLDBACK OCP occurs 2.5 μs OVP threshold VOVP 110% 120% 130% V OVP delay (5) tOVP 1 μs UVP threshold (5) VUVP 50% VREF Reference voltage VREF TJ = -20°C to +85°C 604 610 616 mV TJ = -40°C to +125°C 601 610 619 Feedback current IFB VFB = 610mV 0.001 150 nA Soft-start charging current ISS VSS = 0V 5 7.5 10 μA Enable input low voltage VILEN 1.4 1.8 V Enable hysteresis VEN-HYS 890 mV Enable input current IEN VEN = 2V 1.5 2 μA VEN = 0V 0.01 1 VCC under-voltage lockout threshold rising VCCVth 2.3 2.8 2.95 V VCC under-voltage lockout threshold hysteresis VCCHYS 300 mV Power good rising threshold PGVth-Hi 84% 90% 96% VREF Power good falling threshold PGVth-Lo 63% 70% 73% VREF Power good deglitch timer PGTd TSS = 1ms 2000 5000 μs Power good sink current capability VPG Sink 4mA 0.4 V Power good leakage current IPG_LEAK VPG = 3.3V 50 150 nA Thermal shutdown (5) TSD 150 160 °C Thermal shutdown hysteresis 25 °C NOTE: 5) Guaranteed by design.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 5 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 6 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section . VIN = 5V, VOUT = 1.2V, L = 1.0µH, TA = +25°C, unless otherwise noted.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 7 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section . VIN = 5V, VOUT = 1.2V, L = 1.0µH, TA = +25°C, unless otherwise noted.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 8 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section . VIN = 5V, VOUT = 1.2V, L = 1.0µH, TA = +25°C, unless otherwise noted.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 9 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section . VIN = 5V, VOUT = 1.2V, L = 1.0µH, TA = +25°C, unless otherwise noted.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 10 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section . VIN = 5V, VOUT = 1.2V, L = 1.0µH, TA = +25°C, unless otherwise noted.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 11 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PIN FUNCTIONS PIN # Name Description 1 AGND Analog ground. 2 FB Feedback. The output voltage is set by an external resistor divider from the output to GND tapped to FB. The resistor divider should be placed as close to FB as possible. Avoid placing vias on the FB traces. 3 SS Soft start. Connect an external capacitor to SS to program the soft -start time for the switch-mode regulator. 4 EN Enable. Pull EN higher than 1.8V to enable the chip . For automatic start-up, connect EN to VIN with a 100kΩ resistor. EN can be used to set the on/off threshold (adjust UVLO) with two additional resistors.
5 VCC
External bias supply voltage for the driver and control circuits. For 1.5V to 3V input applications, provide VCC with a separate 3.3V/5V bias supply. For 3V to 6V input applications, provide VCC with a separate 3.3V/5V bias supply or tie VCC to V IN with a 10Ω resistor. Decouple VCC with a minimum 4.7µF ceramic capacitor placed as close to VCC as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. 6 PG Power good output . PG is high if the output voltage is higher than 90% of the nominal voltage. There is a delay from the time FB becomes greater than or equal to 90% to when PG goes high. 7 BST Bootstrap. A capacitor connected between SW and BS T is required to form a floati ng supply across the high-side switch driver. 8 - 9 GND System ground. GND is the reference ground of the regulated output voltage. For this reason, care must be taken during the PCB layout. 10 - 11 IN Supply voltage. IN supplies power for the internal MOSFET and regulator. The MP2176 operates from a +3V to +6V input rail. An input capacitor is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection.
12 FREQ
Frequency setting. A resistor con nected between FREQ and IN is required to set the switching frequency. The on time is determined by the input voltage and the resistor connected to FREQ. IN connect ed through a resistor is used for line feed -forward and makes the frequency constant during the input voltage ’s variation. It is recommend to use a 10pF decoupling capacitor from FREQ to GND. 13 - 14 SW Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to VIN by the high -side switch during the on time of the PWM duty cycle. The inductor current drives SW negative during the off time. The on resistance of the low-side switch and the internal Schottky diode fixes the negative voltage. Use wide PCB traces to make the connection.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 12 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. BLOCK DIAGRAM 0.61V 0.3V 0.75V FREQ VCC EN SS FB PG IN BST SW GND AGND RSEN HS-FETHS Driver LS-FETLS Driver Current Modulator LOGIC Current Sense Amplifer Refresh Timer OCOver-Current Timer xS xR Q PWM BSTREG OFF Timer ILIM HS Limit Comparator START ON TimerLoop Comparator UV OV UV Detect Comparator OV Detect Comparator PGOOD Comparator SOFT START/STOP REFERENCE 1MEG VCC Figure 1: Functional Block Diagram
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 15 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Over-Current Protection (OCP) The MP2176 enters over-current protection (OCP) mode when the inductor current reaches the current limit and attempts to recover from the over-current fault with hiccup mode. In OCP, the chip disables the output power stage, discharges the soft-start cap acitor, and then attempts to soft-start again automatically. If the over-current condition still remains after the soft start ends, the chip repeats this operation cycle until the over-current condition is removed and the output rises back to the regulation level. The MP2176 also operates in hiccup mode when a short circuit occurs. Power Good (PG) The MP2176 has a power-good (PG) output that can be connected to VCC or another voltage source through a resistor (e.g. : 100kΩ). When the MP2176 is powered on , and VFB is above 90% of VREF, PG is pulled high. When VFB drops to 70% of VREF or the part is not powered on, PG is pulled low. Soft Start/Stop (SS) The MP2176 employs a soft-start/-stop (SS) mechanism to ensure a smooth output during power-up and power-down. When EN rises high, an internal current source (8μA) ch arges up the SS capacitor (C6). The SS capacitor voltage takes over VREF to the PWM comparator. The output voltage ramps up smoothly with the SS voltage (VSS). Once VSS reaches the same level as VREF, VSS continues ramping up while VREF takes over the PWM comparator. At this point, the soft start finishes , and the device enters steady-state operation. When EN is pulled low, the SS cap voltage is discharged through an 8 µA internal current source. Once VSS reaches VREF, it takes ov er the PWM comparator. The output voltage decreases smoothly with VSS until it reaches zero. The SS capacitor value can be determined with Equation (9): SS SS SS REF t (ms) I ( A)C (nF) V (9) If the output capacitors have a large capacitance value, the SS time should not be too small. Otherwise, the current limit can be reached easily during SS. A minimum value of 4.7nF should be used if the output capacitance value is larger than 330μF. Over-/Under-Voltage Protection (OVP/UVP) The MP2176 has non-latching over-voltage protection (OVP). The device monitors the output voltage through a resistor divide r VFB to detect an over-voltage condition on the output. When VFB is higher than 120% of VREF (0.610V), the LS -FET is turned on while the HS -FET is off. The LS-FET remains on until it reaches the negative current limit and turns off for 100ns. If the over-voltage condition still remains, the chip repeats this operation cycle until VFB drops below 110% of VREF. When VFB is below 50% of VREF (0.610V), this is recognized as an under-voltage (UV) condition. Usually, under-voltage protection (UVP) is caused by an over -current (OC) condition and results in over-current protection (OCP). Configuring the EN Control EN provides an electrical on/ off control of the device. Drive EN high to turn on the regulator . Drive EN low to turn off the regulator . Do not float EN. For automatic start -up, EN can be pulled up to the input voltage through a resistive voltage divider. Determine the automatic start -up voltage by choosing the values of the pull -up resistor (RUP from IN to EN) and the pull -down resistor (RDOWN from EN to GND) with Equation (10): UP DOWN IN START DOWN RRV 1.4 R (10) For example, when RUP = 100kΩ and R DOWN = 51kΩ, VIN-START is 4.15V. To prevent noise, use a 10nF ceramic capacitor from EN to GND. Pre-Bias Start-Up If the output is pre -biased to a certain voltage during start -up, the MP2176 disables the switching of both the high-side and low-side switches until the voltage on the internal soft-
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 16 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. start capacitor exceeds the sensed output voltage at FB. There is an internal Zener diode on EN, which clamps the EN voltage to prevent a runaway. Assuming a worst-case 6V internal Zener clamp , the maximum pull -up current should be less than 1mA. Therefore, when EN is driven by an external logic signal, the EN voltage should be lower than 6V . When EN is connected to IN through a pull -up resistor or a resistive voltage divider, the resistance selection should ensure that the maximum pull- up current is less than 1mA. If using a resistive voltage divider and an IN value higher than 6V, th e allowed minimum pull-up resistor (RUP) should meet Equation (11): IN UP DOWN V (V) 6 6 1 (mA)R (k ) R (k ) As a result, when only RUP is applied, VIN-START is determined by the input under-voltage lockout ( UVLO). The value of R UP can be calculated with Equation (12): IN UP V (V) 6R (k ) 1 (mA) (12) A typical pull-up resistor is 100kΩ. Thermal Shutdown Thermal shutdown is employed in the MP2176. The junction temperature of the IC is monitored internally. If the junction temperature exceeds the threshold value ( minimum 150°C), the converter shuts off. This is a non-latch protection. There is a hysteresis of about 25°C. Once the junction temperature drops to about 125°C, a soft start-up is initiated. Under-Voltage Lockout (UVLO) Protection The MP2176 has a UVLO protection. When VCC is higher than the UVLO rising threshold voltage, the MP2176 is powered up. The MP2176 shuts off when VCC is lower than the UVLO falling threshold voltage. This is a non- latch protection. The MP2176 is disabled when VCC falls below its UVLO falling threshold ( 2.45V). If an application requires a higher UVLO, use EN to adjust the input voltage UVLO by using two external resistors (see Figure 6) . It is recommended to use the EN resistors to set the UVLO falling threshold (VSTOP) above 2.8V. The rising threshold (V START) should be set to provide enough of a hysteresis to allow for any input supply variation. Figure 6: Adjustable UVLO
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 18 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Cdc is suggested to be at least 10 times larger than C4 for better DC blocking performance . Cdc should be no larger than 0.47μF, considering the start-up performance. For better FB noise immunity, combine a larger Cdc with a reduced R1 and R2 to limit the Cdc to a reasonable value without affecting system start- up. Note that even when the Cdc is applied, the load and line regulation are still related to VRAMP. Ceramic SW FB VoL Cdc R4 C4 Figure 9: Simplified Circuit of a Ceramic Capacitor with a DC Blocking Capacitor Selecting the Input Capacitor The input current to t he step-down converter is discontinuous and therefore requires a capacitor to supply AC current to the step-down converter while maintaining the DC input voltage. Ceramic capacitors are recommended for the best performance. In the layout, place the input capacitors as close to IN as possible. The capacitance varies significantly with the temperature. Capacitors with X5R and X7R ceramic dielectrics are recommended because they are fairly stable over-temperature. The capacitors must also have a ripple current rating greater than the maximum input ripple current of the converter. The input ripple current can be estimated with Equation (18): OUT OUT CIN OUT IN IN The worst-case condition occurs at VIN = 2VOUT, shown in Equation (19): OUT CIN II 2 (19) For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitance value determines the input voltage ripple of the converter. If there is an input voltage ripple requirement in the system design, choose an input capacitor that meets the specification The input voltage ripple can be estimated with Equation (20): OUT OUT OUT IN SW IN IN IN The worst-case condition occurs at VIN = 2VOUT, shown in Equation (21): OUT IN SW IN Selecting the Output Capacitor The output capacitor is required to maintain the DC output voltage. Ceramic or POSCAP capacitors are recommended. The output voltage ripple can be estimated with Equation (22): OUT OUT OUT ESR SW IN SW OUT (22) In the case of ceramic capacitors, the impedance at th e switching frequency is dominated by the capacitance. The output voltage ripple is caused mainly by the capacitance. For simplification, the output voltage ripple can be estimated with Equation (23): OUT OUT OUT 2 INSW OUT The output voltage ripple caused by the ESR is very small and therefore requires an external ramp to stabilize the system. The external ramp can be generated through a resistor (R4) and capacitor (C4) following Equation (4), Equation (7), and Equation (8). In the case of POSCAP capacitors, the ESR dominates the impedance at the switching frequency. The ramp voltage generated from the ESR is high enough to stabilize the system and therefore does not require an external ramp. A minimum ESR value (calculated with Equation (3)) is required to ensure stable operation of the converter.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 19 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. For simplification, the output ripple can be approximated with Equation (24): OUT OUT OUT ESR SW IN Selecting the Inductor An inductor is required to supply constant current to the output load while being driven by the switching input voltage. A larger -value inductor results in less ripple current and lower output ripple voltage but also has a larger physical size, higher series resistance, and lower saturation current. A good rule for determining the inductor value is to allow the peak-to-peak ripple current in the inductor to be approximately 10 ~ 30% of the maximum output current. Also, ensure that the peak inductor current is below the current limit of the device . The inductance value can be calculated with Equation (25): OUT OUT SW L IN Where ∆IL is the peak -to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated with Equation (26): OUT OUT LP OUT SW IN The inductors listed in Table 1 are highly recommended for the high efficiency they can provide. Typical Design Parameter Tables The tables on page 20 include recommended component values for typical output voltages (1.0V, 1.2V, 1.8V, 3.3V ) and switching frequencies (600kHz, 800kHz, 1MHz). Refer to Table 2 and Table 3 for design cases without external ramp compensation . Refer to Table 4 and Table 5 for design cases with external ramp compensation. An external ramp is not required when high ESR capacitors, such as electrolytic or POSCAPs, are used. An external ramp is required when low ESR capacitors, such as ceramic capacitors , are used. For cases not listed in this datasheet, a calculator in an Excel spreadsheet can also be requested through a n MPS sales representative to assist with the calculation.
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 20 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. Table 1: Inductor Selection Guide Part Number Manufacturer Inductance (µH) DCR (mΩ) Current Rating (A) Dimensions L x W x H (mm3) Switching Frequency (kHz) Table 2: COUT POSCAP, 600kHz, 5VIN VOUT (V) L (μH) (kΩ) (kΩ) (kΩ) 1.0 1.0 19.8 30 300 1.2 1.0 29.4 30 365 1.5 1.0 29.4 20 453 1.8 1.0 39.2 20 549 3.3 1.0 44.2 10 1000 Table 3: COUT POSCAP, 800kHz, 5VIN VOUT (V) L (μH) (kΩ) (kΩ) (kΩ) 1.0 0.75 20 30 210 1.2 0.75 20 20 270 1.5 0.75 30 20 330 1.8 0.75 39 20 499 3.3 0.75 44.2 10 750 Table 4: COUT Ceramic, 600kHz, 5VIN VOUT (V) L (μH) (kΩ) (kΩ) (kΩ) (pF) (kΩ) 1.0 1.0 21 30 240 470 309 1.2 1.0 33 30 220 470 365 1.5 1.0 51 30 330 390 464 1.8 1.0 45 20 270 470 549 3.3 1.0 62 10 160 680 953 Table 5: COUT Ceramic, 800kHz, 5VIN VOUT (V) L (μH) (kΩ) (kΩ) (kΩ) (pF) (kΩ) 1.0 0.75 21 30 200 470 226 1.2 0.75 34 30 200 470 270 1.5 0.75 34 20 220 470 324 1.8 0.75 47.5 20 225 470 402 3.3 0.75 57.6 10 200 560 750
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER MP2176 Rev. 1.0 www.MonolithicPower.com 22 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT MP2176 C1E RBST C2A VOUTL1 RFREQ VIN INFREQ BST SW FB VCC PG VCC PG ENEN SS C6 PGND AGND 100kΩ 4.7µF 22µF 22µF 22µF 22µF C1A C1B C1C C1D 0.1µF 33nF C2B 220µF/ 20mΩ 0.1µF 1µH 29.4kΩ 30kΩ Figure 13: Typical Application Circuit with No External Ramp, VIN = 5V, VOUT = 1.2V, IOUT = 6A, fSW = 600kHz
MP2176 – 6V, 6A, SYNCHRONOUS, STEP-DOWN CONVERTER NOTICE: The information in this document is subject to change without notice. Please cont act MPS for current specifications. Users should warrant and guarantee that third party I ntellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2176 Rev. 1.0 www.MonolithicPower.com 23 4/17/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
PACKAGE INFORMATION
QFN-14 (3mmx4mm) SIDE VIEW BOTTOM VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. PIN 1 ID MARKING TOP VIEW PIN 1 ID INDEX AREA RECOMMENDED LAND PATTERN 0.1x45