MP2018GZD-33 MPS | Alldatasheet
Document overview
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Technical content
16V, 500mA, Low Quiescent Current Linear Regulator MP2018 Rev. 1.0 www.MonolithicPower.com 1 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
DESCRIPTION
The MP2018 is a low -power linear regulator that supplies power to systems with high - voltage batteries. The MP2018 includes a wide 3V to 16V input voltage range, low dropout voltage, and low quiescent supply current. The low quiesce nt current and low dropout voltage allow the MP2018 to operate at extremely low power levels. Therefore, the MP2018 is ideal for low-power microcontrollers and battery- powered equipment. The MP2018 provides two fixed output voltage options: 3.3V and 5.0V. The regulator output current is limited internally, and the device is protected against short-circuit, overload, and over-temperature conditions. The MP2018 also includes thermal shutdown and current-limiting fault protection. The MP2018 is available in a TO252-5 package.
FEATURES
3V to 16V Input Range 10µA Quiescent Supply Current Stable with Low-Value Output Ceramic Capacitor (>0.47μF) 500mA Specified Current Fixed Output Voltage Output ±2% Accuracy Specified Current Limit Power Good Programmable Power Good Delay Thermal Shutdown and Short-Circuit Protection (SCP) -40°C to +150°C Specified Junction Temperature Range Available in a TO252-5 Package
APPLICATIONS
Portable/Battery-Powered Equipment Ultra-Low Power Microcontrollers Cellular Handsets Medical Imaging All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION IN OUT PG GND VOUT PGD MP2018 VIN
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 2 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking MP2018GZD-33 TO252-5 See Below MP2018GZD-5 TO252-5 See Below * For Tape & Reel, add suffix –Z (e.g.: MP2018GZD-5–Z). TOP MARKING (MP2018GZD-33) MPS: MPS prefix YY: Year code WW: Week code MP2018-33: Part number LLLLLLLLL: Lot number TOP MARKING (MP2018GZD-5) MPS: MPS prefix YY: Year code WW: Week code MP2018-5: Part number LLLLLLLLL: Lot number
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 3 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PACKAGE REFERENCE TOP VIEW OUT PGDL GND PG IN1 EXPOSED PAD ON BACKSIDE CONNECT TO GND TO252-5 ABSOLUTE MAXIMUM RATINGS (1) Continuous power dissipation (TA = +25°C) (2) ESD Susceptibility (3) Recommended Operating Conditions (4) Operating temperature .... TA = -40°C to +125°C, TA ≤ TJ ≤ +150°C Thermal Resistance (5) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction -to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die t emperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Devices are ESD -sensitive. Handling precaution is recommended. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 4 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 13.5V, TJ = +25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units GND pin current IGND 0 < IOUT < 1mA 12 17 µA 1mA < IOUT < 30mA 16 22 30mA < IOUT < 500mA 105 150 Load current limit ILIMIT VOUT = 0V 550 900 1450 mA Output voltage accuracy MP2018GZD-5, VIN = 6V to 16V, ILOAD = 5mA 4.9 5 5.1 V MP2018GZD-33, VIN = 4.3V to 16V, ILOAD = 5mA 3.234 3.3 3.366 Dropout voltage (6) VDROPOUT MP2018GZD-5, ILOAD = 300mA, VDROPOUT = VIN - VO 400 650 mV MP2018GZD-33, ILOAD = 300mA, VDROPOUT = VIN - VO 500 700 MP2018GZD-5, ILOAD = 500mA, VDROPOUT = VIN - VO 750 1000 MP2018GZD-33, ILOAD = 500mA, VDROPOUT = VIN - VO 1000 1300 Line regulation VIN = 8V to 16V, ILOAD = 5mA -10 1 10 mV Load regulation ILOAD = 5mA to 500mA 1 15 mV Output voltage PSRR (7) 100Hz, COUT = 10μF, ILOAD = 10mA 57 dB 1kHz, COUT = 10μF, ILOAD = 10mA 45 dB 100kHz, COUT = 10μF, ILOAD = 10mA 51 dB Startup response time MP2018GZD-5, ILOAD = 10mA, COUT = 22µF 1 2 ms MP2018GZD-33, ILOAD = 10mA, COUT = 22µF 0.6 1.5 PG rising threshold 90% 93% 96% VOUT PG rising threshold hysteresis 5% VOUT PG low voltage Sink 1mA current 0.1 0.4 V PG leakage current VPG = 5V 1 µA PGDL charging current IPGDL VPGDL = 1V 3 5.5 9 µA PGDL rising threshold 1.5 1.65 2 V PGDL falling threshold 0.2 0.4 0.7 V PG delay time tPGDL CPGDL = 47nF, 10% to 90% PGDL rising threshold 6 11 14 ms PG reaction time CPGDL = 47nF 0.5 2 µs Thermal shutdown (7) TSD 165 C Thermal shutdown hysteresis (7) ΔTSD 30 C NOTES: 6) Dropout voltage: Measured when the output voltage (VOUT) has dropped 100mV from the nominal value obtained at VIN = 13.5V. 1) Derived from bench characterization. Not tested in production.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 5 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 IN Input voltage. Connect a 3V to 16V supply to IN. 2 PG Power good. 3 GND Ground. GND is connected to the exposed pad internally. GND and the exposed pad must be connected to the same ground plane. 4 PGDL Programmable power good delay time. 5 OUT Regulated output voltage . Connect a low-value ceramic capacitor (≥0.47μF) to the output for stability.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 6 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS CIN = 1µF, COUT = 22µF, VOUT = 5V, TA = 25°C, unless otherwise noted.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 7 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) CIN = 1µF, COUT = 22µF, VOUT = 5V, TA = 25°C, unless otherwise noted.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 8 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. BLOCK DIAGRAM UVLO Vreference EA IN OUT 1.25V GND PG PG PGDL Figure 1: Functional Block Diagram
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 9 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. OPERATION The MP2018 is a linear regulat or that supplies power to systems with high -voltage batteries. The MP2018 includes a wide 3V to 16V input range, low dropout voltage , and low quiescent supply current. Short-Circuit Protection (SCP) The regulator output current is limited internally, and the device is protected against short -circuit and overload conditions. The peak output current is limited to around 900mA, which exceeds the 500mA recommended continuous output current. Thermal Shutdown When the junction temperature exceeds the upper threshold (165°C), the thermal sensor sends a signal to the control logic t o shut down the IC. The IC restarts when the temperature has cooled sufficiently (135°C). The maximum power output current is a function of the package’s maximum power dissipation for a given temperature. The maximum power dissipation depends on the thermal resistance of the case and the circuit board, the temperature difference between the die junction and the ambient air, and the rate of the air flow. GND and the exposed pad must be connected to the ground plane for proper dissipation. Power Good (PG) Output The MP2018 has a power good pin (PG). PG is the open drain of an internal MOSFET and should be connected to the output voltage (VOUT) or an external voltage source (<15V) through a resistor (i.e.: 100kΩ). If VOUT reaches 93% of the nominal value, the MOSFET turns off , and PG is pulled high by VOUT or an external voltage source. When VOUT drops to 88% of the nominal value, the PG voltage is pulled to GND. There is a delay time when P G asserts high. The delay time can be programmed by adding a capacitor on PGDL. Select a capacitor for PGDL using Equation (1): PGDL PGDL PGDL th_PGDL t (ms) I ( A)C (nF) V (V) (1) Where tPGDL is the desired delay time when PG asserts high, IPGDL is the PGDL charging current, and Vth_PGDL is 1.65V. Figure 2 shows the power good timing.
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 10 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. VIN 1uF RPG MP2018 GND PG OUTIN PGDL
5 VOUT
22µF 100kΩ 47nF Power On Reset Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output VIN VOUT VPGDL VPG tPGD tPGR < tPGR t t t t VPG-High VPGDL-Low VPGDL-High d∆V/d∆t =IPGDL/CPGDL Figure 2: Power Good Timing
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR MP2018 Rev. 1.0 www.MonolithicPower.com 12 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT IN PGDL GND PG OUT VIN VOUT MP2018 1μF 47nF 100kΩ 22μF Figure 6: Typical Application Circuit
MP2018 – 16V, 500mA, LOW QUIESCENT CURRENT LINEAR REGULATOR NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integ rating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2018 Rev. 1.0 www.MonolithicPower.com 13 7/12/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved.
PACKAGE INFORMATION
NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) DRAWING CONFORMS TO JEDEC TO-252. 5) DRAWING IS NOT TO SCALE. TOP VIEW SIDE VIEW BOTTOM VIEW RECOMMENDED LAND PATTERN