MP024GS-10

MP024-10 MPS | Alldatasheet

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Technical content

Primary-Side, CC/CV, Flyback Regulator with High-Voltage Current Source and Programmable Cable Compensation MP024-10 Rev.1.0 www.MonolithicPower.com 1 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.

DESCRIPTION

The MP024-10 is a low-cost, offline, primary- side, flyback regulator with a simple, external circuit. It provides accurate constant voltage (CV) and constant current (CC) regulation without an optocoupler or secondary feedback circuit and has an integrated 700V MOSFET and high-voltage start-up current source. The MP024-10 operates in discontinuous conduction mode (DCM) using variable off-time control. Its power-saving technolog ies limit the no-load power consumption to less than 30mW. Full protection features include VCC under - voltage lockout (VCC UVLO ), over load protection (OLP), over-temperature protection (OTP), open -loop protection (OCkP), sensing - short protection (SSP) , and over -voltage protection (OVP). The variable switching frequency metho d provides natural spectrum shaping to smooth the EMI signature, making the MP024 -10 suitable for offline , low-power battery charger s and adapters. The MP024-10 is available in a SOIC8-7B package. Maximum Output Power (1) (4) 230Vac ±15% 85Vac~265Vac Open Frame (2) Adapter (3) Open Frame (2) Adapter (3) POUT (W) 13 10 10 7.5 NOTES: 1) The maximum output power is limited by thermal shutdown. 2) Maximum continuous power in an open frame design at 50°C ambient temperature. 3) Maximum continuous power in a non -ventilated enclosed adapter measured at 50°C ambient temperature. 4) Single output, VOUT = 5V.

FEATURES

 Primary-Side Control without Optocoupler or Secondary Feedback Circuit  Precise Constant Current and Constant Voltage Control (CC/CV)  Variable Off-Time Peak-Current Control  700V/4.5Ω Integrated MOSFET  700V High-Voltage Current Source  30mW No-Load Power Consumption  Programmable Cable Compensation  Multiple Protections: OVP, OCkP, SSP, OLP, OTP, and VCC UVLO  Low Cost and Simple External Circuit  Available in a SOIC8-7B Package

APPLICATIONS

 Cell Phone Chargers  Adapters for Handheld Electronics  Standby and Auxiliary Power Supplies All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 2 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL APPLICATION VCC GND FB Input Output CP MP024-10 SOURCE SS DRAIN

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 3 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.

ORDERING INFORMATION

Part Number* Package Top Marking MP024GS-10 SOIC8-7B See Below * For Tape & Reel, add suffix –Z (e.g. MP024GS-10–Z) TOP MARKING MP024-10: First five digits of the part number LLLLLLLL: Lot number MPS: MPS prefix Y: Year code WW: Week code PACKAGE REFERENCE TOP VIEW GND SOURCE VCC DRAIN FB 1 2 7 4 5 SS CP SOIC8-7B

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 4 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (5) Continuous power dissipation (TA = +25°C) (6) Recommended Operating Conditions (7) Thermal Resistance (4) θJA θJC NOTES: 5) Exceeding these ratings may damage the device. 6) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous p ower dissipation at any ambient temperature is calc ulated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Inter nal thermal shutdown circuitry protects the device from permanent damage. 7) The device is not guaranteed to function outside of its operating conditions. 8) Measured on JESD51-7, 4-layer PCB.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 5 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VCC = 15V, TJ = -40°C~125°C, min and max values are guaranteed by characterization, typical values are tested under 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Supply Voltage Management (VCC) VCC on threshold VCCH 18.8 19.4 20.0 V VCC off threshold VCCL 8.2 8.7 9.2 V Operating current IOP fS = fS-min 235 300 μA fS = 40kHz 0.55 0.85 mA Internal MOSFET (DRAIN) Breakdown voltage VBRDSS 700 V On state resistance RDSon VCC = 10V, IDS = 0.1A, TJ = 25°C 4.5 6.5 Ω High-voltage current source supply current IHV VCC = 18V, VD = 80V, TJ = 25°C 1.8 2.2 2.6 mA Leakage current Ileak VD = 400V, TJ = 25°C 11 µA Internal MOSFET (SOURCE) Maximum on time tONmax VSOURCE = 0V 25 40 55 μs Minimum switching frequency fS-min 75 110 Hz Current limit VLimit-Max fS ≥ fS-H 464 480 496 mV VLimit-Min fS ≤ fS-L 220 250 280 mV fS to start the current foldback fS-H 26 40 54 kHz fS to end the current foldback fS-L 20 kHz Leading edge blanking tLEB 190 300 410 ns Feedback Input (FB) FB input current IFB VFB = 4V, VCP = 2V 12 μA VFB = 4V, VCP = 1.5V 9 μA VFB = 4V, VCP = 0.8V 4.6 μA VFB = 4V, VCP = 0.2V 1.2 μA FB reference voltage VFB 3.90 3.96 4.02 V OLP threshold at sampled FB VFBolp 1.4 V OLP counter 768 FB sampling duration tFB-SD 180 260 360 ns FB maximum sampling time tFBS-Max RSS = 0Ω, VLimit = 0.5V 2.60 3.62 4.9 μs RSS = 1kΩ, VLimit = 0.5V 1.85 2.72 3.65 RSS = 2kΩ, VLimit = 0.5V 3.8 5.5 7.2 RSS = 4kΩ, VLimit = 0.5V 5.3 7.2 9.3 FB minimum sampling time tFBS-Min RSS = 0Ω, VLimit = 0.25V 1.1 1.82 2.6 μs RSS = 1kΩ, VLimit = 0.25V 0.75 1.35 1.95 RSS = 2kΩ, VLimit = 0.25V 1.85 2.72 3.65 RSS = 4kΩ, VLimit = 0.25V 2.6 3.62 4.9

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 6 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) VCC = 15V, TJ = -40°C~125°C, min and max values are guaranteed by characterization, typical values are tested under 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units ZCD threshold VDCM 55 100 145 mV FB open-circuit threshold VFBopen -190 -110 -45 mV OVP threshold at FB VFBovp 5.7 5.96 6.3 V FB OVP blanking time tOVP-B 1 1.35 1.7 μs Output Cable Compensation (CP) Supply voltage on CP VCP-Max 4 V Thermal Shutdown Thermal shutdown threshold (9) 140 °C Thermal shutdown recovery hysteresis (9) 40 °C NOTE: 9) The parameters are guaranteed by characterization.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 7 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. PIN FUNCTIONS SOIC8-7B Pin # Name Description 1 FB Feedback. The FB voltage determines the operation mode (CV mode or CC mode). 2 GND Ground. 4 DRAIN Drain of the internal MOSFET. DRAIN is integrated with an internal high- voltage current source, which charges up VCC for start-up. 5 SOURCE Source of the internal MOSFET. Connect a current sense resistor to detect the MOSFET current for peak-current-mode control in CV and CC mode. 6 SS Select sampling time by different external resistor configurations. 7 CP Output cable compensation. Connect a 1µF ceramic capacitor to CP as a low- pass filter. The compensation voltage can be adjusted by the resistor divider. CP can also be used to select the secondary duty limitation by different external resistor configurations.

8 VCC

Supply voltage . When VCC is lower than a certain level, the internal high voltage current source is turned on to charge up VCC. When VCC is charged to a certain level by the internal high-voltage current source, the IC begins working. In addition to the bulk capacitor , a 0.1µF ceramic capacitor can be connected as close to VCC as possible to decouple the noise disturbance.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 8 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS VCC On Threshold vs. Temperature VCC Off Threshold vs. Temperature 19.0 19.2 19.4 19.6 19.8 20.0 -50 0 50 100 150 VCCH (V) TEMPERATURE (°C) 8.5 8.6 8.7 8.8 8.9 -50 0 50 100 150 VCCL (V) TEMPERATURE (°C) High-Voltage Current Source Supply Current @ VD = 80V vs. Temperature Leakage Current @ VD = 400V vs. Temperature 0.5 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 150 IHV (mA) TEMPERATURE (°C) -50 0 50 100 150 Ileak (uA) TEMPERATURE (°C) Breakdown Voltage vs. Temperature Operating Current @ Fs_min vs. Temperature 700 720 740 760 780 800 -50 0 50 100 150 VBRDSS (V) TEMPERATURE (°C) 200 210 220 230 240 250 -50 0 50 100 150 IOP (uA) TEMPERATURE (°C)

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 9 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS (continued) On-State Resistance vs. Temperature Operating Current @ fS = 40kHz vs. Temperature -50 0 50 100 150 RDSon (Ω) TEMPERATURE (°C) 500 520 540 560 580 600 -50 0 50 100 150 IOP (uA) TEMPERATURE (°C) FB Reference Voltage vs. Temperature Current Limit vs. Temperature 3.90 3.92 3.94 3.96 3.98 4.00 -50 0 50 100 150 VFB (V) TEMPERATURE (°C) 450 460 470 480 490 500 -50 0 50 100 150 VLimit_Max (V) TEMPERATURE (°C) ZCD Threshold vs. Temperature FB Open-Circuit Threshold vs. Temperature 102 106 110 -50 0 50 100 150 VDCM (mV) TEMPERATURE (°C) -140 -130 -120 -110 -100 -90 -50 0 50 100 150 VFBopen (mV) TEMPERATURE (°C)

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 10 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS (continued) Minimum Switching Frequency vs. Temperature FB Maximum Sampling Time @ RSS = 0Ω vs. Temperature 100 -50 0 50 100 150 fS-min (Hz) TEMPERATURE (°C) 3.3 3.5 3.7 3.9 4.1 4.3 -50 0 50 100 150 tFBS -Max (μs) TEMPERATURE (°C) FB Minimum Sampling Time @ RSS = 0Ω vs. Temperature 1.4 1.6 1.8 2.0 2.2 2.4 -50 0 50 100 150 tFBS -Max (μs) TEMPERATURE (°C)

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 11 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 230VAC, VOUT = 5V, IOUT = 2A, unless otherwise noted. No-Load Consumption Efficiency 85 115 145 175 205 235 265 PIN (mW) VIN (VAC) 73% 74% 75% 76% 77% 78% 79% 80% 81% 0 0.5 1 1.5 2 EFFICIENCY IOUT (A) Vin=115VAC Vin=230VAC Conducted EMI VIN = 115VAC, L Line Conducted EMI VIN = 115VAC, N Line 1 PK CLRWR 2 AV CLRWR SGL 6DB dBµV dBµV TDS 150 kHz 30 MHz MT 20 ms RBW 9 kHz PREAMP OFFAtt 10 dB

1 MHz 10 MHz

Date: 28.DEC.2016 16:29:11 1 PK CLRWR 2 AV CLRWR SGL 6DB dBµV dBµV TDS 150 kHz 30 MHz MT 20 ms RBW 9 kHz PREAMP OFFAtt 10 dB Date: 28.DEC.2016 16:32:01 Conducted EMI VIN = 230VAC, L Line Conducted EMI VIN = 230VAC, N Line 1 PK CLRWR 2 AV CLRWR SGL 6DB dBµV dBµV TDS 150 kHz 30 MHz MT 20 ms RBW 9 kHz PREAMP OFFAtt 10 dB Date: 28.DEC.2016 16:38:43 1 PK CLRWR 2 AV CLRWR SGL 6DB dBµV dBµV TDS 150 kHz 30 MHz MT 20 ms RBW 9 kHz PREAMP OFFAtt 10 dB Date: 28.DEC.2016 16:35:45

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 12 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 230VAC, VOUT = 5V, IOUT=2A, unless otherwise noted. Steady State VIN = 265VAC Power On VIN = 265VAC CH1: VDS-PRI 200V/div. CH2: VD-SEC 20V/div. CH1:VDS-PRI 200V/div. CH2: VD-SEC 20V/div. 4μs/div. 10ms/div. OLP Entry OLP Recovery CH1: VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. CH1:VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. 400ms/div. 400ms/div. OLP Power On Short-Circuit Entry CH1: VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. CH1:VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. 400ms/div. 400ms/div.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 13 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board in the Design Example section. VIN = 230VAC, VOUT = 5V, IOUT = 2A, unless otherwise noted. Short-Circuit Recovery Short-Circuit Power On CH1: VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. CH1:VDS-PRI 200V/div. CH2: VCC 10V/div. CH3: VOUT 5V/div. 400ms/div. 400ms/div.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 14 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. BLOCK DIAGRAM CP SOURCE FB Vcc DRAIN CS GND OCkP, OVP, OLP Start-Up Unit Power Management Constant Current Control Comparator Constant Voltage Control Cable Compensation Driving Signal Management Figure 1: Functional Block Diagram

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 17 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. If CP is connect ed with a resistor , then there are several options for the CP and DS-Max combination (see Figure 8). CP RCP Figure 8: External Configuration of CP Table 1 shows all available choices for DS-Max. The entire customization process is completed before start-up and latche d in a register, so it does not have any influence on the normal operation. Table 1: DS-Max vs. CP Configuration RCP/CCP DS-Max 0Ω/NC 0.4 10kΩ/NC 0.3 20kΩ/NC 0.35 40kΩ/NC 0.5 NC/1μF 0.4 To enable the overload protection ( OLP) function in CC mode , the sampling on the FB voltage should be running, and the sampling time should be fixed at tFBS-Max. Leading-Edge Blanking The MP024-10 uses a leading -edge blanking period when the MOSFET turns on. Leading- edge blanking is used to prevent a false termination of the switching pulse caused by the turn -on current spike. During this blanking period, the current sense c omparator is disabled, and the MOSFET cannot be turned off. Discontinuous Conduction M ode ( DCM) Detection The MP024-10 is designed to operate in discontinuous conduction mode (DCM) in both CV and CC modes. To avoid operating in continuous conduction mode (CCM), the MP024-10 implements a zero-current detection function internally with a threshold of V DCM. The IC does not begin the next cycle until ZCD is detected. During normal operation, the blanking time f or ZCD is synchronized with the FB sampling time (i.e.: ZCD always starts after the sampling phase is done ). There is also a soft-start (SS) function on the ZCD blanking time that prevents ZCD from being falsely trigger ed when the output capacitor is not charged up. During the start-up period, the blanking time for ZCD gradually shrinks from t B_STP (10μs) to the FB sampling time in three cycles. Protection Features ( OVP, OCkP, SSP , and OLP) The MP024-10 includes over-voltage protection (OVP), open-circuit protection (OCkP), sensing- short protection (SSP), and overload protection (OLP). If the voltage at FB exceeds VFBovp, OVP is triggered . If VFBopen cannot be monitored for each cycle, OCkP is tr iggered. If the maximum turn on time is reached, SSP is triggered . If the sampled FB voltage is lower than V FBolp for 128 consecutive cycles, OLP is triggered. T he MP024-10 immediately shuts down the driving signals and enter s hiccup mode when any of these protection features are triggered and resumes normal operation when the fault has been removed. OLP is not enabled until the soft -start period of the ZCD blanking time is finished. Over-Temperature Protection (OTP) When the junction temperature of the IC exceeds the thermal shutdown threshold , over- temperature protection (OTP) is triggered, and the IC stops switching. The MP024-10 resumes normal operation when the junction temperature drop exceeds the thermal shutdown hysteresis. Output Cable Compensation The MP024-10 has an internal output cable compensation circuit (see Figure 9). A switching signal (VLimit*tONS) is generated internally and is synchronized with the switching frequency. The duty on time of this signal is t ONS, and the amplitude of this signal is proportional to the current limit threshold. The switching signal is output to CP through a 1M Ω resistor. A low- pass filter can be implemented by placing an external capacitor on CP , and a DC voltage (VCP) that is proportional to the output current can be derived on CP. An internal current sinking into FB is proportional to V CP, so the voltage drop on the upper resistor of the divider implements the output cable compensation function.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 18 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. CCP VLimit*tons FB CP Figure 9: Output Cable Compensation Determine the compensation voltage with Equation (10): P _ AU Limit S S FCP UP 3

8 V D NV 2 R 300 10 N

(10) Where VFCP is the secondary -side compensation vo ltage drop , DS is the secondary-diode duty cycle , RUP is the upp er resistor of the resistor divider, NS is the number of turns for the secondary -side transformer windings, NP_AU is the number of transformer auxiliary winding turns , and VLimit is the current limit. For example, to calculate the maximum output cable compensation in CC condition, use DS = DS-Max (when CP function is used, DS-Max is 0.4) and V Limit = VLimit-Max (typically 480mV) in the formula. The compensation voltage drops as VLimit or DS decrease along with the load current. The CP voltage is 8*VLimit*DS. Connect a 1 µF capacitor to CP for cable compensation. Since CP is also used for DS-Max customization, the cable compensation function is only available when CP is connected to the capacitors directly. If there is any non -zero resistor connected to CP , all of the internal blocks related to the cable compensation function are disabled and there is no current sinking into FB.

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 22 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT 1µF/10V C11 FR107 PGND AGND PGND Np:Np_au:Nsec=115:15:6 Lp=1.2mH Np Nsec Np_au 10kΩ/0805 1000V/1A EPC17 600V/0.5A 5V/2A 90VAC~265VAC PGND AGND 1mH 100kΩ/1206 1nF/1206 5.1kΩ 1nF CY1 560µF 560µF C13 L N Vout AGND10µF/400V 10µF/400V 100Ω/1206 PGND PGND 22µF 1µF 13kΩ/1% VCC 8 SS 6 FB1 SOURCE 5 GND2 CP 7 DRAIN4 MP024-10/SO8-7 1.2Ω/1206 R13 NC R12 PGND 1%1% 4.7 FR1 CR1 100nF R11 45V/10A 10Ω/1206 1nF 10pF C10 A B 30.9kΩ/1% 1.8Ω/1206 R10 Figure 16: Universal Input, 5V/2A Output

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 23 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. FLOW CHART N Y N Monitor VFB CC Loop Operation VFB > VFBovp? N VFB > VFBopen (entire cycle)? OVP, Stop Switching Y OCkP, Stop Switching Y N CV Loop Operation?N Y HV Supply On Start VCC > VCCH? HV Supply Off Y Normal Operation VCC < VCCL? End CV Loop Operation Y Figure 17: Flow Chart

MP024-10 – PRIMARY-SIDE CC/CV REGULATOR NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrati ng MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP024-10 Rev.1.0 www.MonolithicPower.com 25 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved.

PACKAGE INFORMATION

0.016(0.41) 0.050(1.27)0o-8o DETAIL "A" 0.010(0.25) 0.020(0.50) x 45o SEE DETAIL "A" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00)PIN 1 ID 0.050(1.27) BSC 0.013(0.33) 0.020(0.51) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) TOP VIEW FRONT VIEW 0.228(5.80) 0.244(6.20) SIDE VIEW 1 4 8 5 RECOMMENDED LAND PATTERN 0.213(5.40) 0.063(1.60) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) JEDEC REFERENCE IS MS-012. 6) DRAWING IS NOT TO SCALE. 0.010(0.25) BSC GAUGE PLANE