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Primary Side CC/CV Flyback Controller with High Voltage Current Source and Programmable Cable Compensation MP023 Rev. 1.1 www.MonolithicPower.com 1 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. The Future of Analog IC Technology
DESCRIPTION
The MP023 is an offline, primary-side controller that provides accurate, constant voltage and constant current regulation without the need of an optocoupler or secondary feedback circuit. It uses an integrated 700V current source to achieve quick start-up. The MP023's variable off-time control allows its flyback converter to operate in discontinuous conduction mode (DCM). The MP023’s current limit and maximum secondary duty cycle are programmable, making the output current easily set. The FB voltage sensing point is also programmable and is able to set different switching frequencies. The internal high-voltage start-up current source and power-saving technologies limit the no-load power consumption to less than 30mW. Full protection features include VCC under- voltage lockout (UVLO), overload protection (OLP), over-temperature protection (OTP), open loop protection (OCkP), and over-voltage protection (OVP). The MP023's variable switching frequency method provides a natural spectrum for shaping a smooth EMI signature, which is suitable for offline, low-power battery chargers and adapters. The MP023 requires a minimal number of readily available, standard, external components and is available in a SOIC8-7A package.
FEATURES
Primary-Side Control without Optocoupler or Secondary Feedback Circuit Precise Constant Current and Constant Voltage Control (CC/CV) Variable Off-Time Peak Current Control 700V High-Voltage Current Source 20mW No-Load Power Consumption Programmable Cable Compensation Programmable Current Limit and Maximum Secondary Duty Cycle Programmable FB Voltage Sensing Point Multiple Protection Features: OVP, OCkP, OLP, OTP, VCC UVLO Low Cost and Simple External Circuit Available in a SOIC8-7A Package
APPLICATIONS
Appliance Power Supplies Adapters for Handheld Electronics Standby and Auxiliary Power Supplies All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website unde r Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 2 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL APPLICATION
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 3 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking MP023GS SOIC8-7A See Below * For Tape & Reel, add suffix –Z (e.g. MP023GS–Z) TOP MARKING MP023: first five digits of the part number; LLLLLLLL: lot number; MPS: MPS prefix: Y: year code; WW: week code: PACKAGE REFERENCE SOIC8-7A
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 4 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. ABSOLUTE MAXIMUM RATINGS (1) to 15V Maximum power dissipation Storage temperature……….….-60°C to +150°C ESD capability human body mode…..……2.0kV ESD capability machine mode……….…….200V Recommended Operating Conditions (3) Junction temp. (TJ)……………...-40°C to +125°C Operating VCC range……..…………10V to 25V Thermal Resistance (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature T J (MAX), the junction-to- ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by P D (MAX) = (T J (MAX)-TA)/θJA. Exceeding the maximum allowable powe r dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 5 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VCC = 15V, TJ = -40 ~125℃ ℃, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Supply Voltage Management (VCC Pin) VCC ON threshold VCCH 18.8 19.4 20.0 V VCC OFF threshold VCCL 8.2 8.7 9.2 V fS-min, CL=1nF 245 300 μA Operating current IOP fs = 40kHz, CL=1nF 1 1.3 mA High Voltage Current Source (HV Pin) Break-down voltage VBRDSS 700 V Supply current from HV pin V CC=18V, VHV=80V, TJ=25℃ 1.8 2.2 2.6 mA Leakage current from HV pin I leak V DS=400Vdc, TJ=25℃ 10 µA Driving (Drv Pin) Driver voltage high level VHigh C L=1nF VCC=9.5V 7.2 7.8 V Driver voltage clamp level V Clamp C L=1nF, VCC=24V 12 13.4 15 V Driver voltage low level VLow C L=1nF, VCC=24V 50 mV Driver voltage rise time tR C L=1nF 30 ns Driver voltage fall time tF C L=1nF 40 ns Maximum ON time tONmax V CS=0V 22 36 50 us Minimum switching frequency f S-min 72 105 Hz Current Sense (CS Pin) VLimit-Max fS >= fS-H 464 480 496 mV Current limit VLimit-Min f S <= fS-L 220 250 280 mV fs to start the current fold back f S-H 30 40 50 kHz fs to end the current fold back f S-L 20 kHz Propagation delay to Drv tPD 60 95 ns Leading edge blanking tLEB 180 280 380 ns Feedback input (FB Pin) VFB = 4V, VCP=2V 12 μA VFB = 4V, VCP=1.5V 9 μA VFB = 4V, VCP=0.8V 4.6 μA FB pin input current IFB VFB = 4V, VCP=0.2V 1.2 μA FB reference voltage VFB 3.90 3.96 4.02 V OLP threshold at sampled FB(5) V FBolp 1.38 V OLP counter(1) 768 FB sampling duration tFB_SD 180 250 330 ns RCS=0, VLimit=0.5V 2.50 3.45 4.70 RCS=1k, VLimit=0.5V 1.70 2.58 3.50 RCS=2k, VLimit=0.5V 3.60 5.20 7.00 FB maximum sampling time t FBS-Max RCS=4k, VLimit=0.5V 5.00 7.00 9.20 μs
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 6 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. VCC = 15V, TJ = -40 ~125℃ ℃, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units RCS=0, VLimit=0.25V 1.00 1.70 2.50 RCS=1k, VLimit=0.25V 0.68 1.28 1.88 RCS=2k, VLimit=0.25V 1.70 2.57 3.50 FB minimum sampling time t FBS-Min RCS=4k, VLimit=0.25V 2.50 3.42 4.70 μs ZCD threshold VDCM 55 100 145 mV FB open-circuit threshold V FBopen -0.19 -0.11 -0.045 V OVP threshold at FB VFBovp 5.7 5.96 6.3 V FB OVP blanking time tOVP-B 0.9 1.2 1.53 μs Output Cable Compensation (CP Pin) Supply voltage on CP VCP-Max 4 V Thermal Shutdown Thermal shutdown threshold(5) 140 °C Thermal shutdown hysteresis(5) 40 °C Notes: (5) The parameters are guaranteed by characterization.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 7 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. PIN FUNCTIONS SOIC8-7A Pin # Name Description 1 CS Current sense. CS connects to the current sense resistor to detect the MOSFET current for peak current mode control in CV and CC modes. CS can also be used to select a sampling time by different external resistor configurations. Connect CS to current sensing resistor directly, if default sampling time is selected. Please refer to EC table for additional details of sampling time selection. 2 DRV Driver. DRV drives the external power MOSFET. 3 CP Output cable compensation. Usually, a 1µF ceramic capacitor can be connected to CP as a low pass-filter. The compensati on voltage can be adjusted by the divided resistor. CP can also be used to select the secondary duty limitation by different external resistor configurations. Short CP to GND, if default secondary duty is selected and cable compensation isn’t required. Please refer to Table 1 for additional details.
4 VCC
Supply voltage of the IC. When VCC is lower than a certain level (V CCL), the internal high-voltage current source is turned on to charge VCC. When VCC is charged to a certain level (V CCH) by the internal high-voltage curr ent source, the IC begins working. Connect a 0.1µF ceramic capacitor as close to VCC as possible to decouple the noise and the bulk capacitor. 5 FB Feedback. Voltage on FB determines the operation mode (CV or CC mode). 6 GND Ground. 8 HV Internal high-voltage current source. HV draws current from the bus to charge up VCC for start-up.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 8 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 9 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL CHARACTERISTICS (continued)
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 10 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 230VAC, unless otherwise noted. R 50 100 150 200 250 300 0 0.5 1 1.5 2 2.5 3 150 kHz 30 MHz SGL TDS 6DB 120 1 MHz 10 MHz 110 100 EN55022A EN55022Q 150 kHz 30 MHz SGL TDS 6DB 120 1 MHz 10 MHz 110 100 EN55022A EN55022Q 1 PK CLRWR 2 AV CLRWR 150 kHz 30 MHz SGL TDS 6DB 120 1 MHz 10 MHz 110 100 EN55022A EN55022Q 1 PK CLRWR 2 AV CLRWR 150 kHz 30 MHz SGL TDS 6DB 120 1 MHz 10 MHz 110 100 EN55022A EN55022Q
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 11 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 230VAC, unless otherwise noted. VPDS 200V/div. VSDS 20V/div. VPDS 200V/div. VSDS 20V/div. VPDS 200V/div. VCC 10V/div. VOUT 5V/div. VPDS 200V/div. VCC 10V/div. VOUT 5V/div. VPDS 200V/div. VCC 10V/div. VSDS 20V/div. VPDS 200V/div. VCC 10V/div. VSDS 20V/div. VPDS 200V/div. VCC 10V/div. VSDS 20V/div.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 12 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Protection Unit DRV Constant Current Control Constant Voltage Control Driving Signal Management Power Management Cable Compensation Start-Up Unit Comparator Figure 1: Functional Block Diagram
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 15 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Figure 9: The External Configuration of CP Table 1 shows all available values for D S-Max. The entire customization process is completed before start-up and latched in a register, so it does not have any influence on normal operation. Table 1: DS-Max vs. CP Configuration RCP/CCP D S-Max 0 Ω/NC* 0.4 10 kΩ/NC 0.3 20 kΩ/NC 0.35 40 kΩ/NC 0.5 NC/1μF 0.4 Notes: * NC means no connection. Ipk is also fixed in CC operation. The relationship between the output constant current and secondary peak current (I pks) can be calculated with Equation (7): ons out pks pks S Max ons offs t11II I D 2t t 2 (7) When the secondary diode is turned on, the peak current on the secondary side is calculated with Equation (8): p pks PK S NII N (8) The output current is then calculated with Equation (9): p out PK S Max S N1II D 2N (9) To implement the OLP function in CC mode, the sampling on the FB voltage continues running with the sampling time fixed at t FBS-Max. Leading Edge Blanking Turning the power switch on induces a spike on the sense resistor. The MP023 employs a leading edge blanking period (t LEB) to avoid falsely terminating the switching pulse. During this blanking period, the current sense comparator is disabled, and the part cannot be turned off. DCM Detection The MP023 is designed to operate in discontinuous conduction mode (DCM) in both CV and CC modes. To avoid operating in continuous conduction mode (CCM), the MP023 implements a zero current detection (ZCD) function internally with a threshold of V DCM. The IC does not start the next cycle until ZCD is detected. During normal operation, the blanking time for ZCD is synchronized with the FB sampling time (i.e., ZCD always starts after the sampling phase is done). There is also a soft-start function on the ZCD blanking time to prevent ZCD from being triggered falsely when the output capacitor is not charged up. During the start-up period, the blanking time for ZCD shrinks gradually from t B_STP (10μs) to the FB sampling time in 3 cycles. OVP, OCkP, and OLP The MP023 includes over-voltage protection (OVP), open-circuit protection (OCkP), and overload protection (OLP). If the voltage on FB exceeds V FBovp, OVP is triggered. If V FBopen cannot be monitored for each cycle, OCkP is triggered. If the sampled FB voltage is lower than V FBolp for 128 consecutive cycles, OLP is triggered. When any of these protections are triggered, the MP023 shuts off immediately, enters hiccup mode, and resumes normal operation (t ons) when the fault has been removed. OLP is not enabled until the soft-start period of the ZCD blanking time is finished. Over-Temperature Protection (OTP) When the temperature of the IC exceeds 150°C, the over-temperature protection (OTP) is activated, and the IC enters auto-recovery mode. When the temperature falls below 120°C, the IC resumes operation.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 16 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. Output Cable Compensation The MP023 has an internal output cable compensation (CP) circuit (see Figure 10). A switching signal (V CS_Lim*Dons) is generated internally and is synchronized with the switching frequency. The duty on-time of this signal is D ons, and the amplitude of this signal is proportional to the current-limit threshold. This signal is output to CP through a 1MΩ resistor. A low pass filter can be implemented by placing an external capacitor on CP, and then a DC voltage (V CP) proportional to the output current can be deducted on CP. Note that if cable compensation function is needed, D S-Max is default as 0.4 and can’t be programmable by connecting external CP resistor. Figure 10: Output Cable Compensation Table 2 shows some typical voltage levels on CP when a low pass filter is applied as described above. Table 2: Typical CP Voltage Levels (CCP = 1μF) VLimit D ons V CP 500mV 0.4 1.6V 500mV 0.35 1.4V 400mV 0.3 0.96V 250mV 0.1 0.2V An internal current sink in FB is proportional to V CP. The voltage drop on the upper resistor of the divider implements the output cable compensation function. The equation below determines the compensation voltage: P_A U Limit S S FCP UP3 8V D NV2 R300 10 N (10) Where: V FCP is the secondary-side compensation voltage drop, D S is the secondary-diode duty cycle, R UP is the upper resistor of resistor divider, N S is the number of turns for the secondary- side transformer windings, N P_AU is the number of transformer auxiliary winding turns, V Limit is the current limit, Since CP is also used for D S-Max customization, the cable compensation function is only available when CP is connected to the capacitors directly. If there is a non-zero resistor connected to CP, all of the internal blocks related to the cable compensation function are disabled. During normal operation under this condition, CP is clamped to GND internally and there is no current flowing through FB.
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 20 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. TYPICAL APPLICATION CIRCUIT 1uF/10V FR107 PGND AGND PGND PGND PGND 22uF/50V Np:Np_au:Nsec=90:12:5 Lp=0.71mH Np Nsec Np_au NCC10 CR1 10K/0805 27K/1% R13 1000V/1A EPC17 600V/0.5A 5V/2.4A 85VAC~265VAC PGND 100nF/50V HV8 GND6 CS 1 FB5 DRV 2 VCC 4 CP 3 MP023/SO8-7 PGND1uF PGND D4 NC NCR15 8T1 NCD1 AGND 250V/1A 1mH 100K/1206 1nF/1206 10KR9 1/1%/1206 R10 1.8/1%/1206 NCR3 22pF PGND 22pF NC R14 5.1K R16 1nF CY1 R11 700V 560uF C11 560uF C12 10/1206R18 VDD LL5 VDD 3 PGND6 VD4 VG 1 VSS 2 MP6906 NCD7 AGND VD VDD R19 JP1 VD JP2 L N Vout AGND10uF 10uF 2.2uF C13 1nFC14 10KR21 100KR17 13K/1% R12 470pF/50V C15 3KR20 60V FR1 1, 2, 3 5, 6, 7, 8 Figure 17: Typical Application—Universal Input, 5V/2.4A Output
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 21 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. FLOW CHART
MP023 – PRIMARY-SIDE CC/CV CONTROLLER MP023 Rev. 1.1 www.MonolithicPower.com 22 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. SIGNAL TIMING SEQUENCE WAVEFORMS Over Voltage Occurs Open Circuit Occurs Over Temperature Occurs
MP023 – PRIMARY-SIDE CC/CV CONTROLLER NOTICE: The information in this document is subject to change wi thout notice. Users should warra nt and guarantee that third party Intellectual Property rights are not infringed upon w hen integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP023 Rev. 1.1 www.MonolithicPower.com 23 7/18/2016 MPS Proprietary Information. Patent Protec ted. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved.
PACKAGE INFORMATION
0.016(0.41) 0.050(1.27)0o-8o DETAIL "A" 0.010(0.25) 0.020(0.50) x 45 o SEE DETAIL "A" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00)PIN 1 ID 0.050(1.27) BSC 0.013(0.33) 0.020(0.51) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) TOP VIEW FRONT VIEW 0.228(5.80) 0.244(6.20) SIDE VIEW RECOMMENDED LAND PATTERN 0.213(5.40) 0.063(1.60) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) JEDEC REFERENCE IS MS-012. 6) DRAWING IS NOT TO SCALE. 0.010(0.25) BSC GAUGE PLANE