MMFT3055VL MOTOROLA | Alldatasheet

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1Motorola TMOS Power MOSFET Transistor Device Data /C0068/C0101/C0115/C0105/C0103/C0110/C0101/C0114/C0039/C0115 /C0068/C0097/C0116/C0097 /C0083/C0104/C0101/C0101/C0116 /C0084/C0077/C0079/C0083 /C0086 /C0083/C0079/C0084/C0045/C0050/C0050/C0051 /C0102/C0111/C0114 /C0083/C0117/C0114/C0102/C0097/C0099/C0101 /C0077/C0111/C0117/C0110/C0116 N–Channel Enhancement–Mode Silicon Gate TMOS V is a new technology designed to achieve an on–resis- tance area product about one–half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMO S devices. Just as with our TMOS E–FET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in powe r supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety m argin against unexpected voltage transients. New Features of TMOS V

  • On–resistance Area Product about One–half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
  • Faster Switching than E–FET Predecessors Features Common to TMOS V and TMOS E–FETS
  • Avalanche Energy Specified
  • IDSS and VDS(on) Specified at Elevated Temperature
  • Static Parameters are the Same for both TMOS V and TMOS E–FET
  • Available in 12 mm T ape & Reel Use MMFT3055VLT1 to order the 7 inch/1000 unit reel Use MMFT3055VLT3 to order the 13 inch/4000 unit reel MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–to–Source Voltage VDSS 60 Vdc Drain–to–Gate Voltage (RGS = 1.0 MΩ ) VDGR 60 Vdc Gate–to–Source Voltage – Continuous Gate–to–Source Voltage – Non–repetitive (tp ≤ 10 ms) VGS VGSM ± 15 ± 20 Vdc Vpk Drain Current – Continuous Drain Current – Continuous @ 100°C Drain Current – Single Pulse (tp ≤ 10 µs) ID ID IDM 1.5 1.2 5.0 Adc Apk Total PD @ TA = 25°C mounted on 1” sq. Drain pad on FR–4 bd material Total PD @ TA = 25°C mounted on 0.70” sq. Drain pad on FR–4 bd material Total PD @ TA = 25°C mounted on min. Drain pad on FR–4 bd material Derate above 25°C PD 2.1 1.7 0.94 6.3 Watts mW/ °C Operating and Storage T emperature Range TJ, Tstg –55 to 175 °C Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 3.4 Apk, L = 10 mH, RG = 25 Ω ) EAS mJ Thermal Resistance – Junction to Ambient on 1” sq. Drain pad on FR–4 bd material – Junction to Ambient on 0.70” sq. Drain pad on FR–4 bd material – Junction to Ambient on min. Drain pad on FR–4 bd material R θJA R θJA R θJA 159 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C Designer’s Data for “Worst Case” Conditions— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics— are given to facilitate “worst case” design. E–FET, Designer’s, and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. REV 1 Order this document by MMFT3055VL/D /C0077/C0079/C0084/C0079/C0082/C0079/C0076/C0065 SEMICONDUCTOR TECHNICAL DATA TM /C0077/C0077/C0070/C0084/C0051/C0048/C0053/C0053/C0086/C0076 TMOS POWER FET

1.5 AMPERES

60 VOLTS

R DS(on) = 0.140 OHM D S G CASE 318E–04, Style 3 TO–261AA  Motorola, Inc. 1996

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2 Motorola TMOS Power MOSFET Transistor Device Data

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (Cpk ≥ 2.0) (3) (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS Vdc mV/°C Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS 100 µAdc Gate–Body Leakage Current (VGS = ± 15 Vdc, VDS = 0 Vdc) IGSS — — 100 nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (Cpk ≥ 2.0) (3) (VDS = VGS , ID = 250 µAdc) Threshold T emperature Coefficient (Negative) VGS(th) 1.0 1.5 3.7 2.0 Vdc mV/°C Static Drain–to–Source On–Resistance (Cpk ≥ 2.0) (3) (VGS = 5.0 Vdc, ID = 0.75 Adc) R DS(on) — 0.125 0.14 Ohm Drain–to–Source On–Voltage (VGS = 5.0 Vdc, ID = 1.5 Adc) (VGS = 5.0 Vdc, ID = 0.75 Adc, TJ = 150°C) VDS(on) 0.25 0.24 Vdc Forward Transconductance (VDS = 8.0 Vdc, ID = 1.5 Adc) gFS 1.0 3.5 — mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C iss — 350 490 pF Output Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C oss — 110 150 Transfer Capacitance f = 1.0 MHz) C rss — 29 60 SWITCHING CHARACTERISTICS (2) Turn–On Delay Time (VDD = 30 Vdc, ID = 1.5 Adc, VGS = 5.0 Vdc, R G = 9.1 Ω ) td(on) — 9.5 20 ns Rise Time (VDD = 30 Vdc, ID = 1.5 Adc, VGS = 5.0 Vdc, R G = 9.1 Ω ) tr — 18 40 Turn–Off Delay Time VGS = 5.0 Vdc, R G = 9.1 Ω ) td(off) — 35 70 Fall Time G = 9.1 Ω ) tf — 22 40 Gate Charge (VDS = 48 Vdc, ID = 1.5 Adc, VGS = 5.0 Vdc) Q T — 9.0 10 nC (VDS = 48 Vdc, ID = 1.5 Adc, VGS = 5.0 Vdc) Q 1 — 1.0 —(VDS = 48 Vdc, ID = 1.5 Adc, VGS = 5.0 Vdc) Q 2 — 4.0 — Q 3 — 3.5 — SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (1) (IS = 1.5 Adc, VGS = 0 Vdc) (IS = 1.5 Adc, VGS = 0 Vdc, TJ = 150°C) VSD 0.82 0.68 1.2 Vdc Reverse Recovery Time (IS = 1.5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) trr — 41 — ns (IS = 1.5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) ta — 29 —(IS = 1.5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) tb — 12 — Reverse Recovery Stored Charge Q RR — 0.066 — µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the drain lead 0.25″ from package to center of die) LD — 4.5 — nH Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS — 7.5 — nH (1) Pulse Test: Pulse Width ≤/n636861720000000000000000300 µs, Duty Cycle ≤ 2%. (2)Switching characteristics are independent of operating junction temperature. (3) Reflects typical values. C pk = Max limit – Typ 3 x SIGMA

Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics Figure 3. On–Resistance versus Drain Current Figure 4. On–Resistance versus Drain Current Figure 5. On–Resistance Variation with Figure 6. Drain–To–Source Leakage

1.4 TJ = 125°C

4 Motorola TMOS Power MOSFET Transistor Device Data

by recognizing that the power MOSFET is charge controlled. by current from the generator. and Q2 and VGSP are read from the gate charge curve. on–state when calculating td(off). voltage at the source which reduces the gate drive current. tion of drain current, the mathematical solution is complex. sure and, consequently, is not specified. Figure 7. Capacitance Variation

6 Motorola TMOS Power MOSFET Transistor Device Data

Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy versus Figure 13. Thermal Response Figure 14. Diode Reverse Recovery Waveform

soldering to a pad size given for maximum power dissipation. drain pad area is shown in Figure 17.

0.8 Watts

Figure 15. Thermal Resistance versus Drain Pad

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8 Motorola TMOS Power MOSFET Transistor Device Data

Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the SOT–223 package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.

  • Always preheat the device.
  • The delta temperature between the preheat and soldering should be 100°C or less.*
  • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.
  • The soldering temperature and time shall not exceed 260°C for more than 10 seconds.
  • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less.
  • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.
  • Mechanical stress or shock should not be applied during cooling * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.

vary among soldering systems but it is a good starting point. efficiently, then distributes this energy to the components. up to 30 degrees cooler than the adjacent solder joints.

40 TO 80 SECONDS

Figure 16. Typical Solder Heating Profile

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10 Motorola TMOS Power MOSFET Transistor Device Data

CASE 318E–04 ISSUE H H S F A B D G L 1 2 3 0.08 (0003) C M K J DIM A MIN MAX MIN MAX MILLIMETERS 0.249 0.263 6.30 6.70 INCHES B 0.130 0.145 3.30 3.70 C 0.060 0.068 1.50 1.75 D 0.024 0.035 0.60 0.89 F 0.115 0.126 2.90 3.20 G 0.087 0.094 2.20 2.40 H 0.0008 0.0040 0.020 0.100 J 0.009 0.014 0.24 0.35 K 0.060 0.078 1.50 2.00 L 0.033 0.041 0.85 1.05 M 0 10 0 10 S 0.264 0.287 6.70 7.30 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. /C0095 /C0095 /C0095 /C0095 STYLE 3: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;JAPAN : Nippon Motorola Ltd.; T atsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, P .O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 T atsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 INTERNET : http://Design–NET .com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MMFT3055VL/D /C0042/C0077/C0077/C0070/C0084/C0051/C0048/C0053/C0053/C0086/C0076/C0047/C0068/C0042