MMDFS2P102 ONSEMI | Alldatasheet

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© Semiconductor Components Industries, LLC, 2006 August, 2006 − Rev. 2

1 Publication Order Number:

2 Amps, 20 Volts

P−Channel SO−8, FETKY/C0116 The FETKY product family incorporates low R DS(on), true logic level MOSFETs packaged with industry leading, low forward drop, low leakage Schottky Barrier rectifiers to offer high efficiency components in a space saving configuration. Independent pinouts for MOSFET and Schottky die allow the flexibility to use a single component for switching and rectification functions in a wide variety of applications such as Buck Converter, Buck −Boost, Synchronous Rectification, Low V oltage Motor Control, and Load Management in Battery Packs, Chargers, Cell Phones and other Portable Products.

  • Power MOSFET with Low VF, Low IR Schottky Rectifier
  • Lower Component Placement and Inventory Costs along with Board Space Savings
  • Logic Level Gate Drive − Can be Driven by Logic ICs
  • Mounting Information for SO−8 Package Provided
  • IDSS Specified at Elevated Temperature
  • Applications Information Provided MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) (Note 1.) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 20 Vdc Drain−to−Gate Voltage (RGS = 1.0 M/C0087) VDGR 20 Vdc Gate−to−Source Voltage − Continuous VGS /C003420 Vdc Drain Current (Note 3.) − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Single Pulse (tp /C0118 10 /C0109s) ID ID IDM 3.3 2.1 Adc Apk Total Power Dissipation @ TA = 25°C (Note 2.) PD 2.0 Watts Single Pulse Drain−to−Source Avalanche Energy − STARTING TJ = 25°C VDD = 30 Vdc, VGS = 5.0 Vdc, VDS = 20 Vdc, IL = 9.0 Apk, L = 10 mH, RG = 25 /C0087 EAS 324 mJ 1. Negative sign for P −channel device omitted for clarity. 2. Pulse Test: Pulse Width ≤250 μs, Duty Cycle ≤ 2.0%. 3. Mounted on 2 ″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided), 10 sec. max. Anode 1 Top View Anode Source Gate Cathode Cathode Drain Drain Device Package Shipping

ORDERING INFORMATION

MMDFS2P102R2 SO −8 2500 Tape & Reel http://onsemi.com D S G P−Channel SO−8 CASE 751 STYLE 18 LYWW MARKING DIAGRAM 2P102 L = Location Code Y = Year WW = Work Week PIN ASSIGNMENT

2 AMPERES

20 VOLTS

RDS(on) = 160 m/C0087 VF = 0.39 Volts

http://onsemi.com SCHOTTKY RECTIFIER MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Peak Repetitive Reverse Voltage DC Blocking Voltage VRRM VR Average Forward Current (Note 1) (Rated VR) TA = 100°C IO 1.0 Amps Peak Repetitive Forward Current (Note 3.) (Rated VR, Square Wave, 20 kHz) TA = 105°C Ifrm 2.0 Amps Non−Repetitive Peak Surge Current (Surge applied at rated load conditions, halfwave, single phase, 60 Hz) Ifsm 20 Amps THERMAL CHARACTERISTICS − SCHOTTKY AND MOSFET Thermal Resistance − Junction−to−Ambient (Note 2) − MOSFET R/C0113JA 167 °C/W Thermal Resistance − Junction−to−Ambient (Note 3) − MOSFET R/C0113JA 100 Thermal Resistance − Junction−to−Ambient (Note 3.) − MOSFET R/C0113JA 62.5 Thermal Resistance − Junction−to−Ambient (Note 2) − Schottky R/C0113JA 204 Thermal Resistance − Junction−to−Ambient (Note 3) − Schottky R/C0113JA 122 Thermal Resistance − Junction−to−Ambient (Note 1) − Schottky R/C0113JA 83 Operating and Storage Temperature Range Tj, Tstg −55 to 150 2. Mounted with minimum recommended pad size, PC Board FR4.

http://onsemi.com MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 4) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain−Source Voltage (VGS = 0 Vdc, ID = 0.25 mA) Temperature Coefficient (Positive) V(BR)DSS Vdc mV/°C Zero Gate Drain Current (VDS = 30 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS 1.0 μAdc Gate Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) IGSS − − 100 nAdc ON CHARACTERISTICS (Note 5) Gate Threshold Voltage (VDS = VGS, ID = 0.25 mA) Temperature Coefficient (Negative) VGS(th) 1.0 1.5 4.0 2.0 Vdc mV/°C Static Drain−Source Resistance (VGS = 10 Vdc, ID = 2.0 Adc) (VGS = 4.5 Vdc, ID = 2.5 Adc) RDS(on) 0.118 0.152 0.160 0.180 Ohms Forward Transconductance (VDS = 3.0 Vdc, ID = 1.0 Adc) gFS 2.0 3.0 − mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 16 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss − 420 588 pF Output Capacitance Coss − 290 406 Reverse Transfer Capacitance Crss − 116 232 SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time (VDS = 10 Vdc, ID = 2.0 Adc, VGS = 4.5 Vdc, RG = 6.0 Ω) td(on) − 19 38 ns Rise Time tr − 66 132 Turn−Off Delay Time td(off) − 25 50 Fall Time tf − 37 74 Gate Charge (VDS = 16 Vdc, ID = 2.0 Adc, VGS = 10 Vdc) QT − 15 20 nC Q1 − 1.2 − Q2 − 5.0 − Q3 − 4.0 − DRAIN SOURCE DIODE CHARACTERISTICS Forward On−Voltage (Note 5) (IS = 2.0 Adc, VGS = 0 Vdc) VSD − 1.5 2.1 V Reverse Recovery Time (IS = 2.0 Adc, VDD = 15 V, dIS/dt = 100 A/μs) trr − 38 − ns ta − 17 − tb − 21 − Reverse Recovery Stored Charge QRR − 0.034 − μC SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Maximum Instantaneous Forward Voltage (Note 5) IF = 1.0 A IF = 2.0 A VF TJ = 25°C TJ = 125°C Volts 0.47 0.58 0.39 0.53 Maximum Instantaneous Reverse Current (Note 5) VR = 20 V IR TJ = 25°C TJ = 125°C mA 0.05 10 Maximum Voltage Rate of Change V R = 20 V dV/dt 10,000 V//C0109s 4. Negative sign for P −channel device omitted for clarity. 5. Pulse Test: Pulse Width ≤300 μsec, Duty Cycle ≤ 2.0%. 6. Switching characteristics are independent of operating temperature.

Figure 22. Schottky Thermal Response

http://onsemi.com TYPICAL APPLICATIONS LOADVoutCO Vin LOADVoutCO Vin STEP UP SWITCHING REGULATORS Boost Regulator Buck−Boost Regulator Vin MULTIPLE BATTERY CHARGERS BATT #1 BATT #2 Buck Regulator/Charger CO LOQ1

http://onsemi.com TYPICAL APPLICATIONS Li−lon BATTERY PACK APPLICATIONS Battery Pack DISCHARGE CHARGE SMART IC Li−Ion BATTERY CELLS PACK + PACK − SCHOTTKY SCHOTTKY Q1 Q2

  • Applicable in battery packs which require a high current level.
  • During charge cycle Q2 is on and Q1 is off. Schottky can reduce power loss during fast charge.
  • During discharge Q1 is on and Q2 is off. Again, Schottky can reduce power dissipation.
  • Under normal operation, both transistors are on. mm inches 0.060 1.52 0.275 7.0 0.024 0.6 0.050 1.270 0.155 4.0 SO−8 FOOTPRINT

http://onsemi.com PACKAGE DIMENSIONS STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 XXXXXX ALYW SO−8 CASE 751−07 ISSUE V ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 MMDFS2P102/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative FETKY is a trademark of International Rectifier Corporation.