MMDF2C01HD ONSEMI | Alldatasheet

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  • Manufacturer or author: jeaner
  • PDF pages: 16

Technical content

 Semiconductor Components Industries, LLC, 2000 September, 2004 − Rev. XXX

1 Publication Order Number:

2 Amps, 12 Volts

Complementary SO−8, Dual These miniature surface mount MOSFETs feature ultra low RDS(on) and true logic level performance. They are capable of withstanding high energy in the avalanche and commutation modes and the drain−to−source diode has a very low reverse recovery time. MiniMOS devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dc−dc converters, and power management in portable and battery powered products such as computers, printers, cellular and cordless phones. They can also be used for low voltage motor controls in mass storage products such as disk drives and tape drives.

  • Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
  • Logic Level Gate Drive − Can Be Driven by Logic ICs
  • Miniature SO−8 Surface Mount Package − Saves Board Space
  • Diode Is Characterized for Use In Bridge Circuits
  • Diode Exhibits High Speed, With Soft Recovery
  • IDSS Specified at Elevated Temperature
  • Mounting Information for SO−8 Package Provided MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) (Note 1.) Rating Symbol Value Unit Drain−to−Source Voltage N−Channel P−Channel VDSS Vdc Gate−to−Source Voltage VGS ± 8.0 Vdc Drain Current − Continuous N−Channel P−Channel − Pulsed N−Channel P−Channel ID IDM 5.2 3.4 A Operating and Storage Temperature RangeTJ and Tstg −55 to 150 Total Power Dissipation @ TA= 25°C (Note 2.) PD 2.0 Watts Thermal Resistance − Junction to Ambient (Note 2.) R θJA 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds. TL 260 °C 1. Negative signs for P−Channel device omitted for clarity. 2. Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max. N−Source 1 Top View N−Gate P−Source P−Gate N−Drain N−Drain P−Drain P−Drain

2 AMPERES

12 VOLTS

R DS(on) = 45 m (N−Channel) RDS(on) = 180 m (P−Channel) Device Package Shipping

ORDERING INFORMATION

MMDF2C01HDR2 SO−8 2500 Tape & Reel http://onsemi.com D S G P−Channel D S G N−Channel SO−8, Dual CASE 751 STYLE 14 LYWW MARKING DIAGRAM D2C01 D2C01 = Device Code L = Location Code Y = Year WW = Work Week PIN ASSIGNMENT Preferred devices are recommended choices for future use and best overall value.

http://onsemi.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Note 3.) Characteristic Symbol Polarity Min Typ Max Unit OFF CHARACTERISTICS Drain−Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 µAdc) V(BR)DSS (N) (P) Vdc Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = 20 Vdc) (VGS = 0 Vdc, VDS = 12 Vdc) IDSS (N) (P) 1.0 1.0 µAdc Gate−Body Leakage Current (VGS = ± 8.0 Vdc, VDS = 0) IGSS − − − 100 nAdc ON CHARACTERISTICS (Note 4.) Gate Threshold Voltage (VDS = VGS , ID = 250 µAdc) VGS(th) (N) (P) 0.7 0.7 0.8 1.0 1.1 1.1 Vdc Drain−to−Source On−Resistance (VGS = 4.5 Vdc, ID = 4.0 Adc) (VGS = 4.5 Vdc, ID = 2.0 Adc) R DS(on) (N) (P) 0.035 0.16 0.045 0.18 Ohm Drain−to−Source On−Resistance (VGS = 2.7 Vdc, ID = 2.0 Adc) (VGS = 2.7 Vdc, ID = 1.0 Adc) R DS(on) (N) (P) 0.043 0.2 0.055 0.22 Ohm Forward Transconductance (VDS = 2.5 Adc, ID = 2.0 Adc) (VDS = 2.5 Adc, ID = 1.0 Adc) gFS (N) (P) 3.0 3.0 6.0 4.75 mhos DYNAMIC CHARACTERISTICS Input Capacitance C iss (N) (P) 425 530 595 740 pF Output Capacitance (VDS = 10 Vdc, VGS = 0 Vdc, f = 1.0 MHz) C oss (N) (P) 270 410 378 570 Transfer Capacitance C rss (N) (P) 115 177 230 250 SWITCHING CHARACTERISTICS (Note 5.) Turn−On Delay Time (VDD = 6.0 Vdc, ID = 4.0 Adc, td(on) (N) (P) ns Rise Time (VDD 6.0 Vdc, ID 4.0 Adc, VGS = 2.7 Vdc, R G = 2.3 Ω ) tr (N) (P) 156 120 315 Turn−Off Delay Time (VDD = 6.0 Vdc, ID = 2.0 Adc, VGS = 2.7 Vdc, td(off) (N) (P) Fall Time VGS = 2.7 Vdc, R G = 6.0 Ω ) tf (N) (P) 135 Turn−On Delay Time (VDS = 6.0 Vdc, ID = 4.0 Adc, td(on) (N) (P) Rise Time (VDS 6.0 Vdc, ID 4.0 Adc, VGS = 4.5 Vdc, R G = 2.3 Ω ) tr (N) (P) Turn−Off Delay Time (VDS = 6.0 Vdc, ID = 2.0 Adc, VGS = 4.5 Vdc, td(off) (N) (P) 135 Fall Time VGS = 4.5 Vdc, R G = 6.0 Ω ) tf (N) (P) 110 3. Negative signs for P−Channel device omitted for clarity. 4. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 5. Switching characteristics are independent of operating junction temperature.

http://onsemi.com ELECTRICAL CHARACTERISTICS − continued (TA = 25°C unless otherwise noted) (Note 6.) Characteristic Symbol Polarity Min Typ Max Unit SWITCHING CHARACTERISTICS − continued (Note 8.) Total Gate Charge Q T (N) (P) 9.2 9.3 nC Gate−Source Charge (VDS = 10 Vdc, ID = 4.0 Adc, VGS = 4.5 Vdc) Q 1 (N) (P) 1.3 0.8 Gate−Drain Charge (VDS = 6.0 Vdc, ID = 2.0 Adc, VGS = 4.5 Vdc) Q 2 (N) (P) 3.5 4.0 VGS = 4.5 Vdc) Q 3 (N) (P) 3.0 3.0 SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C) Forward Voltage (Note 7.) (IS = 4.0 Adc, VGS = 0 Vdc) (IS = 2.0 Adc, VGS = 0 Vdc) VSD (N) (P) 0.95 1.69 1.1 2.0 Vdc Reverse Recovery Time trr (N) (P) ns (IF = IS, ta (N) (P) (IF = IS, dIS/dt = 100 A/µs) tb (N) (P) Reverse Recovery Stored Charge Q RR (N) (P) 0.028 0.05 µC 6. Negative signs for P−Channel device omitted for clarity. 7. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. 8. Switching characteristics are independent of operating junction temperature.

http://onsemi.com INFORMATION FOR USING THE SO−8 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self−align when subjected to a solder reflow process. mm inches 0.060 1.52 0.275 7.0 0.024 0.6 0.050 1.270 0.155 4.0 SO−8 POWER DISSIPATION The power dissipation of the SO−8 is a function of the input pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient; and the operating temperature, T A . Using the values provided on the data sheet for the SO−8 package, PD can be calculated as follows: PD = TJ(max) − TA R θJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 2.0 Watts. PD = 150°C − 25°C 62.5°C/W = 2.0 Watts The 62.5°C/W for the SO−8 package assumes the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 2.0 Watts using the footprint shown. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using board material such as Thermal Clad, the power dissipation can be doubled using the same footprint. SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected.

  • Always preheat the device.
  • The delta temperature between the preheat and soldering should be 100°C or less.*
  • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C.
  • The soldering temperature and time shall not exceed 260°C for more than 10 seconds.
  • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less.
  • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress.
  • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.

efficiently, then distributes this energy to the components. be up to 30 degrees cooler than the adjacent solder joints.

40 TO 80 SECONDS

Figure 15. Typical Solder Heating Profile

http://onsemi.com STYLE 14: PIN 1. N›SOURCE 2. N›GATE 3. P›SOURCE 4. P›GATE 5. P›DRAIN 6. P›DRAIN 7. N›DRAIN 8. N›DRAIN SEATING PLANE N J X 45 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M XXXXXX ALYW SO−8 CASE 751−07 ISSUE V

http://onsemi.com Notes

http://onsemi.com Notes

http://onsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION CENTRAL/SOUTH AMERICA: Spanish Phone: 303−308−7143 (Mon−Fri 8:00am to 5:00pm MST) Email: ONlit−spanish@hibbertco.com Toll−Free from Mexico: Dial 01−800−288−2872 for Access − then Dial 866−297−9322 ASIA/PACIFIC: LDC for ON Semiconductor − Asia Support Phone : 303−675−2121 (Tue−Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001−800−4422−3781 Email: ONlit−asia@hibbertco.com JAPAN : ON Semiconductor, Japan Customer Focus Center 4−32−1 Nishi−Gotanda, Shinagawa−ku, Tokyo, Japan 141−0031 Phone : 81−3−5740−2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. MMDF2C01HD/D MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC). Thermal Clad is a registered trademark of the Bergquist Company. NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone : 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303−675−2167 or 800−344−3810 Toll Free USA/Canada N. American Technical Support: 800−282−9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor − European Support German Phone : (+1) 303−308−7140 (Mon−Fri 2:30pm to 7:00pm CET) Email: ONlit−german@hibbertco.com French Phone : (+1) 303−308−7141 (Mon−Fri 2:00pm to 7:00pm CET) Email: ONlit−french@hibbertco.com English Phone: (+1) 303−308−7142 (Mon−Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL−FREE ACCESS*: 00−800−4422−3781 *Available from Germany, France, Italy, UK, Ireland