MMDF1N05E ONSEMI | Alldatasheet

Document overview

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Technical content

Features

  • Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery Life
  • Logic Level Gate Drive − Can Be Driven by Logic ICs
  • Miniature SO−8 Surface Mount Package − Saves Board Space
  • Diode Is Characterized for Use In Bridge Circuits
  • Diode Exhibits High Speed
  • Avalanche Energy Specified
  • Mounting Information for SO−8 Package Provided
  • IDSS Specified at Elevated Temperature
  • Pb−Free Package is Available MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDS 50 V Gate−to−Source Voltage − Continuous VGS ± 20 V Drain Current − Continuous Drain Current − Pulsed ID IDM 2.0 A Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 25 V, VGS = 10 V, IL = 2 Apk) EAS 300 mJ Operating and Storage Temperature Range TJ, Tstg −55 to 150 °C Total Power Dissipation @ TA = 25°C PD 2.0 W Thermal Resistance, Junction−to−Ambient (Note 1) R/C0113JA 62.5 °C/W Maximum Temperature for Soldering, Time in Solder Bath TL 260 Sec Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided) with one die operating, 10 sec. max. Source−1 1 Top View Gate−1 Source−2 Gate−2 Drain−1 Drain−1 Drain−2 Drain−2

1 AMPERE, 50 VOLTS

RDS(on) = 300 m/C0087 Device Package Shipping †

ORDERING INFORMATION

MMDF1N05ER2 SO−8 2,500/Tape & Ree l N−Channel D S G PIN ASSIGNMENT http://onsemi.com MMDF1N05ER2G SO−8 (Pb−Free) 2,500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification s Brochure, BRD8011/D. SO−8 CASE 751 STYLE 11 MARKING DIAGRAM F1N05 = Device Code A = Assembly Location Y = Year WW = Work Week /C0071 = Pb−Free Package (Note: Microdot may be in either location) F1N05 AYWW/C0071 /C0071

http://onsemi.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0, ID = 250 /C0109A) V(BR)DSS 50 − − Vdc Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS − − 2 /C0109Adc Gate−Body Leakage Current (VGS = 20 Vdc, VDS = 0) IGSS − − 100 nAdc ON CHARACTERISTICS (Note 2) Gate Threshold Voltage (VDS = VGS, ID = 250 /C0109Adc) VGS(th) 1.0 − 3.0 Vdc Drain−to−Source On−Resistance (VGS = 10 Vdc, ID = 1.5 Adc) (VGS = 4.5 Vdc, ID = 0.6 Adc) RDS(on) RDS(on) 0.30 0.50 /C0087 Forward Transconductance (VDS = 15 V, ID = 1.5 A) gFS − 1.5 − mhos DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 V, VGS = 0, f = 1.0 MHz) Ciss − 330 − pF Output Capacitance Coss − 160 − Reverse Transfer Capacitance Crss − 50 − SWITCHING CHARACTERISTICS (Note 3) Turn−On Delay Time (VDD = 10 V, ID = 1.5 A, RL = 10 /C0087, VG = 10 V, RG = 50 /C0087) td(on) − − 20 ns Rise Time tr − − 30 Turn−Off Delay Time td(off) − − 40 Fall Time tf − − 25 Total Gate Charge (VDS = 10 V, ID = 1.5 A, VGS = 10 V) Qg − 12.5 − nC Gate−Source Charge Qgs − 1.9 − Gate−Drain Charge Qgd − 3.0 − SOURCE−DRAIN DIODE CHARACTERISTICS (TC = 25°C) Forward Voltage (Note 2) (IS = 1.5 A, VGS = 0 V) (dIS/dt = 100 A//C0109s) VSD − − 1.6 V Reverse Recovery Time trr − 45 − ns 2. Pulse Test: Pulse Width ≤ 300 /C0109s, Duty Cycle ≤ 2.0%. 3. Switching characteristics are independent of operating junction temperature.

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics Figure 3. On−Resistance versus Drain Current Figure 4. On−Resistance Variation with Temperatu re

10 V −/hairline55°C 25°C

Figure 5. On Resistance versus Figure 6. Gate Threshold Voltage Variation

http://onsemi.com PACKAGE DIMENSIONS SOIC−8 CASE 751−07 ISSUE AG SEATING PLANE N J X 45/C0095 K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A B S DH C 0.10 (0.004) DIM A MIN MAX MIN MAX INCHES 4.80 5.00 0.189 0.197 MILLIMETERS B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8 N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 −X− −Y− G MYM0.25 (0.010) −Z− YM0.25 (0.010) Z S X S M /C0095/C0095/C0095/C0095 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 /C0466mm inches/C0467SCALE 6:1 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 MMDF1N05E/D MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC). Company. LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.