MMD80R900PC MGCHIP | Alldatasheet
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Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 1 Parameter Value Unit VDS @ Tj,max 850 V RDS(on),max 0.9 Ω VTH,typ 3 V ID 6 A Qg,typ 17.6 nC Order Code Marking Temp. Range Package Packing RoHS Status MMD80R900PCRH 80R900P -55 ~ 150℃ TO-252 (D-PAK) Reel & Tape Halogen Free MMD80R900PC 800V 0.9Ω N-channel MOSFET Description MMD80R900P is power MOSFET using magnachip’s advanced super junction technology that can realize very low on-resistance and gate charge. It will provide much high efficiency by using optimized charge coupling technology. These user friendly devices give an advantage of Low EMI to designers as well as low switching loss. Features Low Power Loss by High Speed Switching and Low On-Resistance 100% Avalanche Tested Green Package – Pb Free Plating, Halogen Free Key Parameters Ordering Information Applications PFC Power Supply Stages Switching Applications Adapter Motor Control DC – DC Converters Package & Internal Circuit D G S G D S
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 2 Parameter Symbol Rating Unit Note Drain – Source voltage VDSS 800 V Gate – Source voltage VGSS ±30 V Continuous drain current ID
6.0 A TC=25℃
3.8 A TC=100℃
Pulsed drain current(1) IDM 18 A Power dissipation PD 75.8 W Single - pulse avalanche energy EAS 230 mJ MOSFET dv/dt ruggedness dv/dt 50 V/ns Diode dv/dt ruggedness dv/dt 15 V/ns Storage temperature Tstg -55 ~150 ℃ Maximum operating junction temperature Tj 150 ℃ 1) Pulse width tP limited by Tj,max 2) ISD ≤ ID, VDS peak ≤ V(BR)DSS Parameter Symbol Value Unit Thermal resistance, junction-case max Rthjc 1.65 ℃/W Thermal resistance, junction-ambient max Rthja 62.5 ℃/W Thermal Characteristics Absolute Maximum Rating (Tc=25℃ unless otherwise specified)
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 3 Parameter Symbol Min. Typ. Max. Unit Test Condition Drain – Source Breakdown voltage V(BR)DSS 800 - - V VGS = 0V, I D=0.25mA Gate Threshold Voltage VGS(th) 2.5 3.0 3.5 V VDS = VGS, ID=0.25mA Zero Gate Voltage Drain Current IDSS - - 1 μA VDS = 800V, V GS = 0V Gate Leakage Current IGSS - - 100 nA VGS = ±30V, V DS =0V Drain-Source On State Resistance RDS(ON) - 0.78 0.9 Ω VGS = 10V, ID = 3.8A Parameter Symbol Min. Typ. Max. Unit Test Condition Input Capacitance Ciss - 574 - pF VDS = 25V, VGS = 0V, f = 1.0MHz Output Capacitance Coss - 508 - Reverse Transfer Capacitance Crss - 21 - Effective Output Capacitance Energy Related (3) Co(er) - 16.7 - VDS = 0V to 640V, VGS = 0V,f = 1.0MHz Turn On Delay Time td(on) - 12.8 - ns VGS = 10V, RG = 25Ω, VDS = 400V, ID = 6A Rise Time tr - 22.4 - Turn Off Delay Time td(off) - 54.4 - Fall Time tf - 23.6 - Total Gate Charge Qg - 17.6 - nC VGS = 10V, VDS =640V, ID = 6A Gate – Source Charge Qgs - 3.9 - Gate – Drain Charge Qgd - 6.7 - Gate Resistance RG - 2.5 - Ω VGS = 0V, f = 1.0MHz 3) Co(er) is a capacitance that gives the same stored energy as COSS while VDS is rising from 0V to 80% V(BR)DSS Static Characteristics (Tc=25℃ unless otherwise specified) Dynamic Characteristics (Tc=25℃ unless otherwise specified)
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 4 Parameter Symbol Min. Typ. Max. Unit Test Condition Continuous Diode Forward Current ISD - - 6.0 A Diode Forward Voltage VSD - - 1.4 V ISD = 6 A, VGS = 0 V Reverse Recovery Time trr - 320 - ns ISD = 6 A di/dt = 100 A/μs VDD = 100 V Reverse Recovery Charge Qrr - 2.4 - μC Reverse Recovery Current Irrm - 14.7 - A Reverse Diode Characteristics (Tc=25℃ unless otherwise specified)
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 5 Characteristic Graph
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 6
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 7
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 8 Test Circuit VDS 10V 1mA DUT 100KΩ 10V Same type as DUT VDD DUT Same type as DUT VDS IS Rg 10KΩ Vgs ± 15V L IF VDD DUT ID VDS Vgs tp RL VDD DUT IAS VDS Rg Vgs tp L 10V VGS Charge Qg Qgs Qgd VDS VGS 90% 10% Td(on) tr ton Td(off) tf toff VDD tp tAV VDS(t) BVDSS IAS Rds(on) * IAS trr ta tb IFM IRM di/dt
0.25 IRM
0.75 IRM
0.5 IRM
VRM(REC) Fig15-1. Gate charge measurement circuit Fig15-2. Gate charge waveform Fig16-1. Diode reverse recovery test circuit Fig16-1. Diode reverse recovery test waveform Fig17-1. Switching time test circuit for resistive load Fig17-2. Switching time waveform Fig18-1. Unclamped inductive load test circuit Fig18-2. Unclamped inductive waveform Rg 25Ω
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 9 Physical Dimension D-PAK, 3L Dimensions are in millimeters, unless otherwise specified Worldwide Sales Support Locations
Mar. 2014 Revision 1.0 MagnaChip Semiconductor Ltd. 10 DISCLAIMER: The Products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power generation, medical appliances, and devices or systems in which malfunction of any Product can reasonably be expected to result in a personal injury. Seller’s customers using or selling Seller’s products for use in such applications do so at their own risk and agree to fully defend and indemnify Seller. MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consid er responsibility for use of any circuitry other than circuitry entirely included in a MagnaChip product. is a registered trademark of MagnaChip Semiconductor Ltd.