MM80C98

MM70C95 NSC | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 8

Technical content

Features

Y Wide supply voltage range 3.0V to 15V Y Guaranteed noise margin 1.0V Y High noise immunity 0.45 V CC (typ.) Y TTL compatible Drive 1 TTL Load

Applications

Y Bus drivers Typical propagation delay into 150 pF load is 40 ns Connection Diagrams (Dual-In-Line Packages) MM70C95/MM80C95 TL/F/5907–1 Top View Order Number MM70C95 or MM80C95 MM70C96/MM80C96 TL/F/5907–2 Top View Order Number MM70C96 or MM80C96 MM70C97/MM80C97 TL/F/5907–3 Top View Order Number MM70C97 or MM80C97 MM70C98/MM80C98 TL/F/5907–4 Top View Order Number MM70C98 or MM80C98 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Voltage at Any Pin b0.3V to V CC a 0.3V Operating Temperature Range MM70CXX b55§Ct o a125§C MM80CXX b40§Ct o a85§C Storage Temperature Range b65§Ct o a150§C Power Dissipation (P D) Dual-In-Line 700 mW Small Outline 500 mW Power Supply Voltage (V CC) 18V Lead Temperature (Soldering, 10 seconds) 260 §C Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS VIN(1) Logical ‘‘1’’ Input Voltage V CC e 5V 3.5 V VCC e 10V 8.0 V VIN(0) Logical ‘‘0’’ Input Voltage V CC e 5V 1.5 V VCC e 10V 2.0 V VOUT(1) Logical ‘‘1’’ Output Voltage V CC e 5V 4.5 V VCC e 10V 9.0 V VOUT(0) Logical ‘‘0’’ Output Voltage V CC e 5V 0.5 V VCC e 10V 1.0 V IIN(1) Logical ‘‘1’’ Input Current V CC e 15V 0.005 1.0 mA IIN(0) Logical ‘‘0’’ Input Current b1.0 b0.005 mA IOZ Output Current in High V CC e 15V, V O e 15V 0.005 1.0 mA Impedance State V CC e 15V, V O e 0V b1.0 b0.005 mA ICC Supply Current V CC e 15V 0.01 15 mA TTL INTERFACE VIN(1) Logical ‘‘1’’ Input Voltage 70C V CC e 4.5V V CC b 1.5 V 80C V CC e 4.75V V CC b 1.5 V VIN(0) Logical ‘‘0’’ Input Voltage 70C V CC e 4.5V 0.8 V 80C V CC e 4.75V 0.8 V VOUT(1) Logical ‘‘1’’ Output Voltage 70C V CC e 4.5V, I O eb 1.6 mA 2.4 V 80C V CC e 4.75V, I O eb 1.6 mA 2.4 V VOUT(0) Logical ‘‘0’’ Output Voltage 70C V CC e 4.5V, I O e 1.6 mA 0.4 V 80C V CC e 4.75V, I O e 1.6 mA 0.4 V OUTPUT DRIVE (Short Circuit Current) ISOURCE Output Source Current V CC e 5V, V IN(1) e 5V b4.35 mATA e 25§C, V OUT e 0V ISOURCE Output Source Current V CC e 10V, V IN(1) e 10V b20 mATA e 25§C, V OUT e 0V ISINK Output Sink Current V CC e 5V, V IN(0) e 0V 4.35 mATA e 25§C, V OUT e VCC ISINK Output Sink Current V CC e 10V, V IN(0) e 0V 20 mATA e 25§C, V OUT e VCC Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the device should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 2: Capacitance is guaranteed by periodic testing. Note 3: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see 54C/74C Family Characteristics application note AN-90.

Symbol Parameter Conditions Min Typ Max Units tpd0,t pd1 Propagation Delay Time to a Logical ‘‘0’’ or Logical ‘‘1’’ from Data Input to Output MM70C95/MM80C95, MM70C97/MM80C97 V CC e 5V 60 100 ns VCC e 10V 25 40 ns MM70C96/MM80C96, MM70C98/MM80C98 V CC e 5V 70 150 ns VCC e 10V 35 75 ns tpd0,t pd1 Propagation Delay Time to a Logical ‘‘0’’ or Logical ‘‘1’’ from Data Input to Output MM70C95/MM80C95, MM70C97/MM80C97 V CC e 5V, C L e 150 pF 85 160 ns VCC e 10V, C L e 150 pF 40 80 ns MM70C96/MM80C96, MM70C98/MM80C98 V CC e 5V, C L e 150 pF 95 210 ns VCC e 10V, C L e 150 pF 45 110 ns t1H,t 0H Delay from Disable Input to High Impedance RL e 10k, C L e 5p FState, (from Logical ‘‘1’’ or Logical ‘‘0’’) MM70C95/MM80C95 V CC e 5V 80 135 ns VCC e 10V 50 90 ns MM70C96/MM80C96 V CC e 5V 100 180 ns VCC e 10V 70 125 ns MM70C97/MM80C97 V CC e 5V 70 125 ns VCC e 10V 50 90 ns MM70C98/MM80C98 V CC e 5V 90 170 ns VCC e 10V 70 125 ns tH1,t H0 Delay from Disable Input to Logical ‘‘1’’ Level RL e 10k, C L e 50 pF(from High Impedance State) MM70C95/MM80C95 V CC e 5V 120 200 ns VCC e 10V 50 90 ns MM70C96/MM80C96 V CC e 5V 130 225 ns VCC e 10V 60 110 ns MM70C97/MM80C97 V CC e 5V 95 175 ns VCC e 10V 40 80 ns MM70C98/MM80C98 V CC e 5V 120 200 ns VCC e 10V 50 90 ns CIN Input Capacitance Any Input (Note 2) 5.0 pF COUT Output Capacitance TRI-STATE Any Output (Note 2) 11 pF CPD Power Dissipation Capacitance (Note 3) 60 pF *AC Parameters are guaranteed by DC correlated testing. Truth Tables MM70C95/MM80C95 Disable Input Input OutputDIS1 DIS2 00 0 0 00 1 1 0 1 X H-z 1 0 X H-z 1 1 X H-z MM70C96/MM80C96 Disable Input Input OutputDIS1 DIS2 00 0 1 00 1 0 0 1 X H-z 1 0 X H-z 1 1 X H-z MM70C97/MM80C97 Disable Input Input OutputDIS4 DIS2 00 0 0 00 1 1 X 1 X H-z *

1 X X H-z **

*Output 5–6 only **Output 1–4 only X e Irrelevant MM70C98/MM80C98 Disable Input Input OutputDIS4 DIS2 00 0 1 00 1 0 X 1 X H-z *

AC Test Circuits and Switching Time Waveforms tpd0,t pd1 TL/F/5907–13 CMOS to CMOS TL/F/5907–14 t1H and t H1 TL/F/5907–15 t1H TL/F/5907–16 tH1 TL/F/5907–17 t0H and t H0 TL/F/5907–18 t0H TL/F/5907–19 tH0 TL/F/5907–20 Note: Delays measured with input t r,t f s 20 ns.

Typical Performance Characteristics Propagation Delay vs Load Capacitance TL/F/5907–5 Dtpd/pF vs Power Supply Voltage TL/F/5907–6 N-Channel Output Drive at 25 §C TL/F/5907–7 P-Channel Output Drive at 25 §C TL/F/5907–8 Schematic Diagrams MM70C95/MM80C95 TRI-STATE TL/F/5907–9 MM70C96/MM80C96 TRI-STATE TL/F/5907–10

Schematic Diagrams (Continued) MM70C97/MM80C97 TRI-STATE TL/F/5907–11 MM70C98/MM80C98 TRI-STATE TL/F/5907–12

Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM70C95J, MM70C96J, MM70C97J, MM70C98J, MM80C95J, MM80C96J, MM80C97J or MM80C98J

MM70C95/MM80C95, MM70C97/MM80C97 TRI-STATE Hex Buffers MM70C96/MM80C96, MM70C98/MM80C98 TRI-STATE Hex Inverters Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number MM70C95N, MM70C96N, MM70C97N, MM70C98N, MM80C95N, MM80C96N, MM80C97N or MM80C98N LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

1111 West Bardin Road Fax: (

a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge @ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a49) 0-180-532 78 32 Hong Kong Fran3ais Tel: ( a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: ( a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.