MM74C906 FAIRCHILD | Alldatasheet

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I Wide supply voltage range: 3V to 15V I Guaranteed noise margin: 1V I High noise immunity: 0.45 VCC (typ.) I High current sourcing and sinking open drain outputs Ordering Code: Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP and SOIC Top View Logic Diagram Order Number Package Number Package Description MM74C906M (Note 1) M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74C906N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

www.fairchildsemi.com 2 MM74C906 Absolute Maximum Ratings(Note 2) Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Tempera- ture Range” they are not meant to imply that the devices should be oper- ated at these limits. The table of “Electrical Characteristics” provides conditions for actual device operation. Min/Max limits apply across temperature range unless otherwise noted Voltage at Any Input Pin −0.3V to VCC +0.3V Voltage at Any Output Pin Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating VCC Range 3V to 15V Absolute Maximum VCC 18V Lead Temperature (TL) (Soldering, 10 seconds) 260 °C Symbol Parameter Conditions Min Typ Max Units CMOS TO CMOS V IN(1) Logical “1” Input Voltage V CC = 5V 3.5 V VCC = 10V 8.0 V VIN(0) Logical “0” Input Voltage V CC = 5V 1.5 V VCC = 10V 2 V IIN(1) Logical “1” Input Current V CC = 15V, VIN = 15V 0.005 1 µA IIN(0) Logical “0” Input Current V CC = 15V, VIN = 0V −1.0 −0.005 µA ICC Supply Current V CC = 15V, Output Open 0.05 15 µA Output Leakage VCC = 4.75V, VIN = VCC − 1.5V 0.005 5 µA VCC = 4.75V, VOUT = 18V CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage V CC = 4.75V V CC − 1.5V V VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V OUTPUT DRIVE CURRENT VCC = 4.75V, VIN = 1V + 0.1 VCC VCC = 4.75V, VOUT = 0.5V 2.1 8.0 mA VCC = 4.75V, VOUT = 1.0V 4.2 12.0 mA VCC = 10V, VIN = 2V VCC = 10V, VOUT = 0.5V 4.2 20 mA VCC = 10V, VOUT = 1V 8.4 30 mA

3 www.fairchildsemi.com MM74C906 TA = 25°C, CL = 50 pF, unless otherwise specified Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: “C ” used in calculating propagation includes output load capacity (CL) plus device output capacity (COUT ). Note 5: Capacitance is guaranteed by periodic testing. Note 6: C PD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note, AN-90. (Assumes outputs are open). Typical Applications Wire AND Gate Note: Can be extended to more than 2 inputs. CMOS or TTL to CMOS at a Higher VCC Symbol Parameter Conditions Min Typ Max Units tpd Propagation Delay Time to a Logical “0” VCC = 5.0V, R = 10k 150 ns VCC =10V, R = 10k 75 ns tpd Propagation Delay Time to a Logical “1” VCC = 5.0V (Note 4) 150 + 0.7 RC ns VCC = 10V (Note 4) 75 + 0.7 RC ns C IN Input Capacitance (Note 5) 5.0 pF C OUT Output Capacity (Note 5) 20 pF C PD Power Dissipation Capacity (Note 6) Per Buffer 30 pF

www.fairchildsemi.com 4 MM74C906 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

5 www.fairchildsemi.com MM74C906 Hex Open Drain N-Channel Buffers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com