MM74HC574 FAIRCHILD | Alldatasheet

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I Typical propagation delay: 18 ns I Wide operating voltage range: 2V–6V I Low input current: 1 /c80 A maximum I Low quiescent current: 80 /c80 A maximum I Compatible with bus-oriented systems I Output drive capability: 15 LS-TTL loads Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Assignments for DIP , SOIC, SOP and TSSOP Top View Truth Table H /c32 HIGH Level L /c32 LOW Level X /c32 Don't Care /c110 /c32 Transition from LOW-to-HIGH Z /c32 High Impedance State Q 0 /c32 The level of the output before steady state input conditions were established Order Number Package Number Package Description MM74HC574WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC574MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC574N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Output Clock Data Output Control L /c110 HH L /c110 LL LL X Q 0 HX X Z

www.fairchildsemi.com 2 MM74HC574 Absolute Maximum Ratings(Note 1) (Note 2) Recommended Operating Conditions Note 1: Maximum Ratings are those values beyond which damage to the device may occur. Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating — plastic “N ” package: /c16 12 mW/ /c113 C from 65/c113 C to 85/c113 C. Note 4: For a power supply of 5V /c114 10% the worst-case output voltages (VOH , and VOL ) occur for HC at 4.5V. Thus the 4.5V values should be used when rent (IIN, ICC , and IOZ ) occur for CMOS at the higher voltage and so the 6.0V values should be used. Supply Voltage (VCC ) /c16 0.5 to /c14 7.0V DC Input Voltage (VIN) /c16 1.5 to VCC /c14 1.5V DC Output Voltage (VOUT ) /c16 0.5 to VCC /c14 0.5V Clamp Diode Current (IIK, IOK ) /c114 20 mA DC Output Current, per pin (IOUT ) /c114 35 mA DC V CC or GND Current, per pin (ICC ) /c114 70 mA Storage Temperature Range (TSTG ) /c16 65/c113 C to /c14 150/c113 C Power Dissipation (PD ) (Note 3) 600 mW S.O. Package only 500 mW Lead Temperature (T (Soldering 10 seconds) 260 /c113 C Min Max Units Supply Voltage (VCC )2 6 V DC Input or Output Voltage 0 V CC V (VIN,VOUT ) Operating Temperature Range (TA) /c16 40 /c14 85 /c113 C Input Rise or Fall Times (tr, tf) V CC /c32 2.0V 1000 ns VCC /c32 4.5V 500 ns VCC /c32 6.0V 400 ns Symbol Parameter Conditions VCC TA /c32 25/c113 CT A /c32 /c16 40 to 85/c113 CT A /c32 /c16 55 to 125/c113 C Units Typ Guaranteed Limits VIH Minimum HIGH Level Input 2.0V 1.5 1.5 1.5 VVoltage 4.5V 3.15 3.15 3.15 6.0V 4.2 4.2 4.2 VIL Maximum LOW Level Input 2.0V 0.5 0.5 0.5 VVoltage 4.5V 1.35 1.35 1.35 6.0V 1.8 1.8 1.8 VOH Minimum HIGH Level Output V IN /c32 VIH or VIL VIN /c32 VIH or VIL V VOL Maximum LOW Level Output V IN /c32 VIH or VIL Voltage |I OUT | /c100 20 /c80 A 2.0V 0 0.1 0.1 0.1 V4.5V 0 0.1 0.1 0.1 6.0V 0 0.1 0.1 0.1 VIN /c32 VIH or VIL V IIN Maximum Input Current V IN /c32 VCC or GND 6.0V /c114 0.1 /c114 1.0 /c114 1.0 /c80 A IOZ Maximum 3-STATE V OUT /c32 VCC or GND Output Leakage Current OC /c32 VIH 6.0V /c114 0.5 /c114 5.0 /c114 10 /c80 A ICC Maximum Quiescent Supply V IN /c32 VCC or GND Current I OUT /c32 0 /c80 A 6.0V 8.0 80 160 /c80 A

3 www.fairchildsemi.com MM74HC574 VCC /c32 5V, TA /c32 25/c113 C, tr /c32 tf /c32 6 ns VCC /c32 2.0 /c16 6.0V, CL /c32 50 pF, tr /c32 tf /c32 6 ns (unless otherwise specified) Symbol Parameter Conditions Typ Guaranteed Units Limit fMAX Maximum Operating Frequency 60 33 MHz tPHL , tPLH Maximum Propagation Delay, Clock to Q CL /c32 45 pF 17 27 ns tPZH , tPZL Maximum Output Enable Time R L /c32 1 k/c58 19 28 ns C L /c32 45 pF tPHZ , tPLZ Maximum Output Disable Time R L /c32 1 k/c58 14 25 ns C L /c32 5 pF tS Minimum Setup Time, Data to Clock 10 12 ns tH Minimum Hold Time, Clock to Data /c16 35n s tW Minimum Pulse Clock Width 8 15 ns Symbol Parameter Conditions VCC TA /c32 25/c113 CT A /c32 /c16 40 to 85/c113 CT A /c32 /c16 55 to 125/c113 C Units Typ Guaranteed Limits fMAX Maximum Operating Frequency CL /c32 50 pF 2.0V 33 28 23 MHz4.5V 30 24 20 6.0V 35 28 23 tPHL , tPLH Maximum Propagation C L /c32 50 pF 2.0V 18 30 38 45 ns Delay, Clock to Q C L /c32 150 pF 2.0V 51 155 194 233 C L /c32 50 pF 4.5V 13 23 29 35 ns C L /c32 150 pF 4.5V 19 31 47 47 C L /c32 50 pF 6.0V 12 20 25 30 ns C L /c32 150 pF 6.0V 18 27 34 41 tPZH , tPZL Maximum Output Enable R L /c32 1 k/c58 Time C L /c32 50 pF 2.0V 22 30 38 45 ns C L /c32 150 pF 2.0V 59 180 225 270 C L /c32 50 pF 4.5V 14 28 35 42 ns C L /c32 150 pF 4.5V 20 36 45 54 C L /c32 50 pF 6.0V 12 24 30 36 ns C L /c32 150 pF 6.0V 18 31 39 47 tPHZ , tPLZ Maximum Output Disable Time RL /c32 1 k/c58 2.0V 15 30 38 45 nsC L /c32 50 pF 4.5V 12 25 31 38 6.0V 10 21 27 32 tS Minimum Setup Time 2.0V 6 12 15 18 nsData to Clock 4.5V 20 25 30 6.0V 17 21 25 tH Minimum Hold Time 2.0V /c16 15 6 8 nsClock to Data 4.5V 0 0 0 6.0V 0 0 0 tTHL , tTLH Maximum Output Rise C L /c32 50 pF 2.0V 6 12 15 18 nsand Fall Time 4.5V 7 12 15 18 6.0V 6 10 13 15 tW Minimum Clock Pulse Width 2.0V 30 15 20 24 ns4.5V 9 16 20 24 6.0V 8 14 18 20 tr,tf Maximum Clock Input Rise 2.0V 1000 1000 1000 nsand Fall Time 4.5V 500 500 500 6.0V 400 400 400 C PD Power Dissipation Capacitance OC /c32 VCC 5 pF (Note 5) (per latch) OC /c32 GND 58 C IN Maximum Input Capacitance 5 10 10 10 pF

www.fairchildsemi.com 4 MM74HC574 Note 5: C PD determines the no load dynamic power consumption, PD /c32 CPD VCC 2 f /c14 ICC VCC , and the no load dynamic current consumption, IS /c32 CPD VCC f /c14 ICC . Symbol Parameter Conditions VCC TA /c32 25/c113 CT A /c32 /c16 40 to 85/c113 CT A /c32 /c16 55 to 125/c113 C Units Typ Guaranteed Limits C OUT Maximum Output 15 20 20 20 pF Capacitance

5 www.fairchildsemi.com MM74HC574 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B

www.fairchildsemi.com 6 MM74HC574 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D

7 www.fairchildsemi.com MM74HC574 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

www.fairchildsemi.com 8 MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com