MM74C48N

MM74C48 FAIRCHILD | Alldatasheet

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Technical content

Features

■ Wide supply voltage range: 3.0V to 15V ■ Guaranteed noise margin: 1.0V ■ High noise immunity: 0.45 VCC (typ.) ■ Low power TTL compatibility: fan out of 2 driving 74L ■ High current sourcing output (up to 50 mA) ■ Ripple blanking for leading or trailing zeros (optional) ■ Lamp test provision Ordering Code: Connection Diagrams Pin Assignments for DIP Top View Segment Identification Numerical Designations and Resultant Displays Order Number Package Number Package Description MM74C48N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

www.fairchildsemi.com 2 MM74C48 Truth Table H = HIGH Level L = LOW Level X = Irrelevant Note 1: One BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). Note 2: The blanking input (BI) must be open when output functions 0–15 are desired. The ripple-blanking input (RBI) must be HIGH, if blanking of a decimal zero is not desired. Note 3: When a LOW logic level is applied directly to the blanking input (BI), all segment outputs are LOW regardless of the level of any other input. Note 4: When ripple-blanking input (RBI) and inputs A, B, C, and D are at a LOW level with the lamp-test input HIGH, all segment outputs go LOW and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is open and a LOW is applied to the lamp-test input, all segment outputs are HIGH. Decimal Inputs Outputs or BI/RBO Note Function LT RBI D C B A (Note 1) a b c d e f g

0 HHLLLL H HHHHHHL ( N o t e 2 )

1 H X L L L H H L H H L L L L (Note 2)

2H X L L H LHH H L H H L H

3 HXLLHH H HHHHLLH

4H X L H L LHL H H L L H H

5 HXLHLH H HLHHLHH

6 HXLHHL H L LHHHHH

7 HXLH H H H H H HLLLL

8 HXHL L L H HHHHHHH

9 HX HLLH H H H HLLH H

10 H X H L H L H L L L H H L H

11 H X H L H H H L L H H L L H

1 3 H X H H L HHH L L H L H H 1 4 HXHHHL H L L LHHHH 1 5 HX H H H H H LLLLLLL B I XXXXXX L LLLLLLL ( N o t e 3 ) R B I HLLLLL L LLLLLLL ( N o t e 4 ) L T LXXXXX H HHHHHHH ( N o t e 5 )

3 www.fairchildsemi.com MM74C48 Absolute Maximum Ratings(Note 6) Note 6: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. Except for “Operating Tempera- ture Range” they are not meant to imply that the devices should be oper- ated at these limits. The Electrical Characteristics table provides conditions for actual device operation. Voltage at Any Pin −0.3V to VCC + 0.3V Operating T emperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C Power Dissipation Dual-In-Line 700 mW Small Outline 500 mW Operating V CC Range 3.0V to 15V Absolute Maximum VCC 18V Lead Temperature (Soldering, 10 seconds) 260 °C Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS VIN(1) Logical “1” Input Voltage V CC = 5.0V 3.5 V VCC = 10V 8.0 V VIN(0) Logical “0” Input Voltage V CC = 5.0V 1.5 V VCC = 10V 2.0 V VOUT(1) Logical “1” Output Voltage V CC = 5.0V, IO = −10 µA4 . 5 V (RB Output Only) V CC = 10V, IO = −10 µA9 . 0 V VOUT(0) Logical “0” Output Voltage V CC = 5.0V, IO = 10 µA0 . 5 V VCC = 10V, IO = 10 µA1 . 0 V IIN(1) Logical “1” Input Current V CC = 15.0V, VIN = 15V 0.005 1.0 µA IIN(0) Logical “0” Input Current V CC = 15.0V, VIN = 0V −1.0 −0.005 µA ICC Supply Current V CC = 15V 0.05 300 µA CMOS/LPTTL INTERFACE VIN(1) Logical “1” Input Voltage V CC = 4.75V V CC − 1.5 V VIN(0) Logical “0” Input Voltage V CC = 4.75V 0.8 V VOUT(1) Logical “1” Output Voltage V CC = 4.75V, IO = −50 µA2 . 4 V (RB Output Only) VOUT(0) Logical “0” Output Voltage V CC = 4.75V, IO = 360 µA0 . 4 V OUTPUT DRIVE (See Family Characteristics Data Sheet) ISOURCE Output Source Current V CC = 4.75V, VOUT = 0.4V −0.80 mA (P-Channel) (RB Output Only) V CC = 10V, VOUT = 0.5V −4.0 mA ISINK Output Sink Current V CC = 5.0V, VOUT = VCC 1.75 3.6 mA (N-Channel) T A = 25°C ISINK Output Sink Current V CC = 10V, VOUT = VCC 8.0 16 mA (N-Channel) T A = 25°C ISOURCE Output Source Current V CC = 5.0V, VOUT = 3.4V −20 −50 mA (NPN Bipolar) V CC = 5.0V, VOUT = 3.0V −65 mA VCC = 10V, VOUT = 8.4V −20 −50 mA VCC = 10V, VOUT = 8.0V −65 mA

www.fairchildsemi.com 4 MM74C48 TA = 25°C, CL = 50 pF , unless otherwise specified Note 7: AC Parameters are guaranteed by DC correlated testing. Typical Applications Typical Connection Utilizing the Ripple-Blanking Feature First three stages will blank leading zeros, the fourth stage will not blank zeros. Blanking Input Connection Diagram When RBO/BI is forced LOW, all segment outputs are off regardless of the state of any other input condition. Symbol Parameter Conditions Min Typ Max Units tpd0, tpd1 Propagation Delay to a “1” or “0” on VCC = 5.0V 450 1500 ns Segment Outputs from Data Inputs VCC = 10V 160 500 ns tpd0 Propagation Delay to a “0” on V CC = 5.0V 500 1600 ns Segment Outputs from RB Input V CC = 10V 180 550 ns tpd0 Propagation Delay to a “0” on V CC = 5.0V 350 1200 ns Segment Outputs from Blanking Input VCC = 10V 140 450 ns tpd1 Propagation Delay to a “1” on V CC = 5.0V 450 1500 ns Segment Outputs from Lamp Test V CC = 10V 160 500 ns tpd1 Propagation Delay to a “1” on RB VCC = 5.0V 600 2000 ns Output from RB Input V CC = 10V 250 800 ns tpd0 Propagation Delay to a “0” on RB VCC = 5.0V 140 450 ns Output from RB Input V CC = 10V 50 150 ns

5 www.fairchildsemi.com MM74C48 Light Emitting Diode (LED) Readout Incandescent Readout **A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. Fluorescent Readout Gas Discharge Readout Liquid Crystal (LC) Readout Direct DC drive of LC's not recommended for life of LC readouts.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. MM74C48 BCD-to-7 Segment Decoder LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E